ixgbe.h revision 200239
1/****************************************************************************** 2 3 Copyright (c) 2001-2009, Intel Corporation 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Intel Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32******************************************************************************/ 33/*$FreeBSD: head/sys/dev/ixgbe/ixgbe.h 200239 2009-12-07 21:30:54Z jfv $*/ 34 35 36#ifndef _IXGBE_H_ 37#define _IXGBE_H_ 38 39 40#include <sys/param.h> 41#include <sys/systm.h> 42#if __FreeBSD_version >= 800000 43#include <sys/buf_ring.h> 44#endif 45#include <sys/mbuf.h> 46#include <sys/protosw.h> 47#include <sys/socket.h> 48#include <sys/malloc.h> 49#include <sys/kernel.h> 50#include <sys/module.h> 51#include <sys/sockio.h> 52 53#include <net/if.h> 54#include <net/if_arp.h> 55#include <net/bpf.h> 56#include <net/ethernet.h> 57#include <net/if_dl.h> 58#include <net/if_media.h> 59 60#include <net/bpf.h> 61#include <net/if_types.h> 62#include <net/if_vlan_var.h> 63 64#include <netinet/in_systm.h> 65#include <netinet/in.h> 66#include <netinet/if_ether.h> 67#include <netinet/ip.h> 68#include <netinet/ip6.h> 69#include <netinet/tcp.h> 70#include <netinet/tcp_lro.h> 71#include <netinet/udp.h> 72 73#include <machine/in_cksum.h> 74 75#include <sys/bus.h> 76#include <machine/bus.h> 77#include <sys/rman.h> 78#include <machine/resource.h> 79#include <vm/vm.h> 80#include <vm/pmap.h> 81#include <machine/clock.h> 82#include <dev/pci/pcivar.h> 83#include <dev/pci/pcireg.h> 84#include <sys/proc.h> 85#include <sys/sysctl.h> 86#include <sys/endian.h> 87#include <sys/taskqueue.h> 88#include <sys/pcpu.h> 89#include <sys/smp.h> 90#include <machine/smp.h> 91 92#ifdef IXGBE_IEEE1588 93#include <sys/ieee1588.h> 94#endif 95 96#include "ixgbe_api.h" 97 98/* Tunables */ 99 100/* 101 * TxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 102 * number of transmit descriptors allocated by the driver. Increasing this 103 * value allows the driver to queue more transmits. Each descriptor is 16 104 * bytes. Performance tests have show the 2K value to be optimal for top 105 * performance. 106 */ 107#define DEFAULT_TXD 1024 108#define PERFORM_TXD 2048 109#define MAX_TXD 4096 110#define MIN_TXD 64 111 112/* 113 * RxDescriptors Valid Range: 64-4096 Default Value: 256 This value is the 114 * number of receive descriptors allocated for each RX queue. Increasing this 115 * value allows the driver to buffer more incoming packets. Each descriptor 116 * is 16 bytes. A receive buffer is also allocated for each descriptor. 117 * 118 * Note: with 8 rings and a dual port card, it is possible to bump up 119 * against the system mbuf pool limit, you can tune nmbclusters 120 * to adjust for this. 121 */ 122#define DEFAULT_RXD 1024 123#define PERFORM_RXD 2048 124#define MAX_RXD 4096 125#define MIN_RXD 64 126 127/* Alignment for rings */ 128#define DBA_ALIGN 128 129 130/* 131 * This parameter controls the maximum no of times the driver will loop in 132 * the isr. Minimum Value = 1 133 */ 134#define MAX_LOOP 10 135 136/* 137 * This is the max watchdog interval, ie. the time that can 138 * pass between any two TX clean operations, such only happening 139 * when the TX hardware is functioning. 140 */ 141#define IXGBE_WATCHDOG (10 * hz) 142 143/* 144 * This parameters control when the driver calls the routine to reclaim 145 * transmit descriptors. 146 */ 147#define IXGBE_TX_CLEANUP_THRESHOLD (adapter->num_tx_desc / 8) 148#define IXGBE_TX_OP_THRESHOLD (adapter->num_tx_desc / 32) 149 150#define IXGBE_MAX_FRAME_SIZE 0x3F00 151 152/* Flow control constants */ 153#define IXGBE_FC_PAUSE 0xFFFF 154#define IXGBE_FC_HI 0x20000 155#define IXGBE_FC_LO 0x10000 156 157/* Defines for printing debug information */ 158#define DEBUG_INIT 0 159#define DEBUG_IOCTL 0 160#define DEBUG_HW 0 161 162#define INIT_DEBUGOUT(S) if (DEBUG_INIT) printf(S "\n") 163#define INIT_DEBUGOUT1(S, A) if (DEBUG_INIT) printf(S "\n", A) 164#define INIT_DEBUGOUT2(S, A, B) if (DEBUG_INIT) printf(S "\n", A, B) 165#define IOCTL_DEBUGOUT(S) if (DEBUG_IOCTL) printf(S "\n") 166#define IOCTL_DEBUGOUT1(S, A) if (DEBUG_IOCTL) printf(S "\n", A) 167#define IOCTL_DEBUGOUT2(S, A, B) if (DEBUG_IOCTL) printf(S "\n", A, B) 168#define HW_DEBUGOUT(S) if (DEBUG_HW) printf(S "\n") 169#define HW_DEBUGOUT1(S, A) if (DEBUG_HW) printf(S "\n", A) 170#define HW_DEBUGOUT2(S, A, B) if (DEBUG_HW) printf(S "\n", A, B) 171 172#define MAX_NUM_MULTICAST_ADDRESSES 128 173#define IXGBE_82598_SCATTER 100 174#define IXGBE_82599_SCATTER 32 175#define MSIX_82598_BAR 3 176#define MSIX_82599_BAR 4 177#define IXGBE_TSO_SIZE 65535 178#define IXGBE_TX_BUFFER_SIZE ((u32) 1514) 179#define IXGBE_RX_HDR 256 180#define IXGBE_VFTA_SIZE 128 181#define IXGBE_BR_SIZE 4096 182#define CSUM_OFFLOAD 7 /* Bits in csum flags */ 183 184/* For 6.X code compatibility */ 185#if !defined(ETHER_BPF_MTAP) 186#define ETHER_BPF_MTAP BPF_MTAP 187#endif 188 189#if __FreeBSD_version < 700000 190#define CSUM_TSO 0 191#define IFCAP_TSO4 0 192#endif 193 194/* 195 * Interrupt Moderation parameters 196 */ 197#define IXGBE_LOW_LATENCY 128 198#define IXGBE_AVE_LATENCY 400 199#define IXGBE_BULK_LATENCY 1200 200#define IXGBE_LINK_ITR 2000 201 202/* Header split args for get_bug */ 203#define IXGBE_CLEAN_HDR 1 204#define IXGBE_CLEAN_PKT 2 205#define IXGBE_CLEAN_ALL 3 206 207/* 208 ***************************************************************************** 209 * vendor_info_array 210 * 211 * This array contains the list of Subvendor/Subdevice IDs on which the driver 212 * should load. 213 * 214 ***************************************************************************** 215 */ 216typedef struct _ixgbe_vendor_info_t { 217 unsigned int vendor_id; 218 unsigned int device_id; 219 unsigned int subvendor_id; 220 unsigned int subdevice_id; 221 unsigned int index; 222} ixgbe_vendor_info_t; 223 224 225struct ixgbe_tx_buf { 226 u32 eop_index; 227 struct mbuf *m_head; 228 bus_dmamap_t map; 229}; 230 231struct ixgbe_rx_buf { 232 struct mbuf *m_head; 233 struct mbuf *m_pack; 234 bus_dmamap_t map; 235}; 236 237/* 238 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free. 239 */ 240struct ixgbe_dma_alloc { 241 bus_addr_t dma_paddr; 242 caddr_t dma_vaddr; 243 bus_dma_tag_t dma_tag; 244 bus_dmamap_t dma_map; 245 bus_dma_segment_t dma_seg; 246 bus_size_t dma_size; 247 int dma_nseg; 248}; 249 250/* 251 * The transmit ring, one per tx queue 252 */ 253struct tx_ring { 254 struct adapter *adapter; 255 struct mtx tx_mtx; 256 u32 me; 257 u32 msix; 258 bool watchdog_check; 259 int watchdog_time; 260 union ixgbe_adv_tx_desc *tx_base; 261 volatile u32 tx_hwb; 262 struct ixgbe_dma_alloc txdma; 263 struct task tx_task; 264 struct taskqueue *tq; 265 u32 next_avail_desc; 266 u32 next_to_clean; 267 struct ixgbe_tx_buf *tx_buffers; 268 volatile u16 tx_avail; 269 u32 txd_cmd; 270 bus_dma_tag_t txtag; 271 char mtx_name[16]; 272#if __FreeBSD_version >= 800000 273 struct buf_ring *br; 274#endif 275 /* Interrupt resources */ 276 void *tag; 277 struct resource *res; 278#ifdef IXGBE_FDIR 279 u16 atr_sample; 280 u16 atr_count; 281#endif 282 /* Soft Stats */ 283 u32 no_tx_desc_avail; 284 u32 no_tx_desc_late; 285 u64 tx_irq; 286 u64 total_packets; 287}; 288 289 290/* 291 * The Receive ring, one per rx queue 292 */ 293struct rx_ring { 294 struct adapter *adapter; 295 struct mtx rx_mtx; 296 u32 me; 297 u32 msix; 298 u32 payload; 299 struct task rx_task; 300 struct taskqueue *tq; 301 union ixgbe_adv_rx_desc *rx_base; 302 struct ixgbe_dma_alloc rxdma; 303 struct lro_ctrl lro; 304 bool lro_enabled; 305 bool hdr_split; 306 bool hw_rsc; 307 unsigned int last_refreshed; 308 unsigned int next_to_check; 309 struct ixgbe_rx_buf *rx_buffers; 310 bus_dma_tag_t rxtag; 311 bus_dmamap_t spare_map; 312 char mtx_name[16]; 313 314 u32 bytes; /* Used for AIM calc */ 315 u32 eitr_setting; 316 317 /* Interrupt resources */ 318 void *tag; 319 struct resource *res; 320 321 /* Soft stats */ 322 u64 rx_irq; 323 u64 rx_split_packets; 324 u64 rx_packets; 325 u64 rx_bytes; 326 u64 rsc_num; 327#ifdef IXGBE_FDIR 328 u64 flm; 329#endif 330}; 331 332/* Our adapter structure */ 333struct adapter { 334 struct ifnet *ifp; 335 struct ixgbe_hw hw; 336 337 struct ixgbe_osdep osdep; 338 struct device *dev; 339 340 struct resource *pci_mem; 341 struct resource *msix_mem; 342 343 /* 344 * Interrupt resources: this set is 345 * either used for legacy, or for Link 346 * when doing MSIX 347 */ 348 void *tag; 349 struct resource *res; 350 351 struct ifmedia media; 352 struct callout timer; 353 int msix; 354 int if_flags; 355 356 struct mtx core_mtx; 357 358 eventhandler_tag vlan_attach; 359 eventhandler_tag vlan_detach; 360 361 u16 num_vlans; 362 u16 num_queues; 363 364 /* Info about the board itself */ 365 u32 optics; 366 bool link_active; 367 u16 max_frame_size; 368 u32 link_speed; 369 bool link_up; 370 u32 linkvec; 371 372 /* Mbuf cluster size */ 373 u32 rx_mbuf_sz; 374 375 /* Support for pluggable optics */ 376 bool sfp_probe; 377 struct task link_task; /* Link tasklet */ 378 struct task mod_task; /* SFP tasklet */ 379 struct task msf_task; /* Multispeed Fiber tasklet */ 380#ifdef IXGBE_FDIR 381 int fdir_reinit; 382 struct task fdir_task; 383#endif 384 struct taskqueue *tq; 385 386 /* 387 * Transmit rings: 388 * Allocated at run time, an array of rings. 389 */ 390 struct tx_ring *tx_rings; 391 int num_tx_desc; 392 393 /* 394 * Receive rings: 395 * Allocated at run time, an array of rings. 396 */ 397 struct rx_ring *rx_rings; 398 int num_rx_desc; 399 u64 rx_mask; 400 u32 rx_process_limit; 401 402#ifdef IXGBE_IEEE1588 403 /* IEEE 1588 precision time support */ 404 struct cyclecounter cycles; 405 struct nettimer clock; 406 struct nettime_compare compare; 407 struct hwtstamp_ctrl hwtstamp; 408#endif 409 410 /* Misc stats maintained by the driver */ 411 unsigned long dropped_pkts; 412 unsigned long mbuf_defrag_failed; 413 unsigned long mbuf_header_failed; 414 unsigned long mbuf_packet_failed; 415 unsigned long no_tx_map_avail; 416 unsigned long no_tx_dma_setup; 417 unsigned long watchdog_events; 418 unsigned long tso_tx; 419 unsigned long link_irq; 420 421 struct ixgbe_hw_stats stats; 422}; 423 424/* Precision Time Sync (IEEE 1588) defines */ 425#define ETHERTYPE_IEEE1588 0x88F7 426#define PICOSECS_PER_TICK 20833 427#define TSYNC_UDP_PORT 319 /* UDP port for the protocol */ 428#define IXGBE_ADVTXD_TSTAMP 0x00080000 429 430 431#define IXGBE_CORE_LOCK_INIT(_sc, _name) \ 432 mtx_init(&(_sc)->core_mtx, _name, "IXGBE Core Lock", MTX_DEF) 433#define IXGBE_CORE_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->core_mtx) 434#define IXGBE_TX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->tx_mtx) 435#define IXGBE_RX_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->rx_mtx) 436#define IXGBE_CORE_LOCK(_sc) mtx_lock(&(_sc)->core_mtx) 437#define IXGBE_TX_LOCK(_sc) mtx_lock(&(_sc)->tx_mtx) 438#define IXGBE_TX_TRYLOCK(_sc) mtx_trylock(&(_sc)->tx_mtx) 439#define IXGBE_RX_LOCK(_sc) mtx_lock(&(_sc)->rx_mtx) 440#define IXGBE_CORE_UNLOCK(_sc) mtx_unlock(&(_sc)->core_mtx) 441#define IXGBE_TX_UNLOCK(_sc) mtx_unlock(&(_sc)->tx_mtx) 442#define IXGBE_RX_UNLOCK(_sc) mtx_unlock(&(_sc)->rx_mtx) 443#define IXGBE_CORE_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->core_mtx, MA_OWNED) 444#define IXGBE_TX_LOCK_ASSERT(_sc) mtx_assert(&(_sc)->tx_mtx, MA_OWNED) 445 446 447static inline bool 448ixgbe_is_sfp(struct ixgbe_hw *hw) 449{ 450 switch (hw->phy.type) { 451 case ixgbe_phy_sfp_avago: 452 case ixgbe_phy_sfp_ftl: 453 case ixgbe_phy_sfp_intel: 454 case ixgbe_phy_sfp_unknown: 455 case ixgbe_phy_tw_tyco: 456 case ixgbe_phy_tw_unknown: 457 return TRUE; 458 default: 459 return FALSE; 460 } 461} 462 463#endif /* _IXGBE_H_ */ 464