ixgbe.h revision 171411 
1/**************************************************************************
2
3Copyright (c) 2001-2007, Intel Corporation
4All rights reserved.
5
6Redistribution and use in source and binary forms, with or without
7modification, are permitted provided that the following conditions are met:
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9 1. Redistributions of source code must retain the above copyright notice,
10    this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13    notice, this list of conditions and the following disclaimer in the
14    documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17    contributors may be used to endorse or promote products derived from
18    this software without specific prior written permission.
19
20THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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26SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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28CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30POSSIBILITY OF SUCH DAMAGE.
31
32***************************************************************************/
33/* $FreeBSD: head/sys/dev/ixgbe/ixgbe.h 171384 2007-07-11 23:03:16Z jfv $ */
34
35#ifndef _IXGBE_H_
36#define _IXGBE_H_
37
38
39#include <sys/param.h>
40#include <sys/systm.h>
41#include <sys/mbuf.h>
42#include <sys/protosw.h>
43#include <sys/socket.h>
44#include <sys/malloc.h>
45#include <sys/kernel.h>
46#include <sys/module.h>
47#include <sys/sockio.h>
48
49#include <net/if.h>
50#include <net/if_arp.h>
51#include <net/bpf.h>
52#include <net/ethernet.h>
53#include <net/if_dl.h>
54#include <net/if_media.h>
55
56#include <net/bpf.h>
57#include <net/if_types.h>
58#include <net/if_vlan_var.h>
59
60#include <netinet/in_systm.h>
61#include <netinet/in.h>
62#include <netinet/if_ether.h>
63#include <netinet/ip.h>
64#include <netinet/ip6.h>
65#include <netinet/tcp.h>
66#include <netinet/udp.h>
67
68#include <machine/in_cksum.h>
69
70#include <sys/bus.h>
71#include <machine/bus.h>
72#include <sys/rman.h>
73#include <machine/resource.h>
74#include <vm/vm.h>
75#include <vm/pmap.h>
76#include <machine/clock.h>
77#include <dev/pci/pcivar.h>
78#include <dev/pci/pcireg.h>
79#include <sys/proc.h>
80#include <sys/sysctl.h>
81#include <sys/endian.h>
82#include <sys/taskqueue.h>
83
84#include "ixgbe_api.h"
85
86/* Tunables */
87
88/*
89** The number of queues: right now significant performance
90** seems to be gained by using muliple RX queues. The
91** infrastructure for multiple TX is there but its not
92** completely working, dont set greater than 1 for now.
93** OTHER is the vector used for link changes, it also
94** should only be set to 1.
95*/
96#define IXGBE_TX_QUEUES 1
97#define IXGBE_RX_QUEUES 8
98#define IXGBE_OTHER	1
99
100/*
101 * TxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
102 * number of transmit descriptors allocated by the driver. Increasing this
103 * value allows the driver to queue more transmits. Each descriptor is 16
104 * bytes.
105 */
106#define DEFAULT_TXD	2048
107#define MAX_TXD		4096
108#define MIN_TXD		64
109
110/*
111 * RxDescriptors Valid Range: 64-4096 Default Value: 2048 This value is the
112 * number of receive descriptors allocated by the driver. Increasing this
113 * value allows the driver to buffer more incoming packets. Each descriptor
114 * is 16 bytes.  A receive buffer is also allocated for each descriptor. The
115 * maximum MTU size is 16110.
116 *
117 */
118#define DEFAULT_RXD	2048
119#define MAX_RXD		4096
120#define MIN_RXD		64
121
122/*
123 * This parameter controls the maximum no of times the driver will loop in
124 * the isr. Minimum Value = 1
125 */
126#define MAX_INTR	10
127
128/*
129 * This parameter controls the duration of transmit watchdog timer.
130 */
131#define IXGBE_TX_TIMEOUT                   5	/* set to 5 seconds */
132
133/*
134 * This parameters control when the driver calls the routine to reclaim
135 * transmit descriptors.
136 */
137#define IXGBE_TX_CLEANUP_THRESHOLD	(adapter->num_tx_desc / 8)
138#define IXGBE_TX_OP_THRESHOLD		(adapter->num_tx_desc / 32)
139
140#define IXGBE_MAX_FRAME_SIZE	0x3F00
141#define PERFORMANCE_MTU		9000	/* Best thruput results */
142
143/*
144** This controls the size mbuf pool used, it
145** may ultimately be automatic, but for now its
146** a compile time option.
147**	- use MCLBYTES for legacy size
148*/
149#define IXGBE_RXBUF		MJUMPAGESIZE
150
151/* Defines for printing debug information */
152#define DEBUG_INIT  0
153#define DEBUG_IOCTL 0
154#define DEBUG_HW    0
155
156#define INIT_DEBUGOUT(S)            if (DEBUG_INIT)  printf(S "\n")
157#define INIT_DEBUGOUT1(S, A)        if (DEBUG_INIT)  printf(S "\n", A)
158#define INIT_DEBUGOUT2(S, A, B)     if (DEBUG_INIT)  printf(S "\n", A, B)
159#define IOCTL_DEBUGOUT(S)           if (DEBUG_IOCTL) printf(S "\n")
160#define IOCTL_DEBUGOUT1(S, A)       if (DEBUG_IOCTL) printf(S "\n", A)
161#define IOCTL_DEBUGOUT2(S, A, B)    if (DEBUG_IOCTL) printf(S "\n", A, B)
162#define HW_DEBUGOUT(S)              if (DEBUG_HW) printf(S "\n")
163#define HW_DEBUGOUT1(S, A)          if (DEBUG_HW) printf(S "\n", A)
164#define HW_DEBUGOUT2(S, A, B)       if (DEBUG_HW) printf(S "\n", A, B)
165
166#define MAX_NUM_MULTICAST_ADDRESSES     128
167#define IXGBE_MAX_SCATTER		100
168#define	IXGBE_MMBA			0x0010
169#define IXGBE_TSO_SIZE			65535
170#define IXGBE_TX_BUFFER_SIZE		((u32) 1514)
171#define IXGBE_RX_HDR_SIZE		((u32) 256)
172#define CSUM_OFFLOAD			7	/* Bits in csum flags */
173
174/* The number of MSIX messages the 82598 supports */
175#define IXGBE_MSGS			18
176
177/*
178 * Interrupt Moderation parameters
179 * 	for now we hardcode, later
180 *	it would be nice to do dynamic
181 */
182#define DEFAULT_ITR	8000
183#define LINK_ITR	1950
184
185/*
186 * ******************************************************************************
187 * vendor_info_array
188 *
189 * This array contains the list of Subvendor/Subdevice IDs on which the driver
190 * should load.
191 *
192*****************************************************************************
193 */
194typedef struct _ixgbe_vendor_info_t {
195	unsigned int    vendor_id;
196	unsigned int    device_id;
197	unsigned int    subvendor_id;
198	unsigned int    subdevice_id;
199	unsigned int    index;
200}               ixgbe_vendor_info_t;
201
202
203struct ixgbe_tx_buf {
204	int		next_eop;
205	struct mbuf	*m_head;
206	bus_dmamap_t	map;
207};
208
209struct ixgbe_rx_buf {
210	struct mbuf	*m_head;
211	boolean_t	bigbuf;
212	/* one small and one large map */
213	bus_dmamap_t	map[2];
214};
215
216/*
217 * Bus dma allocation structure used by ixgbe_dma_malloc and ixgbe_dma_free.
218 */
219struct ixgbe_dma_alloc {
220	bus_addr_t		dma_paddr;
221	caddr_t			dma_vaddr;
222	bus_dma_tag_t		dma_tag;
223	bus_dmamap_t		dma_map;
224	bus_dma_segment_t	dma_seg;
225	bus_size_t		dma_size;
226	int			dma_nseg;
227};
228
229/*
230 * The transmit ring, one per tx queue
231 */
232struct tx_ring {
233        struct adapter		*adapter;
234	u32			me;
235	struct mtx		mtx;
236	union ixgbe_adv_tx_desc	*tx_base;
237	struct ixgbe_dma_alloc	txdma;
238	uint32_t		next_avail_tx_desc;
239	uint32_t		next_tx_to_clean;
240	struct ixgbe_tx_buf	*tx_buffers;
241	volatile uint16_t	tx_avail;
242	uint32_t		txd_cmd;
243	bus_dma_tag_t		txtag;
244};
245
246
247/*
248 * The Receive ring, one per rx queue
249 */
250struct rx_ring {
251        struct adapter			*adapter;
252	u32				me;
253	struct mtx			mtx;
254	u32				payload;
255	union 	ixgbe_adv_rx_desc	*rx_base;
256	struct ixgbe_dma_alloc		rxdma;
257        unsigned int			last_cleaned;
258        unsigned int			next_to_check;
259	struct ixgbe_rx_buf		*rx_buffers;
260	bus_dma_tag_t			rxtag[2];
261	bus_dmamap_t			spare_map[2];
262	struct mbuf			*fmp;
263	struct mbuf			*lmp;
264	/* Soft stats */
265	u64				packet_count;
266	u64 				byte_count;
267};
268
269/* Our adapter structure */
270struct adapter {
271	struct ifnet	*ifp;
272	struct ixgbe_hw	hw;
273
274	/* FreeBSD operating-system-specific structures */
275	struct ixgbe_osdep	osdep;
276
277	struct device	*dev;
278	struct resource	*res_memory;
279	struct resource	*res_msix;
280
281	/*
282	 * Interrupt resources:
283	 *  Oplin has 20 MSIX messages
284	 *  so allocate that for now.
285	 */
286	void		*tag[IXGBE_MSGS];
287	struct resource *res[IXGBE_MSGS];
288	int		rid[IXGBE_MSGS];
289
290	struct ifmedia	media;
291	struct callout	timer;
292	int		watchdog_timer;
293	int		msix;
294	int		if_flags;
295	struct mtx	mtx;
296
297	/* Info about the board itself */
298	uint32_t       part_num;
299	boolean_t      link_active;
300	uint16_t       max_frame_size;
301	uint16_t       link_duplex;
302	uint32_t       tx_int_delay;
303	uint32_t       tx_abs_int_delay;
304	uint32_t       rx_int_delay;
305	uint32_t       rx_abs_int_delay;
306
307	/* Indicates the cluster size to use */
308	boolean_t	bigbufs;
309
310	/*
311	 * Transmit rings:
312	 *	Allocated at run time, an array of rings.
313	 */
314	struct tx_ring	*tx_rings;
315	int		num_tx_desc;
316	int		num_tx_queues;
317
318	/*
319	 * Receive rings:
320	 *	Allocated at run time, an array of rings.
321	 */
322	struct rx_ring	*rx_rings;
323	int		num_rx_desc;
324	int		num_rx_queues;
325	uint32_t	rx_process_limit;
326
327	/* Misc stats maintained by the driver */
328	unsigned long   dropped_pkts;
329	unsigned long   mbuf_alloc_failed;
330	unsigned long   mbuf_cluster_failed;
331	unsigned long   no_tx_desc_avail1;
332	unsigned long   no_tx_desc_avail2;
333	unsigned long   no_tx_map_avail;
334	unsigned long   no_tx_dma_setup;
335	unsigned long   watchdog_events;
336	unsigned long   tso_tx;
337
338	struct ixgbe_hw_stats stats;
339};
340
341#define IXGBE_LOCK_INIT(_sc, _name) \
342	mtx_init(&(_sc)->mtx, _name, MTX_NETWORK_LOCK, MTX_DEF)
343#define IXGBE_LOCK_DESTROY(_sc)	mtx_destroy(&(_sc)->mtx)
344#define IXGBE_LOCK(_sc)		mtx_lock(&(_sc)->mtx)
345#define IXGBE_UNLOCK(_sc)	mtx_unlock(&(_sc)->mtx)
346#define IXGBE_LOCK_ASSERT(_sc)	mtx_assert(&(_sc)->mtx, MA_OWNED)
347
348#endif /* _IXGBE_H_ */
349