1/* $FreeBSD$ */ 2/*- 3 * Copyright (c) 1997-2009 by Matthew Jacob 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 */ 29 30/* 31 * Mailbox and Queue Entry Definitions for for Qlogic ISP SCSI adapters. 32 */ 33#ifndef _ISPMBOX_H 34#define _ISPMBOX_H 35 36/* 37 * Mailbox Command Opcodes 38 */ 39#define MBOX_NO_OP 0x0000 40#define MBOX_LOAD_RAM 0x0001 41#define MBOX_EXEC_FIRMWARE 0x0002 42#define MBOX_DUMP_RAM 0x0003 43#define MBOX_WRITE_RAM_WORD 0x0004 44#define MBOX_READ_RAM_WORD 0x0005 45#define MBOX_MAILBOX_REG_TEST 0x0006 46#define MBOX_VERIFY_CHECKSUM 0x0007 47#define MBOX_ABOUT_FIRMWARE 0x0008 48#define MBOX_LOAD_RISC_RAM_2100 0x0009 49 /* a */ 50#define MBOX_LOAD_RISC_RAM 0x000b 51 /* c */ 52#define MBOX_WRITE_RAM_WORD_EXTENDED 0x000d 53#define MBOX_CHECK_FIRMWARE 0x000e 54#define MBOX_READ_RAM_WORD_EXTENDED 0x000f 55#define MBOX_INIT_REQ_QUEUE 0x0010 56#define MBOX_INIT_RES_QUEUE 0x0011 57#define MBOX_EXECUTE_IOCB 0x0012 58#define MBOX_WAKE_UP 0x0013 59#define MBOX_STOP_FIRMWARE 0x0014 60#define MBOX_ABORT 0x0015 61#define MBOX_ABORT_DEVICE 0x0016 62#define MBOX_ABORT_TARGET 0x0017 63#define MBOX_BUS_RESET 0x0018 64#define MBOX_STOP_QUEUE 0x0019 65#define MBOX_START_QUEUE 0x001a 66#define MBOX_SINGLE_STEP_QUEUE 0x001b 67#define MBOX_ABORT_QUEUE 0x001c 68#define MBOX_GET_DEV_QUEUE_STATUS 0x001d 69 /* 1e */ 70#define MBOX_GET_FIRMWARE_STATUS 0x001f 71#define MBOX_GET_INIT_SCSI_ID 0x0020 72#define MBOX_GET_SELECT_TIMEOUT 0x0021 73#define MBOX_GET_RETRY_COUNT 0x0022 74#define MBOX_GET_TAG_AGE_LIMIT 0x0023 75#define MBOX_GET_CLOCK_RATE 0x0024 76#define MBOX_GET_ACT_NEG_STATE 0x0025 77#define MBOX_GET_ASYNC_DATA_SETUP_TIME 0x0026 78#define MBOX_GET_SBUS_PARAMS 0x0027 79#define MBOX_GET_PCI_PARAMS MBOX_GET_SBUS_PARAMS 80#define MBOX_GET_TARGET_PARAMS 0x0028 81#define MBOX_GET_DEV_QUEUE_PARAMS 0x0029 82#define MBOX_GET_RESET_DELAY_PARAMS 0x002a 83 /* 2b */ 84 /* 2c */ 85 /* 2d */ 86 /* 2e */ 87 /* 2f */ 88#define MBOX_SET_INIT_SCSI_ID 0x0030 89#define MBOX_SET_SELECT_TIMEOUT 0x0031 90#define MBOX_SET_RETRY_COUNT 0x0032 91#define MBOX_SET_TAG_AGE_LIMIT 0x0033 92#define MBOX_SET_CLOCK_RATE 0x0034 93#define MBOX_SET_ACT_NEG_STATE 0x0035 94#define MBOX_SET_ASYNC_DATA_SETUP_TIME 0x0036 95#define MBOX_SET_SBUS_CONTROL_PARAMS 0x0037 96#define MBOX_SET_PCI_PARAMETERS 0x0037 97#define MBOX_SET_TARGET_PARAMS 0x0038 98#define MBOX_SET_DEV_QUEUE_PARAMS 0x0039 99#define MBOX_SET_RESET_DELAY_PARAMS 0x003a 100 /* 3b */ 101 /* 3c */ 102 /* 3d */ 103 /* 3e */ 104 /* 3f */ 105#define MBOX_RETURN_BIOS_BLOCK_ADDR 0x0040 106#define MBOX_WRITE_FOUR_RAM_WORDS 0x0041 107#define MBOX_EXEC_BIOS_IOCB 0x0042 108#define MBOX_SET_FW_FEATURES 0x004a 109#define MBOX_GET_FW_FEATURES 0x004b 110#define FW_FEATURE_FAST_POST 0x1 111#define FW_FEATURE_LVD_NOTIFY 0x2 112#define FW_FEATURE_RIO_32BIT 0x4 113#define FW_FEATURE_RIO_16BIT 0x8 114 115#define MBOX_INIT_REQ_QUEUE_A64 0x0052 116#define MBOX_INIT_RES_QUEUE_A64 0x0053 117 118#define MBOX_ENABLE_TARGET_MODE 0x0055 119#define ENABLE_TARGET_FLAG 0x8000 120#define ENABLE_TQING_FLAG 0x0004 121#define ENABLE_MANDATORY_DISC 0x0002 122#define MBOX_GET_TARGET_STATUS 0x0056 123 124/* These are for the ISP2X00 FC cards */ 125#define MBOX_GET_LOOP_ID 0x0020 126/* for 24XX cards, outgoing mailbox 7 has these values for F or FL topologies */ 127#define ISP24XX_INORDER 0x0100 128#define ISP24XX_NPIV_SAN 0x0400 129#define ISP24XX_VSAN_SAN 0x1000 130#define ISP24XX_FC_SP_SAN 0x2000 131 132#define MBOX_GET_FIRMWARE_OPTIONS 0x0028 133#define MBOX_SET_FIRMWARE_OPTIONS 0x0038 134#define MBOX_GET_RESOURCE_COUNT 0x0042 135#define MBOX_REQUEST_OFFLINE_MODE 0x0043 136#define MBOX_ENHANCED_GET_PDB 0x0047 137#define MBOX_INIT_FIRMWARE_MULTI_ID 0x0048 /* 2400 only */ 138#define MBOX_GET_VP_DATABASE 0x0049 /* 2400 only */ 139#define MBOX_GET_VP_DATABASE_ENTRY 0x004a /* 2400 only */ 140#define MBOX_EXEC_COMMAND_IOCB_A64 0x0054 141#define MBOX_INIT_FIRMWARE 0x0060 142#define MBOX_GET_INIT_CONTROL_BLOCK 0x0061 143#define MBOX_INIT_LIP 0x0062 144#define MBOX_GET_FC_AL_POSITION_MAP 0x0063 145#define MBOX_GET_PORT_DB 0x0064 146#define MBOX_CLEAR_ACA 0x0065 147#define MBOX_TARGET_RESET 0x0066 148#define MBOX_CLEAR_TASK_SET 0x0067 149#define MBOX_ABORT_TASK_SET 0x0068 150#define MBOX_GET_FW_STATE 0x0069 151#define MBOX_GET_PORT_NAME 0x006A 152#define MBOX_GET_LINK_STATUS 0x006B 153#define MBOX_INIT_LIP_RESET 0x006C 154#define MBOX_SEND_SNS 0x006E 155#define MBOX_FABRIC_LOGIN 0x006F 156#define MBOX_SEND_CHANGE_REQUEST 0x0070 157#define MBOX_FABRIC_LOGOUT 0x0071 158#define MBOX_INIT_LIP_LOGIN 0x0072 159#define MBOX_LUN_RESET 0x007E 160 161#define MBOX_DRIVER_HEARTBEAT 0x005B 162#define MBOX_FW_HEARTBEAT 0x005C 163 164#define MBOX_GET_SET_DATA_RATE 0x005D /* 24XX/23XX only */ 165#define MBGSD_GET_RATE 0 166#define MBGSD_SET_RATE 1 167#define MBGSD_SET_RATE_NOW 2 /* 24XX only */ 168#define MBGSD_ONEGB 0 169#define MBGSD_TWOGB 1 170#define MBGSD_AUTO 2 171#define MBGSD_FOURGB 3 /* 24XX only */ 172#define MBGSD_EIGHTGB 4 /* 25XX only */ 173 174 175#define ISP2100_SET_PCI_PARAM 0x00ff 176 177#define MBOX_BUSY 0x04 178 179/* 180 * Mailbox Command Complete Status Codes 181 */ 182#define MBOX_COMMAND_COMPLETE 0x4000 183#define MBOX_INVALID_COMMAND 0x4001 184#define MBOX_HOST_INTERFACE_ERROR 0x4002 185#define MBOX_TEST_FAILED 0x4003 186#define MBOX_COMMAND_ERROR 0x4005 187#define MBOX_COMMAND_PARAM_ERROR 0x4006 188#define MBOX_PORT_ID_USED 0x4007 189#define MBOX_LOOP_ID_USED 0x4008 190#define MBOX_ALL_IDS_USED 0x4009 191#define MBOX_NOT_LOGGED_IN 0x400A 192/* pseudo mailbox completion codes */ 193#define MBOX_REGS_BUSY 0x6000 /* registers in use */ 194#define MBOX_TIMEOUT 0x6001 /* command timed out */ 195 196#define MBLOGALL 0x000f 197#define MBLOGNONE 0x0000 198#define MBLOGMASK(x) ((x) & 0xf) 199 200/* 201 * Asynchronous event status codes 202 */ 203#define ASYNC_BUS_RESET 0x8001 204#define ASYNC_SYSTEM_ERROR 0x8002 205#define ASYNC_RQS_XFER_ERR 0x8003 206#define ASYNC_RSP_XFER_ERR 0x8004 207#define ASYNC_QWAKEUP 0x8005 208#define ASYNC_TIMEOUT_RESET 0x8006 209#define ASYNC_DEVICE_RESET 0x8007 210#define ASYNC_EXTMSG_UNDERRUN 0x800A 211#define ASYNC_SCAM_INT 0x800B 212#define ASYNC_HUNG_SCSI 0x800C 213#define ASYNC_KILLED_BUS 0x800D 214#define ASYNC_BUS_TRANSIT 0x800E /* LVD -> HVD, eg. */ 215#define ASYNC_LIP_OCCURRED 0x8010 216#define ASYNC_LOOP_UP 0x8011 217#define ASYNC_LOOP_DOWN 0x8012 218#define ASYNC_LOOP_RESET 0x8013 219#define ASYNC_PDB_CHANGED 0x8014 220#define ASYNC_CHANGE_NOTIFY 0x8015 221#define ASYNC_LIP_F8 0x8016 222#define ASYNC_LIP_ERROR 0x8017 223#define ASYNC_SECURITY_UPDATE 0x801B 224#define ASYNC_CMD_CMPLT 0x8020 225#define ASYNC_CTIO_DONE 0x8021 226#define ASYNC_RIO32_1 0x8021 227#define ASYNC_RIO32_2 0x8022 228#define ASYNC_IP_XMIT_DONE 0x8022 229#define ASYNC_IP_RECV_DONE 0x8023 230#define ASYNC_IP_BROADCAST 0x8024 231#define ASYNC_IP_RCVQ_LOW 0x8025 232#define ASYNC_IP_RCVQ_EMPTY 0x8026 233#define ASYNC_IP_RECV_DONE_ALIGNED 0x8027 234#define ASYNC_PTPMODE 0x8030 235#define ASYNC_RIO16_1 0x8031 236#define ASYNC_RIO16_2 0x8032 237#define ASYNC_RIO16_3 0x8033 238#define ASYNC_RIO16_4 0x8034 239#define ASYNC_RIO16_5 0x8035 240#define ASYNC_CONNMODE 0x8036 241#define ISP_CONN_LOOP 1 242#define ISP_CONN_PTP 2 243#define ISP_CONN_BADLIP 3 244#define ISP_CONN_FATAL 4 245#define ISP_CONN_LOOPBACK 5 246#define ASYNC_RIOZIO_STALL 0x8040 /* there's a RIO/ZIO entry that hasn't been serviced */ 247#define ASYNC_RIO32_2_2200 0x8042 /* same as ASYNC_RIO32_2, but for 2100/2200 */ 248#define ASYNC_RCV_ERR 0x8048 249 250/* 251 * Firmware Options. There are a lot of them. 252 * 253 * IFCOPTN - ISP Fibre Channel Option Word N 254 */ 255#define IFCOPT1_EQFQASYNC (1 << 13) /* enable QFULL notification */ 256#define IFCOPT1_EAABSRCVD (1 << 12) 257#define IFCOPT1_RJTASYNC (1 << 11) /* enable 8018 notification */ 258#define IFCOPT1_ENAPURE (1 << 10) 259#define IFCOPT1_ENA8017 (1 << 7) 260#define IFCOPT1_DISGPIO67 (1 << 6) 261#define IFCOPT1_LIPLOSSIMM (1 << 5) 262#define IFCOPT1_DISF7SWTCH (1 << 4) 263#define IFCOPT1_CTIO_RETRY (1 << 3) 264#define IFCOPT1_LIPASYNC (1 << 1) 265#define IFCOPT1_LIPF8 (1 << 0) 266 267#define IFCOPT2_LOOPBACK (1 << 1) 268#define IFCOPT2_ATIO3_ONLY (1 << 0) 269 270#define IFCOPT3_NOPRLI (1 << 4) /* disable automatic sending of PRLI on local loops */ 271#define IFCOPT3_RNDASYNC (1 << 1) 272/* 273 * 2.01.31 2200 Only. Need Bit 13 in Mailbox 1 for Set Firmware Options 274 * mailbox command to enable this. 275 */ 276#define ASYNC_QFULL_SENT 0x8049 277 278/* 279 * Needs to be enabled 280 */ 281#define ASYNC_AUTO_PLOGI_RJT 0x8018 282/* 283 * 24XX only 284 */ 285#define ASYNC_RJT_SENT 0x8049 286 287/* 288 * All IOCB Queue entries are this size 289 */ 290#define QENTRY_LEN 64 291 292/* 293 * Command Structure Definitions 294 */ 295 296typedef struct { 297 uint32_t ds_base; 298 uint32_t ds_count; 299} ispds_t; 300 301typedef struct { 302 uint32_t ds_base; 303 uint32_t ds_basehi; 304 uint32_t ds_count; 305} ispds64_t; 306 307#define DSTYPE_32BIT 0 308#define DSTYPE_64BIT 1 309typedef struct { 310 uint16_t ds_type; /* 0-> ispds_t, 1-> ispds64_t */ 311 uint32_t ds_segment; /* unused */ 312 uint32_t ds_base; /* 32 bit address of DSD list */ 313} ispdslist_t; 314 315 316typedef struct { 317 uint8_t rqs_entry_type; 318 uint8_t rqs_entry_count; 319 uint8_t rqs_seqno; 320 uint8_t rqs_flags; 321} isphdr_t; 322 323/* RQS Flag definitions */ 324#define RQSFLAG_CONTINUATION 0x01 325#define RQSFLAG_FULL 0x02 326#define RQSFLAG_BADHEADER 0x04 327#define RQSFLAG_BADPACKET 0x08 328#define RQSFLAG_BADCOUNT 0x10 329#define RQSFLAG_BADORDER 0x20 330#define RQSFLAG_MASK 0x3f 331 332/* RQS entry_type definitions */ 333#define RQSTYPE_REQUEST 0x01 334#define RQSTYPE_DATASEG 0x02 335#define RQSTYPE_RESPONSE 0x03 336#define RQSTYPE_MARKER 0x04 337#define RQSTYPE_CMDONLY 0x05 338#define RQSTYPE_ATIO 0x06 /* Target Mode */ 339#define RQSTYPE_CTIO 0x07 /* Target Mode */ 340#define RQSTYPE_SCAM 0x08 341#define RQSTYPE_A64 0x09 342#define RQSTYPE_A64_CONT 0x0a 343#define RQSTYPE_ENABLE_LUN 0x0b /* Target Mode */ 344#define RQSTYPE_MODIFY_LUN 0x0c /* Target Mode */ 345#define RQSTYPE_NOTIFY 0x0d /* Target Mode */ 346#define RQSTYPE_NOTIFY_ACK 0x0e /* Target Mode */ 347#define RQSTYPE_CTIO1 0x0f /* Target Mode */ 348#define RQSTYPE_STATUS_CONT 0x10 349#define RQSTYPE_T2RQS 0x11 350#define RQSTYPE_CTIO7 0x12 351#define RQSTYPE_IP_XMIT 0x13 352#define RQSTYPE_TSK_MGMT 0x14 353#define RQSTYPE_T4RQS 0x15 354#define RQSTYPE_ATIO2 0x16 /* Target Mode */ 355#define RQSTYPE_CTIO2 0x17 /* Target Mode */ 356#define RQSTYPE_T7RQS 0x18 357#define RQSTYPE_T3RQS 0x19 358#define RQSTYPE_IP_XMIT_64 0x1b 359#define RQSTYPE_CTIO4 0x1e /* Target Mode */ 360#define RQSTYPE_CTIO3 0x1f /* Target Mode */ 361#define RQSTYPE_RIO1 0x21 362#define RQSTYPE_RIO2 0x22 363#define RQSTYPE_IP_RECV 0x23 364#define RQSTYPE_IP_RECV_CONT 0x24 365#define RQSTYPE_CT_PASSTHRU 0x29 366#define RQSTYPE_MS_PASSTHRU 0x29 367#define RQSTYPE_VP_CTRL 0x30 /* 24XX only */ 368#define RQSTYPE_VP_MODIFY 0x31 /* 24XX only */ 369#define RQSTYPE_RPT_ID_ACQ 0x32 /* 24XX only */ 370#define RQSTYPE_ABORT_IO 0x33 371#define RQSTYPE_T6RQS 0x48 372#define RQSTYPE_LOGIN 0x52 373#define RQSTYPE_ABTS_RCVD 0x54 /* 24XX only */ 374#define RQSTYPE_ABTS_RSP 0x55 /* 24XX only */ 375 376 377#define ISP_RQDSEG 4 378typedef struct { 379 isphdr_t req_header; 380 uint32_t req_handle; 381 uint8_t req_lun_trn; 382 uint8_t req_target; 383 uint16_t req_cdblen; 384 uint16_t req_flags; 385 uint16_t req_reserved; 386 uint16_t req_time; 387 uint16_t req_seg_count; 388 uint8_t req_cdb[12]; 389 ispds_t req_dataseg[ISP_RQDSEG]; 390} ispreq_t; 391#define ISP_RQDSEG_A64 2 392 393typedef struct { 394 isphdr_t mrk_header; 395 uint32_t mrk_handle; 396 uint8_t mrk_reserved0; 397 uint8_t mrk_target; 398 uint16_t mrk_modifier; 399 uint16_t mrk_flags; 400 uint16_t mrk_lun; 401 uint8_t mrk_reserved1[48]; 402} isp_marker_t; 403 404typedef struct { 405 isphdr_t mrk_header; 406 uint32_t mrk_handle; 407 uint16_t mrk_nphdl; 408 uint8_t mrk_modifier; 409 uint8_t mrk_reserved0; 410 uint8_t mrk_reserved1; 411 uint8_t mrk_vphdl; 412 uint16_t mrk_reserved2; 413 uint8_t mrk_lun[8]; 414 uint8_t mrk_reserved3[40]; 415} isp_marker_24xx_t; 416 417 418#define SYNC_DEVICE 0 419#define SYNC_TARGET 1 420#define SYNC_ALL 2 421#define SYNC_LIP 3 422 423#define ISP_RQDSEG_T2 3 424typedef struct { 425 isphdr_t req_header; 426 uint32_t req_handle; 427 uint8_t req_lun_trn; 428 uint8_t req_target; 429 uint16_t req_scclun; 430 uint16_t req_flags; 431 uint8_t req_crn; 432 uint8_t req_reserved; 433 uint16_t req_time; 434 uint16_t req_seg_count; 435 uint8_t req_cdb[16]; 436 uint32_t req_totalcnt; 437 ispds_t req_dataseg[ISP_RQDSEG_T2]; 438} ispreqt2_t; 439 440typedef struct { 441 isphdr_t req_header; 442 uint32_t req_handle; 443 uint16_t req_target; 444 uint16_t req_scclun; 445 uint16_t req_flags; 446 uint16_t req_reserved; 447 uint16_t req_time; 448 uint16_t req_seg_count; 449 uint8_t req_cdb[16]; 450 uint32_t req_totalcnt; 451 ispds_t req_dataseg[ISP_RQDSEG_T2]; 452} ispreqt2e_t; 453 454#define ISP_RQDSEG_T3 2 455typedef struct { 456 isphdr_t req_header; 457 uint32_t req_handle; 458 uint8_t req_lun_trn; 459 uint8_t req_target; 460 uint16_t req_scclun; 461 uint16_t req_flags; 462 uint8_t req_crn; 463 uint8_t req_reserved; 464 uint16_t req_time; 465 uint16_t req_seg_count; 466 uint8_t req_cdb[16]; 467 uint32_t req_totalcnt; 468 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 469} ispreqt3_t; 470#define ispreq64_t ispreqt3_t /* same as.... */ 471 472typedef struct { 473 isphdr_t req_header; 474 uint32_t req_handle; 475 uint16_t req_target; 476 uint16_t req_scclun; 477 uint16_t req_flags; 478 uint8_t req_crn; 479 uint8_t req_reserved; 480 uint16_t req_time; 481 uint16_t req_seg_count; 482 uint8_t req_cdb[16]; 483 uint32_t req_totalcnt; 484 ispds64_t req_dataseg[ISP_RQDSEG_T3]; 485} ispreqt3e_t; 486 487/* req_flag values */ 488#define REQFLAG_NODISCON 0x0001 489#define REQFLAG_HTAG 0x0002 490#define REQFLAG_OTAG 0x0004 491#define REQFLAG_STAG 0x0008 492#define REQFLAG_TARGET_RTN 0x0010 493 494#define REQFLAG_NODATA 0x0000 495#define REQFLAG_DATA_IN 0x0020 496#define REQFLAG_DATA_OUT 0x0040 497#define REQFLAG_DATA_UNKNOWN 0x0060 498 499#define REQFLAG_DISARQ 0x0100 500#define REQFLAG_FRC_ASYNC 0x0200 501#define REQFLAG_FRC_SYNC 0x0400 502#define REQFLAG_FRC_WIDE 0x0800 503#define REQFLAG_NOPARITY 0x1000 504#define REQFLAG_STOPQ 0x2000 505#define REQFLAG_XTRASNS 0x4000 506#define REQFLAG_PRIORITY 0x8000 507 508typedef struct { 509 isphdr_t req_header; 510 uint32_t req_handle; 511 uint8_t req_lun_trn; 512 uint8_t req_target; 513 uint16_t req_cdblen; 514 uint16_t req_flags; 515 uint16_t req_reserved; 516 uint16_t req_time; 517 uint16_t req_seg_count; 518 uint8_t req_cdb[44]; 519} ispextreq_t; 520 521 522/* 523 * ISP24XX structures 524 */ 525typedef struct { 526 isphdr_t req_header; 527 uint32_t req_handle; 528 uint16_t req_nphdl; 529 uint16_t req_time; 530 uint16_t req_seg_count; 531 uint16_t req_reserved; 532 uint8_t req_lun[8]; 533 uint8_t req_alen_datadir; 534 uint8_t req_task_management; 535 uint8_t req_task_attribute; 536 uint8_t req_crn; 537 uint8_t req_cdb[16]; 538 uint32_t req_dl; 539 uint16_t req_tidlo; 540 uint8_t req_tidhi; 541 uint8_t req_vpidx; 542 ispds64_t req_dataseg; 543} ispreqt7_t; 544 545/* Task Management Request Function */ 546typedef struct { 547 isphdr_t tmf_header; 548 uint32_t tmf_handle; 549 uint16_t tmf_nphdl; 550 uint8_t tmf_reserved0[2]; 551 uint16_t tmf_delay; 552 uint16_t tmf_timeout; 553 uint8_t tmf_lun[8]; 554 uint32_t tmf_flags; 555 uint8_t tmf_reserved1[20]; 556 uint16_t tmf_tidlo; 557 uint8_t tmf_tidhi; 558 uint8_t tmf_vpidx; 559 uint8_t tmf_reserved2[12]; 560} isp24xx_tmf_t; 561 562#define ISP24XX_TMF_NOSEND 0x80000000 563 564#define ISP24XX_TMF_LUN_RESET 0x00000010 565#define ISP24XX_TMF_ABORT_TASK_SET 0x00000008 566#define ISP24XX_TMF_CLEAR_TASK_SET 0x00000004 567#define ISP24XX_TMF_TARGET_RESET 0x00000002 568#define ISP24XX_TMF_CLEAR_ACA 0x00000001 569 570/* I/O Abort Structure */ 571typedef struct { 572 isphdr_t abrt_header; 573 uint32_t abrt_handle; 574 uint16_t abrt_nphdl; 575 uint16_t abrt_options; 576 uint32_t abrt_cmd_handle; 577 uint8_t abrt_reserved[32]; 578 uint16_t abrt_tidlo; 579 uint8_t abrt_tidhi; 580 uint8_t abrt_vpidx; 581 uint8_t abrt_reserved1[12]; 582} isp24xx_abrt_t; 583 584#define ISP24XX_ABRT_NOSEND 0x01 /* don't actually send ABTS */ 585#define ISP24XX_ABRT_OKAY 0x00 /* in nphdl on return */ 586#define ISP24XX_ABRT_ENXIO 0x31 /* in nphdl on return */ 587 588#define ISP_CDSEG 7 589typedef struct { 590 isphdr_t req_header; 591 uint32_t req_reserved; 592 ispds_t req_dataseg[ISP_CDSEG]; 593} ispcontreq_t; 594 595#define ISP_CDSEG64 5 596typedef struct { 597 isphdr_t req_header; 598 ispds64_t req_dataseg[ISP_CDSEG64]; 599} ispcontreq64_t; 600 601typedef struct { 602 isphdr_t req_header; 603 uint32_t req_handle; 604 uint16_t req_scsi_status; 605 uint16_t req_completion_status; 606 uint16_t req_state_flags; 607 uint16_t req_status_flags; 608 uint16_t req_time; 609#define req_response_len req_time /* FC only */ 610 uint16_t req_sense_len; 611 uint32_t req_resid; 612 uint8_t req_response[8]; /* FC only */ 613 uint8_t req_sense_data[32]; 614} ispstatusreq_t; 615 616/* 617 * Status Continuation 618 */ 619typedef struct { 620 isphdr_t req_header; 621 uint8_t req_sense_data[60]; 622} ispstatus_cont_t; 623 624/* 625 * 24XX Type 0 status 626 */ 627typedef struct { 628 isphdr_t req_header; 629 uint32_t req_handle; 630 uint16_t req_completion_status; 631 uint16_t req_oxid; 632 uint32_t req_resid; 633 uint16_t req_reserved0; 634 uint16_t req_state_flags; 635 uint16_t req_reserved1; 636 uint16_t req_scsi_status; 637 uint32_t req_fcp_residual; 638 uint32_t req_sense_len; 639 uint32_t req_response_len; 640 uint8_t req_rsp_sense[28]; 641} isp24xx_statusreq_t; 642 643/* 644 * For Qlogic 2X00, the high order byte of SCSI status has 645 * additional meaning. 646 */ 647#define RQCS_RU 0x800 /* Residual Under */ 648#define RQCS_RO 0x400 /* Residual Over */ 649#define RQCS_RESID (RQCS_RU|RQCS_RO) 650#define RQCS_SV 0x200 /* Sense Length Valid */ 651#define RQCS_RV 0x100 /* FCP Response Length Valid */ 652 653/* 654 * CT Passthru IOCB 655 */ 656typedef struct { 657 isphdr_t ctp_header; 658 uint32_t ctp_handle; 659 uint16_t ctp_status; 660 uint16_t ctp_nphdl; /* n-port handle */ 661 uint16_t ctp_cmd_cnt; /* Command DSD count */ 662 uint8_t ctp_vpidx; 663 uint8_t ctp_reserved0; 664 uint16_t ctp_time; 665 uint16_t ctp_reserved1; 666 uint16_t ctp_rsp_cnt; /* Response DSD count */ 667 uint16_t ctp_reserved2[5]; 668 uint32_t ctp_rsp_bcnt; /* Response byte count */ 669 uint32_t ctp_cmd_bcnt; /* Command byte count */ 670 ispds64_t ctp_dataseg[2]; 671} isp_ct_pt_t; 672 673/* 674 * MS Passthru IOCB 675 */ 676typedef struct { 677 isphdr_t ms_header; 678 uint32_t ms_handle; 679 uint16_t ms_nphdl; /* handle in high byte for !2k f/w */ 680 uint16_t ms_status; 681 uint16_t ms_flags; 682 uint16_t ms_reserved1; /* low 8 bits */ 683 uint16_t ms_time; 684 uint16_t ms_cmd_cnt; /* Command DSD count */ 685 uint16_t ms_tot_cnt; /* Total DSD Count */ 686 uint8_t ms_type; /* MS type */ 687 uint8_t ms_r_ctl; /* R_CTL */ 688 uint16_t ms_rxid; /* RX_ID */ 689 uint16_t ms_reserved2; 690 uint32_t ms_handle2; 691 uint32_t ms_rsp_bcnt; /* Response byte count */ 692 uint32_t ms_cmd_bcnt; /* Command byte count */ 693 ispds64_t ms_dataseg[2]; 694} isp_ms_t; 695 696/* 697 * Completion Status Codes. 698 */ 699#define RQCS_COMPLETE 0x0000 700#define RQCS_DMA_ERROR 0x0002 701#define RQCS_RESET_OCCURRED 0x0004 702#define RQCS_ABORTED 0x0005 703#define RQCS_TIMEOUT 0x0006 704#define RQCS_DATA_OVERRUN 0x0007 705#define RQCS_DATA_UNDERRUN 0x0015 706#define RQCS_QUEUE_FULL 0x001C 707 708/* 1X00 Only Completion Codes */ 709#define RQCS_INCOMPLETE 0x0001 710#define RQCS_TRANSPORT_ERROR 0x0003 711#define RQCS_COMMAND_OVERRUN 0x0008 712#define RQCS_STATUS_OVERRUN 0x0009 713#define RQCS_BAD_MESSAGE 0x000a 714#define RQCS_NO_MESSAGE_OUT 0x000b 715#define RQCS_EXT_ID_FAILED 0x000c 716#define RQCS_IDE_MSG_FAILED 0x000d 717#define RQCS_ABORT_MSG_FAILED 0x000e 718#define RQCS_REJECT_MSG_FAILED 0x000f 719#define RQCS_NOP_MSG_FAILED 0x0010 720#define RQCS_PARITY_ERROR_MSG_FAILED 0x0011 721#define RQCS_DEVICE_RESET_MSG_FAILED 0x0012 722#define RQCS_ID_MSG_FAILED 0x0013 723#define RQCS_UNEXP_BUS_FREE 0x0014 724#define RQCS_XACT_ERR1 0x0018 725#define RQCS_XACT_ERR2 0x0019 726#define RQCS_XACT_ERR3 0x001A 727#define RQCS_BAD_ENTRY 0x001B 728#define RQCS_PHASE_SKIPPED 0x001D 729#define RQCS_ARQS_FAILED 0x001E 730#define RQCS_WIDE_FAILED 0x001F 731#define RQCS_SYNCXFER_FAILED 0x0020 732#define RQCS_LVD_BUSERR 0x0021 733 734/* 2X00 Only Completion Codes */ 735#define RQCS_PORT_UNAVAILABLE 0x0028 736#define RQCS_PORT_LOGGED_OUT 0x0029 737#define RQCS_PORT_CHANGED 0x002A 738#define RQCS_PORT_BUSY 0x002B 739 740/* 24XX Only Completion Codes */ 741#define RQCS_24XX_DRE 0x0011 /* data reassembly error */ 742#define RQCS_24XX_TABORT 0x0013 /* aborted by target */ 743#define RQCS_24XX_ENOMEM 0x002C /* f/w resource unavailable */ 744#define RQCS_24XX_TMO 0x0030 /* task management overrun */ 745 746 747/* 748 * 1X00 specific State Flags 749 */ 750#define RQSF_GOT_BUS 0x0100 751#define RQSF_GOT_TARGET 0x0200 752#define RQSF_SENT_CDB 0x0400 753#define RQSF_XFRD_DATA 0x0800 754#define RQSF_GOT_STATUS 0x1000 755#define RQSF_GOT_SENSE 0x2000 756#define RQSF_XFER_COMPLETE 0x4000 757 758/* 759 * 2X00 specific State Flags 760 * (same as 1X00 except RQSF_GOT_BUS/RQSF_GOT_TARGET are not available) 761 */ 762#define RQSF_DATA_IN 0x0020 763#define RQSF_DATA_OUT 0x0040 764#define RQSF_STAG 0x0008 765#define RQSF_OTAG 0x0004 766#define RQSF_HTAG 0x0002 767/* 768 * 1X00 Status Flags 769 */ 770#define RQSTF_DISCONNECT 0x0001 771#define RQSTF_SYNCHRONOUS 0x0002 772#define RQSTF_PARITY_ERROR 0x0004 773#define RQSTF_BUS_RESET 0x0008 774#define RQSTF_DEVICE_RESET 0x0010 775#define RQSTF_ABORTED 0x0020 776#define RQSTF_TIMEOUT 0x0040 777#define RQSTF_NEGOTIATION 0x0080 778 779/* 780 * 2X00 specific state flags 781 */ 782/* RQSF_SENT_CDB */ 783/* RQSF_XFRD_DATA */ 784/* RQSF_GOT_STATUS */ 785/* RQSF_XFER_COMPLETE */ 786 787/* 788 * 2X00 specific status flags 789 */ 790/* RQSTF_ABORTED */ 791/* RQSTF_TIMEOUT */ 792#define RQSTF_DMA_ERROR 0x0080 793#define RQSTF_LOGOUT 0x2000 794 795/* 796 * Miscellaneous 797 */ 798#ifndef ISP_EXEC_THROTTLE 799#define ISP_EXEC_THROTTLE 16 800#endif 801 802/* 803 * About Firmware returns an 'attribute' word in mailbox 6. 804 * These attributes are for 2200 and 2300. 805 */ 806#define ISP_FW_ATTR_TMODE 0x0001 807#define ISP_FW_ATTR_SCCLUN 0x0002 808#define ISP_FW_ATTR_FABRIC 0x0004 809#define ISP_FW_ATTR_CLASS2 0x0008 810#define ISP_FW_ATTR_FCTAPE 0x0010 811#define ISP_FW_ATTR_IP 0x0020 812#define ISP_FW_ATTR_VI 0x0040 813#define ISP_FW_ATTR_VI_SOLARIS 0x0080 814#define ISP_FW_ATTR_2KLOGINS 0x0100 /* just a guess... */ 815 816/* and these are for the 2400 */ 817#define ISP2400_FW_ATTR_CLASS2 0x0001 818#define ISP2400_FW_ATTR_IP 0x0002 819#define ISP2400_FW_ATTR_MULTIID 0x0004 820#define ISP2400_FW_ATTR_SB2 0x0008 821#define ISP2400_FW_ATTR_T10CRC 0x0010 822#define ISP2400_FW_ATTR_VI 0x0020 823#define ISP2400_FW_ATTR_VP0 0x1000 824#define ISP2400_FW_ATTR_EXPFW 0x2000 825#define ISP2400_FW_ATTR_EXTNDED 0x8000 826 827/* 828 * These are either manifestly true or are dependent on f/w attributes 829 */ 830#define ISP_CAP_TMODE(isp) \ 831 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_TMODE)) 832#define ISP_CAP_SCCFW(isp) \ 833 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_SCCLUN)) 834#define ISP_CAP_2KLOGIN(isp) \ 835 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_2KLOGINS)) 836 837/* 838 * This is only true for 24XX cards with this f/w attribute 839 */ 840#define ISP_CAP_MULTI_ID(isp) \ 841 (IS_24XX(isp)? (isp->isp_fwattr & ISP2400_FW_ATTR_MULTIID) : 0) 842#define ISP_GET_VPIDX(isp, tag) \ 843 (ISP_CAP_MULTI_ID(isp) ? tag : 0) 844 845/* 846 * This is true manifestly or is dependent on a f/w attribute 847 * but may or may not actually be *enabled*. In any case, it 848 * is enabled on a per-channel basis. 849 */ 850#define ISP_CAP_FCTAPE(isp) \ 851 (IS_24XX(isp)? 1 : (isp->isp_fwattr & ISP_FW_ATTR_FCTAPE)) 852 853#define ISP_FCTAPE_ENABLED(isp, chan) \ 854 (IS_24XX(isp)? (FCPARAM(isp, chan)->isp_xfwoptions & ICB2400_OPT2_FCTAPE) != 0 : (FCPARAM(isp, chan)->isp_xfwoptions & ICBXOPT_FCTAPE) != 0) 855 856/* 857 * Reduced Interrupt Operation Response Queue Entries 858 */ 859 860typedef struct { 861 isphdr_t req_header; 862 uint32_t req_handles[15]; 863} isp_rio1_t; 864 865typedef struct { 866 isphdr_t req_header; 867 uint16_t req_handles[30]; 868} isp_rio2_t; 869 870/* 871 * FC (ISP2100/ISP2200/ISP2300/ISP2400) specific data structures 872 */ 873 874/* 875 * Initialization Control Block 876 * 877 * Version One (prime) format. 878 */ 879typedef struct { 880 uint8_t icb_version; 881 uint8_t icb_reserved0; 882 uint16_t icb_fwoptions; 883 uint16_t icb_maxfrmlen; 884 uint16_t icb_maxalloc; 885 uint16_t icb_execthrottle; 886 uint8_t icb_retry_count; 887 uint8_t icb_retry_delay; 888 uint8_t icb_portname[8]; 889 uint16_t icb_hardaddr; 890 uint8_t icb_iqdevtype; 891 uint8_t icb_logintime; 892 uint8_t icb_nodename[8]; 893 uint16_t icb_rqstout; 894 uint16_t icb_rspnsin; 895 uint16_t icb_rqstqlen; 896 uint16_t icb_rsltqlen; 897 uint16_t icb_rqstaddr[4]; 898 uint16_t icb_respaddr[4]; 899 uint16_t icb_lunenables; 900 uint8_t icb_ccnt; 901 uint8_t icb_icnt; 902 uint16_t icb_lunetimeout; 903 uint16_t icb_reserved1; 904 uint16_t icb_xfwoptions; 905 uint8_t icb_racctimer; 906 uint8_t icb_idelaytimer; 907 uint16_t icb_zfwoptions; 908 uint16_t icb_reserved2[13]; 909} isp_icb_t; 910 911#define ICB_VERSION1 1 912 913#define ICBOPT_EXTENDED 0x8000 914#define ICBOPT_BOTH_WWNS 0x4000 915#define ICBOPT_FULL_LOGIN 0x2000 916#define ICBOPT_STOP_ON_QFULL 0x1000 /* 2200/2100 only */ 917#define ICBOPT_PREVLOOP 0x0800 918#define ICBOPT_SRCHDOWN 0x0400 919#define ICBOPT_NOLIP 0x0200 920#define ICBOPT_PDBCHANGE_AE 0x0100 921#define ICBOPT_TGT_TYPE 0x0080 922#define ICBOPT_INI_ADISC 0x0040 923#define ICBOPT_INI_DISABLE 0x0020 924#define ICBOPT_TGT_ENABLE 0x0010 925#define ICBOPT_FAST_POST 0x0008 926#define ICBOPT_FULL_DUPLEX 0x0004 927#define ICBOPT_FAIRNESS 0x0002 928#define ICBOPT_HARD_ADDRESS 0x0001 929 930#define ICBXOPT_NO_LOGOUT 0x8000 /* no logout on link failure */ 931#define ICBXOPT_FCTAPE_CCQ 0x4000 /* FC-Tape Command Queueing */ 932#define ICBXOPT_FCTAPE_CONFIRM 0x2000 933#define ICBXOPT_FCTAPE 0x1000 934#define ICBXOPT_CLASS2_ACK0 0x0200 935#define ICBXOPT_CLASS2 0x0100 936#define ICBXOPT_NO_PLAY 0x0080 /* don't play if can't get hard addr */ 937#define ICBXOPT_TOPO_MASK 0x0070 938#define ICBXOPT_LOOP_ONLY 0x0000 939#define ICBXOPT_PTP_ONLY 0x0010 940#define ICBXOPT_LOOP_2_PTP 0x0020 941#define ICBXOPT_PTP_2_LOOP 0x0030 942/* 943 * The lower 4 bits of the xfwoptions field are the OPERATION MODE bits. 944 * RIO is not defined for the 23XX cards (just 2200) 945 */ 946#define ICBXOPT_RIO_OFF 0 947#define ICBXOPT_RIO_16BIT 1 948#define ICBXOPT_RIO_32BIT 2 949#define ICBXOPT_RIO_16BIT_IOCB 3 950#define ICBXOPT_RIO_32BIT_IOCB 4 951#define ICBXOPT_ZIO 5 952#define ICBXOPT_TIMER_MASK 0x7 953 954#define ICBZOPT_RATE_MASK 0xC000 955#define ICBZOPT_RATE_ONEGB 0x0000 956#define ICBZOPT_RATE_AUTO 0x8000 957#define ICBZOPT_RATE_TWOGB 0x4000 958#define ICBZOPT_50_OHM 0x2000 959#define ICBZOPT_ENA_OOF 0x0040 /* out of order frame handling */ 960#define ICBZOPT_RSPSZ_MASK 0x0030 961#define ICBZOPT_RSPSZ_24 0x0000 962#define ICBZOPT_RSPSZ_12 0x0010 963#define ICBZOPT_RSPSZ_24A 0x0020 964#define ICBZOPT_RSPSZ_32 0x0030 965#define ICBZOPT_SOFTID 0x0002 966#define ICBZOPT_ENA_RDXFR_RDY 0x0001 967 968/* 2400 F/W options */ 969#define ICB2400_OPT1_BOTH_WWNS 0x00004000 970#define ICB2400_OPT1_FULL_LOGIN 0x00002000 971#define ICB2400_OPT1_PREVLOOP 0x00000800 972#define ICB2400_OPT1_SRCHDOWN 0x00000400 973#define ICB2400_OPT1_NOLIP 0x00000200 974#define ICB2400_OPT1_INI_DISABLE 0x00000020 975#define ICB2400_OPT1_TGT_ENABLE 0x00000010 976#define ICB2400_OPT1_FULL_DUPLEX 0x00000004 977#define ICB2400_OPT1_FAIRNESS 0x00000002 978#define ICB2400_OPT1_HARD_ADDRESS 0x00000001 979 980#define ICB2400_OPT2_TPRLIC 0x00004000 981#define ICB2400_OPT2_FCTAPE 0x00001000 982#define ICB2400_OPT2_FCSP 0x00000800 983#define ICB2400_OPT2_CLASS2_ACK0 0x00000200 984#define ICB2400_OPT2_CLASS2 0x00000100 985#define ICB2400_OPT2_NO_PLAY 0x00000080 986#define ICB2400_OPT2_TOPO_MASK 0x00000070 987#define ICB2400_OPT2_LOOP_ONLY 0x00000000 988#define ICB2400_OPT2_PTP_ONLY 0x00000010 989#define ICB2400_OPT2_LOOP_2_PTP 0x00000020 990#define ICB2400_OPT2_TIMER_MASK 0x0000000f 991#define ICB2400_OPT2_ZIO 0x00000005 992#define ICB2400_OPT2_ZIO1 0x00000006 993 994#define ICB2400_OPT3_75_OHM 0x00010000 995#define ICB2400_OPT3_RATE_MASK 0x0000E000 996#define ICB2400_OPT3_RATE_ONEGB 0x00000000 997#define ICB2400_OPT3_RATE_TWOGB 0x00002000 998#define ICB2400_OPT3_RATE_AUTO 0x00004000 999#define ICB2400_OPT3_RATE_FOURGB 0x00006000 1000#define ICB2400_OPT3_RATE_EIGHTGB 0x00008000 1001#define ICB2400_OPT3_ENA_OOF_XFRDY 0x00000200 1002#define ICB2400_OPT3_NO_LOCAL_PLOGI 0x00000080 1003#define ICB2400_OPT3_ENA_OOF 0x00000040 1004/* note that a response size flag of zero is reserved! */ 1005#define ICB2400_OPT3_RSPSZ_MASK 0x00000030 1006#define ICB2400_OPT3_RSPSZ_12 0x00000010 1007#define ICB2400_OPT3_RSPSZ_24 0x00000020 1008#define ICB2400_OPT3_RSPSZ_32 0x00000030 1009#define ICB2400_OPT3_SOFTID 0x00000002 1010 1011#define ICB_MIN_FRMLEN 256 1012#define ICB_MAX_FRMLEN 2112 1013#define ICB_DFLT_FRMLEN 1024 1014#define ICB_DFLT_ALLOC 256 1015#define ICB_DFLT_THROTTLE 16 1016#define ICB_DFLT_RDELAY 5 1017#define ICB_DFLT_RCOUNT 3 1018 1019#define ICB_LOGIN_TOV 30 1020#define ICB_LUN_ENABLE_TOV 15 1021 1022 1023/* 1024 * And somebody at QLogic had a great idea that you could just change 1025 * the structure *and* keep the version number the same as the other cards. 1026 */ 1027typedef struct { 1028 uint16_t icb_version; 1029 uint16_t icb_reserved0; 1030 uint16_t icb_maxfrmlen; 1031 uint16_t icb_execthrottle; 1032 uint16_t icb_xchgcnt; 1033 uint16_t icb_hardaddr; 1034 uint8_t icb_portname[8]; 1035 uint8_t icb_nodename[8]; 1036 uint16_t icb_rspnsin; 1037 uint16_t icb_rqstout; 1038 uint16_t icb_retry_count; 1039 uint16_t icb_priout; 1040 uint16_t icb_rsltqlen; 1041 uint16_t icb_rqstqlen; 1042 uint16_t icb_ldn_nols; 1043 uint16_t icb_prqstqlen; 1044 uint16_t icb_rqstaddr[4]; 1045 uint16_t icb_respaddr[4]; 1046 uint16_t icb_priaddr[4]; 1047 uint16_t icb_reserved1[4]; 1048 uint16_t icb_atio_in; 1049 uint16_t icb_atioqlen; 1050 uint16_t icb_atioqaddr[4]; 1051 uint16_t icb_idelaytimer; 1052 uint16_t icb_logintime; 1053 uint32_t icb_fwoptions1; 1054 uint32_t icb_fwoptions2; 1055 uint32_t icb_fwoptions3; 1056 uint16_t icb_reserved2[12]; 1057} isp_icb_2400_t; 1058 1059#define RQRSP_ADDR0015 0 1060#define RQRSP_ADDR1631 1 1061#define RQRSP_ADDR3247 2 1062#define RQRSP_ADDR4863 3 1063 1064 1065#define ICB_NNM0 7 1066#define ICB_NNM1 6 1067#define ICB_NNM2 5 1068#define ICB_NNM3 4 1069#define ICB_NNM4 3 1070#define ICB_NNM5 2 1071#define ICB_NNM6 1 1072#define ICB_NNM7 0 1073 1074#define MAKE_NODE_NAME_FROM_WWN(array, wwn) \ 1075 array[ICB_NNM0] = (uint8_t) ((wwn >> 0) & 0xff), \ 1076 array[ICB_NNM1] = (uint8_t) ((wwn >> 8) & 0xff), \ 1077 array[ICB_NNM2] = (uint8_t) ((wwn >> 16) & 0xff), \ 1078 array[ICB_NNM3] = (uint8_t) ((wwn >> 24) & 0xff), \ 1079 array[ICB_NNM4] = (uint8_t) ((wwn >> 32) & 0xff), \ 1080 array[ICB_NNM5] = (uint8_t) ((wwn >> 40) & 0xff), \ 1081 array[ICB_NNM6] = (uint8_t) ((wwn >> 48) & 0xff), \ 1082 array[ICB_NNM7] = (uint8_t) ((wwn >> 56) & 0xff) 1083 1084#define MAKE_WWN_FROM_NODE_NAME(wwn, array) \ 1085 wwn = ((uint64_t) array[ICB_NNM0]) | \ 1086 ((uint64_t) array[ICB_NNM1] << 8) | \ 1087 ((uint64_t) array[ICB_NNM2] << 16) | \ 1088 ((uint64_t) array[ICB_NNM3] << 24) | \ 1089 ((uint64_t) array[ICB_NNM4] << 32) | \ 1090 ((uint64_t) array[ICB_NNM5] << 40) | \ 1091 ((uint64_t) array[ICB_NNM6] << 48) | \ 1092 ((uint64_t) array[ICB_NNM7] << 56) 1093 1094 1095/* 1096 * For MULTI_ID firmware, this describes a 1097 * virtual port entity for getting status. 1098 */ 1099typedef struct { 1100 uint16_t vp_port_status; 1101 uint8_t vp_port_options; 1102 uint8_t vp_port_loopid; 1103 uint8_t vp_port_portname[8]; 1104 uint8_t vp_port_nodename[8]; 1105 uint16_t vp_port_portid_lo; /* not present when trailing icb */ 1106 uint16_t vp_port_portid_hi; /* not present when trailing icb */ 1107} vp_port_info_t; 1108 1109#define ICB2400_VPOPT_TGT_DISABLE 0x00000020 /* disable target mode */ 1110#define ICB2400_VPOPT_INI_ENABLE 0x00000010 /* enable initiator mode */ 1111#define ICB2400_VPOPT_ENABLED 0x00000008 1112#define ICB2400_VPOPT_NOPLAY 0x00000004 1113#define ICB2400_VPOPT_PREVLOOP 0x00000002 1114#define ICB2400_VPOPT_HARD_ADDRESS 0x00000001 1115 1116#define ICB2400_VPOPT_WRITE_SIZE 20 1117 1118/* 1119 * For MULTI_ID firmware, we append this structure 1120 * to the isp_icb_2400_t above, followed by a list 1121 * structures that are *most* of the vp_port_info_t. 1122 */ 1123typedef struct { 1124 uint16_t vp_count; 1125 uint16_t vp_global_options; 1126} isp_icb_2400_vpinfo_t; 1127 1128#define ICB2400_VPINFO_OFF 0x80 /* offset from start of ICB */ 1129#define ICB2400_VPINFO_PORT_OFF(chan) \ 1130 ICB2400_VPINFO_OFF + \ 1131 sizeof (isp_icb_2400_vpinfo_t) + ((chan - 1) * ICB2400_VPOPT_WRITE_SIZE) 1132 1133#define ICB2400_VPGOPT_FCA 0x01 /* Assume Clean Address bit in FLOGI ACC set (works only in static configurations) */ 1134#define ICB2400_VPGOPT_MID_DISABLE 0x02 /* when set, connection mode2 will work with NPIV-capable switched */ 1135#define ICB2400_VPGOPT_VP0_DECOUPLE 0x04 /* Allow VP0 decoupling if firmware supports it */ 1136 1137typedef struct { 1138 isphdr_t vp_ctrl_hdr; 1139 uint32_t vp_ctrl_handle; 1140 uint16_t vp_ctrl_index_fail; 1141 uint16_t vp_ctrl_status; 1142 uint16_t vp_ctrl_command; 1143 uint16_t vp_ctrl_vp_count; 1144 uint16_t vp_ctrl_idmap[8]; 1145 uint8_t vp_ctrl_reserved[32]; 1146} vp_ctrl_info_t; 1147 1148#define VP_CTRL_CMD_ENABLE_VP 0 1149#define VP_CTRL_CMD_DISABLE_VP 8 1150#define VP_CTRL_CMD_DISABLE_VP_REINIT_LINK 9 1151#define VP_CTRL_CMD_DISABLE_VP_LOGO 0xA 1152 1153/* 1154 * We can use this structure for modifying either one or two VP ports after initialization 1155 */ 1156typedef struct { 1157 isphdr_t vp_mod_hdr; 1158 uint32_t vp_mod_hdl; 1159 uint16_t vp_mod_reserved0; 1160 uint16_t vp_mod_status; 1161 uint8_t vp_mod_cmd; 1162 uint8_t vp_mod_cnt; 1163 uint8_t vp_mod_idx0; 1164 uint8_t vp_mod_idx1; 1165 struct { 1166 uint8_t options; 1167 uint8_t loopid; 1168 uint16_t reserved1; 1169 uint8_t wwpn[8]; 1170 uint8_t wwnn[8]; 1171 } vp_mod_ports[2]; 1172 uint8_t vp_mod_reserved2[8]; 1173} vp_modify_t; 1174 1175#define VP_STS_OK 0x00 1176#define VP_STS_ERR 0x01 1177#define VP_CNT_ERR 0x02 1178#define VP_GEN_ERR 0x03 1179#define VP_IDX_ERR 0x04 1180#define VP_STS_BSY 0x05 1181 1182#define VP_MODIFY_VP 0x00 1183#define VP_MODIFY_ENA 0x01 1184 1185/* 1186 * Port Data Base Element 1187 */ 1188 1189typedef struct { 1190 uint16_t pdb_options; 1191 uint8_t pdb_mstate; 1192 uint8_t pdb_sstate; 1193 uint8_t pdb_hardaddr_bits[4]; 1194 uint8_t pdb_portid_bits[4]; 1195 uint8_t pdb_nodename[8]; 1196 uint8_t pdb_portname[8]; 1197 uint16_t pdb_execthrottle; 1198 uint16_t pdb_exec_count; 1199 uint8_t pdb_retry_count; 1200 uint8_t pdb_retry_delay; 1201 uint16_t pdb_resalloc; 1202 uint16_t pdb_curalloc; 1203 uint16_t pdb_qhead; 1204 uint16_t pdb_qtail; 1205 uint16_t pdb_tl_next; 1206 uint16_t pdb_tl_last; 1207 uint16_t pdb_features; /* PLOGI, Common Service */ 1208 uint16_t pdb_pconcurrnt; /* PLOGI, Common Service */ 1209 uint16_t pdb_roi; /* PLOGI, Common Service */ 1210 uint8_t pdb_target; 1211 uint8_t pdb_initiator; /* PLOGI, Class 3 Control Flags */ 1212 uint16_t pdb_rdsiz; /* PLOGI, Class 3 */ 1213 uint16_t pdb_ncseq; /* PLOGI, Class 3 */ 1214 uint16_t pdb_noseq; /* PLOGI, Class 3 */ 1215 uint16_t pdb_labrtflg; 1216 uint16_t pdb_lstopflg; 1217 uint16_t pdb_sqhead; 1218 uint16_t pdb_sqtail; 1219 uint16_t pdb_ptimer; 1220 uint16_t pdb_nxt_seqid; 1221 uint16_t pdb_fcount; 1222 uint16_t pdb_prli_len; 1223 uint16_t pdb_prli_svc0; 1224 uint16_t pdb_prli_svc3; 1225 uint16_t pdb_loopid; 1226 uint16_t pdb_il_ptr; 1227 uint16_t pdb_sl_ptr; 1228} isp_pdb_21xx_t; 1229 1230#define PDB_OPTIONS_XMITTING (1<<11) 1231#define PDB_OPTIONS_LNKXMIT (1<<10) 1232#define PDB_OPTIONS_ABORTED (1<<9) 1233#define PDB_OPTIONS_ADISC (1<<1) 1234 1235#define PDB_STATE_DISCOVERY 0 1236#define PDB_STATE_WDISC_ACK 1 1237#define PDB_STATE_PLOGI 2 1238#define PDB_STATE_PLOGI_ACK 3 1239#define PDB_STATE_PRLI 4 1240#define PDB_STATE_PRLI_ACK 5 1241#define PDB_STATE_LOGGED_IN 6 1242#define PDB_STATE_PORT_UNAVAIL 7 1243#define PDB_STATE_PRLO 8 1244#define PDB_STATE_PRLO_ACK 9 1245#define PDB_STATE_PLOGO 10 1246#define PDB_STATE_PLOG_ACK 11 1247 1248#define SVC3_ROLE_MASK 0x30 1249#define SVC3_ROLE_SHIFT 4 1250 1251#define BITS2WORD(x) ((x)[0] << 16 | (x)[3] << 8 | (x)[2]) 1252#define BITS2WORD_24XX(x) ((x)[0] << 16 | (x)[1] << 8 | (x)[2]) 1253 1254/* 1255 * Port Data Base Element- 24XX cards 1256 */ 1257typedef struct { 1258 uint16_t pdb_flags; 1259 uint8_t pdb_curstate; 1260 uint8_t pdb_laststate; 1261 uint8_t pdb_hardaddr_bits[4]; 1262 uint8_t pdb_portid_bits[4]; 1263#define pdb_nxt_seqid_2400 pdb_portid_bits[3] 1264 uint16_t pdb_retry_timer; 1265 uint16_t pdb_handle; 1266 uint16_t pdb_rcv_dsize; 1267 uint16_t pdb_reserved0; 1268 uint16_t pdb_prli_svc0; 1269 uint16_t pdb_prli_svc3; 1270 uint8_t pdb_portname[8]; 1271 uint8_t pdb_nodename[8]; 1272 uint8_t pdb_reserved1[24]; 1273} isp_pdb_24xx_t; 1274 1275#define PDB2400_TID_SUPPORTED 0x4000 1276#define PDB2400_FC_TAPE 0x0080 1277#define PDB2400_CLASS2_ACK0 0x0040 1278#define PDB2400_FCP_CONF 0x0020 1279#define PDB2400_CLASS2 0x0010 1280#define PDB2400_ADDR_VALID 0x0002 1281 1282#define PDB2400_STATE_PLOGI_PEND 0x03 1283#define PDB2400_STATE_PLOGI_DONE 0x04 1284#define PDB2400_STATE_PRLI_PEND 0x05 1285#define PDB2400_STATE_LOGGED_IN 0x06 1286#define PDB2400_STATE_PORT_UNAVAIL 0x07 1287#define PDB2400_STATE_PRLO_PEND 0x09 1288#define PDB2400_STATE_LOGO_PEND 0x0B 1289 1290/* 1291 * Common elements from the above two structures that are actually useful to us. 1292 */ 1293typedef struct { 1294 uint16_t handle; 1295 uint16_t prli_word3; 1296 uint32_t : 8, 1297 portid : 24; 1298 uint8_t portname[8]; 1299 uint8_t nodename[8]; 1300} isp_pdb_t; 1301 1302/* 1303 * Port Database Changed Async Event information for 24XX cards 1304 */ 1305#define PDB24XX_AE_OK 0x00 1306#define PDB24XX_AE_IMPL_LOGO_1 0x01 1307#define PDB24XX_AE_IMPL_LOGO_2 0x02 1308#define PDB24XX_AE_IMPL_LOGO_3 0x03 1309#define PDB24XX_AE_PLOGI_RCVD 0x04 1310#define PDB24XX_AE_PLOGI_RJT 0x05 1311#define PDB24XX_AE_PRLI_RCVD 0x06 1312#define PDB24XX_AE_PRLI_RJT 0x07 1313#define PDB24XX_AE_TPRLO 0x08 1314#define PDB24XX_AE_TPRLO_RJT 0x09 1315#define PDB24XX_AE_PRLO_RCVD 0x0a 1316#define PDB24XX_AE_LOGO_RCVD 0x0b 1317#define PDB24XX_AE_TOPO_CHG 0x0c 1318#define PDB24XX_AE_NPORT_CHG 0x0d 1319#define PDB24XX_AE_FLOGI_RJT 0x0e 1320#define PDB24XX_AE_BAD_FANN 0x0f 1321#define PDB24XX_AE_FLOGI_TIMO 0x10 1322#define PDB24XX_AE_ABX_LOGO 0x11 1323#define PDB24XX_AE_PLOGI_DONE 0x12 1324#define PDB24XX_AE_PRLI_DONJE 0x13 1325#define PDB24XX_AE_OPN_1 0x14 1326#define PDB24XX_AE_OPN_2 0x15 1327#define PDB24XX_AE_TXERR 0x16 1328#define PDB24XX_AE_FORCED_LOGO 0x17 1329#define PDB24XX_AE_DISC_TIMO 0x18 1330 1331/* 1332 * Genericized Port Login/Logout software structure 1333 */ 1334typedef struct { 1335 uint16_t handle; 1336 uint16_t channel; 1337 uint32_t 1338 flags : 8, 1339 portid : 24; 1340} isp_plcmd_t; 1341/* the flags to use are those for PLOGX_FLG_* below */ 1342 1343/* 1344 * ISP24XX- Login/Logout Port IOCB 1345 */ 1346typedef struct { 1347 isphdr_t plogx_header; 1348 uint32_t plogx_handle; 1349 uint16_t plogx_status; 1350 uint16_t plogx_nphdl; 1351 uint16_t plogx_flags; 1352 uint16_t plogx_vphdl; /* low 8 bits */ 1353 uint16_t plogx_portlo; /* low 16 bits */ 1354 uint16_t plogx_rspsz_porthi; 1355 struct { 1356 uint16_t lo16; 1357 uint16_t hi16; 1358 } plogx_ioparm[11]; 1359} isp_plogx_t; 1360 1361#define PLOGX_STATUS_OK 0x00 1362#define PLOGX_STATUS_UNAVAIL 0x28 1363#define PLOGX_STATUS_LOGOUT 0x29 1364#define PLOGX_STATUS_IOCBERR 0x31 1365 1366#define PLOGX_IOCBERR_NOLINK 0x01 1367#define PLOGX_IOCBERR_NOIOCB 0x02 1368#define PLOGX_IOCBERR_NOXGHG 0x03 1369#define PLOGX_IOCBERR_FAILED 0x04 /* further info in IOPARM 1 */ 1370#define PLOGX_IOCBERR_NOFABRIC 0x05 1371#define PLOGX_IOCBERR_NOTREADY 0x07 1372#define PLOGX_IOCBERR_NOLOGIN 0x08 /* further info in IOPARM 1 */ 1373#define PLOGX_IOCBERR_NOPCB 0x0a 1374#define PLOGX_IOCBERR_REJECT 0x18 /* further info in IOPARM 1 */ 1375#define PLOGX_IOCBERR_EINVAL 0x19 /* further info in IOPARM 1 */ 1376#define PLOGX_IOCBERR_PORTUSED 0x1a /* further info in IOPARM 1 */ 1377#define PLOGX_IOCBERR_HNDLUSED 0x1b /* further info in IOPARM 1 */ 1378#define PLOGX_IOCBERR_NOHANDLE 0x1c 1379#define PLOGX_IOCBERR_NOFLOGI 0x1f /* further info in IOPARM 1 */ 1380 1381#define PLOGX_FLG_CMD_MASK 0xf 1382#define PLOGX_FLG_CMD_PLOGI 0 1383#define PLOGX_FLG_CMD_PRLI 1 1384#define PLOGX_FLG_CMD_PDISC 2 1385#define PLOGX_FLG_CMD_LOGO 8 1386#define PLOGX_FLG_CMD_PRLO 9 1387#define PLOGX_FLG_CMD_TPRLO 10 1388 1389#define PLOGX_FLG_COND_PLOGI 0x10 /* if with PLOGI */ 1390#define PLOGX_FLG_IMPLICIT 0x10 /* if with LOGO, PRLO, TPRLO */ 1391#define PLOGX_FLG_SKIP_PRLI 0x20 /* if with PLOGI */ 1392#define PLOGX_FLG_IMPLICIT_LOGO_ALL 0x20 /* if with LOGO */ 1393#define PLOGX_FLG_EXPLICIT_LOGO 0x40 /* if with LOGO */ 1394#define PLOGX_FLG_COMMON_FEATURES 0x80 /* if with PLOGI */ 1395#define PLOGX_FLG_FREE_NPHDL 0x80 /* if with with LOGO */ 1396 1397#define PLOGX_FLG_CLASS2 0x100 /* if with PLOGI */ 1398#define PLOGX_FLG_FCP2_OVERRIDE 0x200 /* if with PRLOG, PRLI */ 1399 1400/* 1401 * Report ID Acquisistion (24XX multi-id firmware) 1402 */ 1403typedef struct { 1404 isphdr_t ridacq_hdr; 1405 uint32_t ridacq_handle; 1406 union { 1407 struct { 1408 uint8_t ridacq_vp_acquired; 1409 uint8_t ridacq_vp_setup; 1410 uint16_t ridacq_reserved0; 1411 } type0; /* type 0 */ 1412 struct { 1413 uint16_t ridacq_vp_count; 1414 uint8_t ridacq_vp_index; 1415 uint8_t ridacq_vp_status; 1416 } type1; /* type 1 */ 1417 } un; 1418 uint16_t ridacq_vp_port_lo; 1419 uint8_t ridacq_vp_port_hi; 1420 uint8_t ridacq_format; /* 0 or 1 */ 1421 uint16_t ridacq_map[8]; 1422 uint8_t ridacq_reserved1[32]; 1423} isp_ridacq_t; 1424 1425#define RIDACQ_STS_COMPLETE 0 1426#define RIDACQ_STS_UNACQUIRED 1 1427#define RIDACQ_STS_CHANGED 20 1428 1429 1430/* 1431 * Simple Name Server Data Structures 1432 */ 1433#define SNS_GA_NXT 0x100 1434#define SNS_GPN_ID 0x112 1435#define SNS_GNN_ID 0x113 1436#define SNS_GFF_ID 0x11F 1437#define SNS_GID_FT 0x171 1438#define SNS_RFT_ID 0x217 1439typedef struct { 1440 uint16_t snscb_rblen; /* response buffer length (words) */ 1441 uint16_t snscb_reserved0; 1442 uint16_t snscb_addr[4]; /* response buffer address */ 1443 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1444 uint16_t snscb_reserved1; 1445 uint16_t snscb_data[1]; /* variable data */ 1446} sns_screq_t; /* Subcommand Request Structure */ 1447 1448typedef struct { 1449 uint16_t snscb_rblen; /* response buffer length (words) */ 1450 uint16_t snscb_reserved0; 1451 uint16_t snscb_addr[4]; /* response buffer address */ 1452 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1453 uint16_t snscb_reserved1; 1454 uint16_t snscb_cmd; 1455 uint16_t snscb_reserved2; 1456 uint32_t snscb_reserved3; 1457 uint32_t snscb_port; 1458} sns_ga_nxt_req_t; 1459#define SNS_GA_NXT_REQ_SIZE (sizeof (sns_ga_nxt_req_t)) 1460 1461typedef struct { 1462 uint16_t snscb_rblen; /* response buffer length (words) */ 1463 uint16_t snscb_reserved0; 1464 uint16_t snscb_addr[4]; /* response buffer address */ 1465 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1466 uint16_t snscb_reserved1; 1467 uint16_t snscb_cmd; 1468 uint16_t snscb_reserved2; 1469 uint32_t snscb_reserved3; 1470 uint32_t snscb_portid; 1471} sns_gxn_id_req_t; 1472#define SNS_GXN_ID_REQ_SIZE (sizeof (sns_gxn_id_req_t)) 1473 1474typedef struct { 1475 uint16_t snscb_rblen; /* response buffer length (words) */ 1476 uint16_t snscb_reserved0; 1477 uint16_t snscb_addr[4]; /* response buffer address */ 1478 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1479 uint16_t snscb_reserved1; 1480 uint16_t snscb_cmd; 1481 uint16_t snscb_mword_div_2; 1482 uint32_t snscb_reserved3; 1483 uint32_t snscb_fc4_type; 1484} sns_gid_ft_req_t; 1485#define SNS_GID_FT_REQ_SIZE (sizeof (sns_gid_ft_req_t)) 1486 1487typedef struct { 1488 uint16_t snscb_rblen; /* response buffer length (words) */ 1489 uint16_t snscb_reserved0; 1490 uint16_t snscb_addr[4]; /* response buffer address */ 1491 uint16_t snscb_sblen; /* subcommand buffer length (words) */ 1492 uint16_t snscb_reserved1; 1493 uint16_t snscb_cmd; 1494 uint16_t snscb_reserved2; 1495 uint32_t snscb_reserved3; 1496 uint32_t snscb_port; 1497 uint32_t snscb_fc4_types[8]; 1498} sns_rft_id_req_t; 1499#define SNS_RFT_ID_REQ_SIZE (sizeof (sns_rft_id_req_t)) 1500 1501typedef struct { 1502 ct_hdr_t snscb_cthdr; 1503 uint8_t snscb_port_type; 1504 uint8_t snscb_port_id[3]; 1505 uint8_t snscb_portname[8]; 1506 uint16_t snscb_data[1]; /* variable data */ 1507} sns_scrsp_t; /* Subcommand Response Structure */ 1508 1509typedef struct { 1510 ct_hdr_t snscb_cthdr; 1511 uint8_t snscb_port_type; 1512 uint8_t snscb_port_id[3]; 1513 uint8_t snscb_portname[8]; 1514 uint8_t snscb_pnlen; /* symbolic port name length */ 1515 uint8_t snscb_pname[255]; /* symbolic port name */ 1516 uint8_t snscb_nodename[8]; 1517 uint8_t snscb_nnlen; /* symbolic node name length */ 1518 uint8_t snscb_nname[255]; /* symbolic node name */ 1519 uint8_t snscb_ipassoc[8]; 1520 uint8_t snscb_ipaddr[16]; 1521 uint8_t snscb_svc_class[4]; 1522 uint8_t snscb_fc4_types[32]; 1523 uint8_t snscb_fpname[8]; 1524 uint8_t snscb_reserved; 1525 uint8_t snscb_hardaddr[3]; 1526} sns_ga_nxt_rsp_t; /* Subcommand Response Structure */ 1527#define SNS_GA_NXT_RESP_SIZE (sizeof (sns_ga_nxt_rsp_t)) 1528 1529typedef struct { 1530 ct_hdr_t snscb_cthdr; 1531 uint8_t snscb_wwn[8]; 1532} sns_gxn_id_rsp_t; 1533#define SNS_GXN_ID_RESP_SIZE (sizeof (sns_gxn_id_rsp_t)) 1534 1535typedef struct { 1536 ct_hdr_t snscb_cthdr; 1537 uint32_t snscb_fc4_features[32]; 1538} sns_gff_id_rsp_t; 1539#define SNS_GFF_ID_RESP_SIZE (sizeof (sns_gff_id_rsp_t)) 1540 1541typedef struct { 1542 ct_hdr_t snscb_cthdr; 1543 struct { 1544 uint8_t control; 1545 uint8_t portid[3]; 1546 } snscb_ports[1]; 1547} sns_gid_ft_rsp_t; 1548#define SNS_GID_FT_RESP_SIZE(x) ((sizeof (sns_gid_ft_rsp_t)) + ((x - 1) << 2)) 1549#define SNS_RFT_ID_RESP_SIZE (sizeof (ct_hdr_t)) 1550 1551/* 1552 * Other Misc Structures 1553 */ 1554 1555/* ELS Pass Through */ 1556typedef struct { 1557 isphdr_t els_hdr; 1558 uint32_t els_handle; 1559 uint16_t els_status; 1560 uint16_t els_nphdl; 1561 uint16_t els_xmit_dsd_count; /* outgoing only */ 1562 uint8_t els_vphdl; 1563 uint8_t els_sof; 1564 uint32_t els_rxid; 1565 uint16_t els_recv_dsd_count; /* outgoing only */ 1566 uint8_t els_opcode; 1567 uint8_t els_reserved1; 1568 uint8_t els_did_lo; 1569 uint8_t els_did_mid; 1570 uint8_t els_did_hi; 1571 uint8_t els_reserved2; 1572 uint16_t els_reserved3; 1573 uint16_t els_ctl_flags; 1574 union { 1575 struct { 1576 uint32_t _els_bytecnt; 1577 uint32_t _els_subcode1; 1578 uint32_t _els_subcode2; 1579 uint8_t _els_reserved4[20]; 1580 } in; 1581 struct { 1582 uint32_t _els_recv_bytecnt; 1583 uint32_t _els_xmit_bytecnt; 1584 uint32_t _els_xmit_dsd_length; 1585 uint16_t _els_xmit_dsd_a1500; 1586 uint16_t _els_xmit_dsd_a3116; 1587 uint16_t _els_xmit_dsd_a4732; 1588 uint16_t _els_xmit_dsd_a6348; 1589 uint32_t _els_recv_dsd_length; 1590 uint16_t _els_recv_dsd_a1500; 1591 uint16_t _els_recv_dsd_a3116; 1592 uint16_t _els_recv_dsd_a4732; 1593 uint16_t _els_recv_dsd_a6348; 1594 } out; 1595 } inout; 1596#define els_bytecnt inout.in._els_bytecnt 1597#define els_subcode1 inout.in._els_subcode1 1598#define els_subcode2 inout.in._els_subcode2 1599#define els_reserved4 inout.in._els_reserved4 1600#define els_recv_bytecnt inout.out._els_recv_bytecnt 1601#define els_xmit_bytecnt inout.out._els_xmit_bytecnt 1602#define els_xmit_dsd_length inout.out._els_xmit_dsd_length 1603#define els_xmit_dsd_a1500 inout.out._els_xmit_dsd_a1500 1604#define els_xmit_dsd_a3116 inout.out._els_xmit_dsd_a3116 1605#define els_xmit_dsd_a4732 inout.out._els_xmit_dsd_a4732 1606#define els_xmit_dsd_a6348 inout.out._els_xmit_dsd_a6348 1607#define els_recv_dsd_length inout.out._els_recv_dsd_length 1608#define els_recv_dsd_a1500 inout.out._els_recv_dsd_a1500 1609#define els_recv_dsd_a3116 inout.out._els_recv_dsd_a3116 1610#define els_recv_dsd_a4732 inout.out._els_recv_dsd_a4732 1611#define els_recv_dsd_a6348 inout.out._els_recv_dsd_a6348 1612} els_t; 1613 1614/* 1615 * A handy package structure for running FC-SCSI commands internally 1616 */ 1617typedef struct { 1618 uint16_t handle; 1619 uint16_t lun; 1620 uint32_t 1621 channel : 8, 1622 portid : 24; 1623 uint32_t timeout; 1624 union { 1625 struct { 1626 uint32_t data_length; 1627 uint32_t 1628 no_wait : 1, 1629 do_read : 1; 1630 uint8_t cdb[16]; 1631 void *data_ptr; 1632 } beg; 1633 struct { 1634 uint32_t data_residual; 1635 uint8_t status; 1636 uint8_t pad; 1637 uint16_t sense_length; 1638 uint8_t sense_data[32]; 1639 } end; 1640 } fcd; 1641} isp_xcmd_t; 1642 1643/* 1644 * Target Mode related definitions 1645 */ 1646#define QLTM_SENSELEN 18 /* non-FC cards only */ 1647#define QLTM_SVALID 0x80 1648 1649/* 1650 * Structure for Enable Lun and Modify Lun queue entries 1651 */ 1652typedef struct { 1653 isphdr_t le_header; 1654 uint32_t le_reserved; 1655 uint8_t le_lun; 1656 uint8_t le_rsvd; 1657 uint8_t le_ops; /* Modify LUN only */ 1658 uint8_t le_tgt; /* Not for FC */ 1659 uint32_t le_flags; /* Not for FC */ 1660 uint8_t le_status; 1661 uint8_t le_reserved2; 1662 uint8_t le_cmd_count; 1663 uint8_t le_in_count; 1664 uint8_t le_cdb6len; /* Not for FC */ 1665 uint8_t le_cdb7len; /* Not for FC */ 1666 uint16_t le_timeout; 1667 uint16_t le_reserved3[20]; 1668} lun_entry_t; 1669 1670/* 1671 * le_flags values 1672 */ 1673#define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 1674#define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 1675#define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 1676#define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 1677 1678/* 1679 * le_ops values 1680 */ 1681#define LUN_CCINCR 0x01 /* increment command count */ 1682#define LUN_CCDECR 0x02 /* decrement command count */ 1683#define LUN_ININCR 0x40 /* increment immed. notify count */ 1684#define LUN_INDECR 0x80 /* decrement immed. notify count */ 1685 1686/* 1687 * le_status values 1688 */ 1689#define LUN_OK 0x01 /* we be rockin' */ 1690#define LUN_ERR 0x04 /* request completed with error */ 1691#define LUN_INVAL 0x06 /* invalid request */ 1692#define LUN_NOCAP 0x16 /* can't provide requested capability */ 1693#define LUN_ENABLED 0x3E /* LUN already enabled */ 1694 1695/* 1696 * Immediate Notify Entry structure 1697 */ 1698#define IN_MSGLEN 8 /* 8 bytes */ 1699#define IN_RSVDLEN 8 /* 8 words */ 1700typedef struct { 1701 isphdr_t in_header; 1702 uint32_t in_reserved; 1703 uint8_t in_lun; /* lun */ 1704 uint8_t in_iid; /* initiator */ 1705 uint8_t in_reserved2; 1706 uint8_t in_tgt; /* target */ 1707 uint32_t in_flags; 1708 uint8_t in_status; 1709 uint8_t in_rsvd2; 1710 uint8_t in_tag_val; /* tag value */ 1711 uint8_t in_tag_type; /* tag type */ 1712 uint16_t in_seqid; /* sequence id */ 1713 uint8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 1714 uint16_t in_reserved3[IN_RSVDLEN]; 1715 uint8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 1716} in_entry_t; 1717 1718typedef struct { 1719 isphdr_t in_header; 1720 uint32_t in_reserved; 1721 uint8_t in_lun; /* lun */ 1722 uint8_t in_iid; /* initiator */ 1723 uint16_t in_scclun; 1724 uint32_t in_reserved2; 1725 uint16_t in_status; 1726 uint16_t in_task_flags; 1727 uint16_t in_seqid; /* sequence id */ 1728} in_fcentry_t; 1729 1730typedef struct { 1731 isphdr_t in_header; 1732 uint32_t in_reserved; 1733 uint16_t in_iid; /* initiator */ 1734 uint16_t in_scclun; 1735 uint32_t in_reserved2; 1736 uint16_t in_status; 1737 uint16_t in_task_flags; 1738 uint16_t in_seqid; /* sequence id */ 1739} in_fcentry_e_t; 1740 1741/* 1742 * Values for the in_status field 1743 */ 1744#define IN_REJECT 0x0D /* Message Reject message received */ 1745#define IN_RESET 0x0E /* Bus Reset occurred */ 1746#define IN_NO_RCAP 0x16 /* requested capability not available */ 1747#define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 1748#define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 1749#define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 1750#define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 1751#define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 1752#define IN_PORT_CHANGED 0x2A /* port changed */ 1753#define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 1754#define IN_NO_NEXUS 0x3B /* Nexus not established */ 1755#define IN_SRR_RCVD 0x45 /* SRR received */ 1756 1757/* 1758 * Values for the in_task_flags field- should only get one at a time! 1759 */ 1760#define TASK_FLAGS_RESERVED_MASK (0xe700) 1761#define TASK_FLAGS_CLEAR_ACA (1<<14) 1762#define TASK_FLAGS_TARGET_RESET (1<<13) 1763#define TASK_FLAGS_LUN_RESET (1<<12) 1764#define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 1765#define TASK_FLAGS_ABORT_TASK_SET (1<<9) 1766 1767/* 1768 * ISP24XX Immediate Notify 1769 */ 1770typedef struct { 1771 isphdr_t in_header; 1772 uint32_t in_reserved; 1773 uint16_t in_nphdl; 1774 uint16_t in_reserved1; 1775 uint16_t in_flags; 1776 uint16_t in_srr_rxid; 1777 uint16_t in_status; 1778 uint8_t in_status_subcode; 1779 uint8_t in_reserved2; 1780 uint32_t in_rxid; 1781 uint16_t in_srr_reloff_lo; 1782 uint16_t in_srr_reloff_hi; 1783 uint16_t in_srr_iu; 1784 uint16_t in_srr_oxid; 1785 /* 1786 * If bit 2 is set in in_flags, the N-Port and 1787 * handle tags are valid. If the received ELS is 1788 * a LOGO, then these tags contain the N Port ID 1789 * from the LOGO payload. If the received ELS 1790 * request is TPRLO, these tags contain the 1791 * Third Party Originator N Port ID. 1792 */ 1793 uint16_t in_nport_id_hi; 1794#define in_prli_options in_nport_id_hi 1795 uint8_t in_nport_id_lo; 1796 uint8_t in_reserved3; 1797 uint16_t in_np_handle; 1798 uint8_t in_reserved4[12]; 1799 uint8_t in_reserved5; 1800 uint8_t in_vpidx; 1801 uint32_t in_reserved6; 1802 uint16_t in_portid_lo; 1803 uint8_t in_portid_hi; 1804 uint8_t in_reserved7; 1805 uint16_t in_reserved8; 1806 uint16_t in_oxid; 1807} in_fcentry_24xx_t; 1808 1809#define IN24XX_FLAG_PUREX_IOCB 0x1 1810#define IN24XX_FLAG_GLOBAL_LOGOUT 0x2 1811#define IN24XX_FLAG_NPHDL_VALID 0x4 1812 1813#define IN24XX_LIP_RESET 0x0E 1814#define IN24XX_LINK_RESET 0x0F 1815#define IN24XX_PORT_LOGOUT 0x29 1816#define IN24XX_PORT_CHANGED 0x2A 1817#define IN24XX_LINK_FAILED 0x2E 1818#define IN24XX_SRR_RCVD 0x45 1819#define IN24XX_ELS_RCVD 0x46 /* 1820 * login-affectin ELS received- check 1821 * subcode for specific opcode 1822 */ 1823 1824/* 1825 * For f/w > 4.0.25, these offsets in the Immediate Notify contain 1826 * the WWNN/WWPN if the ELS is PLOGI, PDISC or ADISC. The WWN is in 1827 * Big Endian format. 1828 */ 1829#define IN24XX_PLOGI_WWNN_OFF 0x20 1830#define IN24XX_PLOGI_WWPN_OFF 0x28 1831 1832/* 1833 * For f/w > 4.0.25, this offset in the Immediate Notify contain 1834 * the WWPN if the ELS is LOGO. The WWN is in Big Endian format. 1835 */ 1836#define IN24XX_LOGO_WWPN_OFF 0x28 1837 1838/* 1839 * Immediate Notify Status Subcodes for IN24XX_PORT_LOGOUT 1840 */ 1841#define IN24XX_PORT_LOGOUT_PDISC_TMO 0x00 1842#define IN24XX_PORT_LOGOUT_UXPR_DISC 0x01 1843#define IN24XX_PORT_LOGOUT_OWN_OPN 0x02 1844#define IN24XX_PORT_LOGOUT_OWN_OPN_SFT 0x03 1845#define IN24XX_PORT_LOGOUT_ABTS_TMO 0x04 1846#define IN24XX_PORT_LOGOUT_DISC_RJT 0x05 1847#define IN24XX_PORT_LOGOUT_LOGIN_NEEDED 0x06 1848#define IN24XX_PORT_LOGOUT_BAD_DISC 0x07 1849#define IN24XX_PORT_LOGOUT_LOST_ALPA 0x08 1850#define IN24XX_PORT_LOGOUT_XMIT_FAILURE 0x09 1851 1852/* 1853 * Immediate Notify Status Subcodes for IN24XX_PORT_CHANGED 1854 */ 1855#define IN24XX_PORT_CHANGED_BADFAN 0x00 1856#define IN24XX_PORT_CHANGED_TOPO_CHANGE 0x01 1857#define IN24XX_PORT_CHANGED_FLOGI_ACC 0x02 1858#define IN24XX_PORT_CHANGED_FLOGI_RJT 0x03 1859#define IN24XX_PORT_CHANGED_TIMEOUT 0x04 1860#define IN24XX_PORT_CHANGED_PORT_CHANGE 0x05 1861 1862/* 1863 * Notify Acknowledge Entry structure 1864 */ 1865#define NA_RSVDLEN 22 1866typedef struct { 1867 isphdr_t na_header; 1868 uint32_t na_reserved; 1869 uint8_t na_lun; /* lun */ 1870 uint8_t na_iid; /* initiator */ 1871 uint8_t na_reserved2; 1872 uint8_t na_tgt; /* target */ 1873 uint32_t na_flags; 1874 uint8_t na_status; 1875 uint8_t na_event; 1876 uint16_t na_seqid; /* sequence id */ 1877 uint16_t na_reserved3[NA_RSVDLEN]; 1878} na_entry_t; 1879 1880/* 1881 * Value for the na_event field 1882 */ 1883#define NA_RST_CLRD 0x80 /* Clear an async event notification */ 1884#define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 1885#define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 1886 1887#define NA2_RSVDLEN 21 1888typedef struct { 1889 isphdr_t na_header; 1890 uint32_t na_reserved; 1891 uint8_t na_reserved1; 1892 uint8_t na_iid; /* initiator loop id */ 1893 uint16_t na_response; 1894 uint16_t na_flags; 1895 uint16_t na_reserved2; 1896 uint16_t na_status; 1897 uint16_t na_task_flags; 1898 uint16_t na_seqid; /* sequence id */ 1899 uint16_t na_reserved3[NA2_RSVDLEN]; 1900} na_fcentry_t; 1901 1902typedef struct { 1903 isphdr_t na_header; 1904 uint32_t na_reserved; 1905 uint16_t na_iid; /* initiator loop id */ 1906 uint16_t na_response; /* response code */ 1907 uint16_t na_flags; 1908 uint16_t na_reserved2; 1909 uint16_t na_status; 1910 uint16_t na_task_flags; 1911 uint16_t na_seqid; /* sequence id */ 1912 uint16_t na_reserved3[NA2_RSVDLEN]; 1913} na_fcentry_e_t; 1914 1915#define NAFC_RCOUNT 0x80 /* increment resource count */ 1916#define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 1917#define NAFC_TVALID 0x10 /* task mangement response code is valid */ 1918 1919/* 1920 * ISP24XX Notify Acknowledge 1921 */ 1922 1923typedef struct { 1924 isphdr_t na_header; 1925 uint32_t na_handle; 1926 uint16_t na_nphdl; 1927 uint16_t na_reserved1; 1928 uint16_t na_flags; 1929 uint16_t na_srr_rxid; 1930 uint16_t na_status; 1931 uint8_t na_status_subcode; 1932 uint8_t na_reserved2; 1933 uint32_t na_rxid; 1934 uint16_t na_srr_reloff_lo; 1935 uint16_t na_srr_reloff_hi; 1936 uint16_t na_srr_iu; 1937 uint16_t na_srr_flags; 1938 uint8_t na_reserved3[18]; 1939 uint8_t na_reserved4; 1940 uint8_t na_vpidx; 1941 uint8_t na_srr_reject_vunique; 1942 uint8_t na_srr_reject_explanation; 1943 uint8_t na_srr_reject_code; 1944 uint8_t na_reserved5; 1945 uint8_t na_reserved6[6]; 1946 uint16_t na_oxid; 1947} na_fcentry_24xx_t; 1948 1949/* 1950 * Accept Target I/O Entry structure 1951 */ 1952#define ATIO_CDBLEN 26 1953 1954typedef struct { 1955 isphdr_t at_header; 1956 uint16_t at_reserved; 1957 uint16_t at_handle; 1958 uint8_t at_lun; /* lun */ 1959 uint8_t at_iid; /* initiator */ 1960 uint8_t at_cdblen; /* cdb length */ 1961 uint8_t at_tgt; /* target */ 1962 uint32_t at_flags; 1963 uint8_t at_status; /* firmware status */ 1964 uint8_t at_scsi_status; /* scsi status */ 1965 uint8_t at_tag_val; /* tag value */ 1966 uint8_t at_tag_type; /* tag type */ 1967 uint8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 1968 uint8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 1969} at_entry_t; 1970 1971/* 1972 * at_flags values 1973 */ 1974#define AT_NODISC 0x00008000 /* disconnect disabled */ 1975#define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 1976 1977/* 1978 * at_status values 1979 */ 1980#define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 1981#define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 1982#define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 1983#define AT_NOCAP 0x16 /* Requested capability not available */ 1984#define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 1985#define AT_CDB 0x3D /* CDB received */ 1986/* 1987 * Macros to create and fetch and test concatenated handle and tag value macros 1988 * (SPI only) 1989 */ 1990#define AT_MAKE_TAGID(tid, aep) \ 1991 tid = aep->at_handle; \ 1992 if (aep->at_flags & AT_TQAE) { \ 1993 tid |= (aep->at_tag_val << 16); \ 1994 tid |= (1 << 24); \ 1995 } 1996 1997#define CT_MAKE_TAGID(tid, ct) \ 1998 tid = ct->ct_fwhandle; \ 1999 if (ct->ct_flags & CT_TQAE) { \ 2000 tid |= (ct->ct_tag_val << 16); \ 2001 tid |= (1 << 24); \ 2002 } 2003 2004#define AT_HAS_TAG(val) ((val) & (1 << 24)) 2005#define AT_GET_TAG(val) (((val) >> 16) & 0xff) 2006#define AT_GET_HANDLE(val) ((val) & 0xffff) 2007 2008#define IN_MAKE_TAGID(tid, inp) \ 2009 tid = inp->in_seqid; \ 2010 tid |= (inp->in_tag_val << 16); \ 2011 tid |= (1 << 24) 2012 2013/* 2014 * Accept Target I/O Entry structure, Type 2 2015 */ 2016#define ATIO2_CDBLEN 16 2017 2018typedef struct { 2019 isphdr_t at_header; 2020 uint32_t at_reserved; 2021 uint8_t at_lun; /* lun or reserved */ 2022 uint8_t at_iid; /* initiator */ 2023 uint16_t at_rxid; /* response ID */ 2024 uint16_t at_flags; 2025 uint16_t at_status; /* firmware status */ 2026 uint8_t at_crn; /* command reference number */ 2027 uint8_t at_taskcodes; 2028 uint8_t at_taskflags; 2029 uint8_t at_execodes; 2030 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2031 uint32_t at_datalen; /* allocated data len */ 2032 uint16_t at_scclun; /* SCC Lun or reserved */ 2033 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2034 uint16_t at_reserved2[6]; 2035 uint16_t at_oxid; 2036} at2_entry_t; 2037 2038typedef struct { 2039 isphdr_t at_header; 2040 uint32_t at_reserved; 2041 uint16_t at_iid; /* initiator */ 2042 uint16_t at_rxid; /* response ID */ 2043 uint16_t at_flags; 2044 uint16_t at_status; /* firmware status */ 2045 uint8_t at_crn; /* command reference number */ 2046 uint8_t at_taskcodes; 2047 uint8_t at_taskflags; 2048 uint8_t at_execodes; 2049 uint8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 2050 uint32_t at_datalen; /* allocated data len */ 2051 uint16_t at_scclun; /* SCC Lun or reserved */ 2052 uint16_t at_wwpn[4]; /* WWPN of initiator */ 2053 uint16_t at_reserved2[6]; 2054 uint16_t at_oxid; 2055} at2e_entry_t; 2056 2057#define ATIO2_WWPN_OFFSET 0x2A 2058#define ATIO2_OXID_OFFSET 0x3E 2059 2060#define ATIO2_TC_ATTR_MASK 0x7 2061#define ATIO2_TC_ATTR_SIMPLEQ 0 2062#define ATIO2_TC_ATTR_HEADOFQ 1 2063#define ATIO2_TC_ATTR_ORDERED 2 2064#define ATIO2_TC_ATTR_ACAQ 4 2065#define ATIO2_TC_ATTR_UNTAGGED 5 2066 2067#define ATIO2_EX_WRITE 0x1 2068#define ATIO2_EX_READ 0x2 2069/* 2070 * Macros to create and fetch and test concatenated handle and tag value macros 2071 */ 2072#define AT2_MAKE_TAGID(tid, bus, inst, aep) \ 2073 tid = aep->at_rxid; \ 2074 tid |= (((uint64_t)inst) << 32); \ 2075 tid |= (((uint64_t)bus) << 48) 2076 2077#define CT2_MAKE_TAGID(tid, bus, inst, ct) \ 2078 tid = ct->ct_rxid; \ 2079 tid |= (((uint64_t)inst) << 32); \ 2080 tid |= (((uint64_t)(bus & 0xff)) << 48) 2081 2082#define AT2_HAS_TAG(val) 1 2083#define AT2_GET_TAG(val) ((val) & 0xffffffff) 2084#define AT2_GET_INST(val) (((val) >> 32) & 0xffff) 2085#define AT2_GET_HANDLE AT2_GET_TAG 2086#define AT2_GET_BUS(val) (((val) >> 48) & 0xff) 2087 2088#define FC_HAS_TAG AT2_HAS_TAG 2089#define FC_GET_TAG AT2_GET_TAG 2090#define FC_GET_INST AT2_GET_INST 2091#define FC_GET_HANDLE AT2_GET_HANDLE 2092 2093#define IN_FC_MAKE_TAGID(tid, bus, inst, seqid) \ 2094 tid = seqid; \ 2095 tid |= (((uint64_t)inst) << 32); \ 2096 tid |= (((uint64_t)(bus & 0xff)) << 48) 2097 2098#define FC_TAG_INSERT_INST(tid, inst) \ 2099 tid &= ~0x0000ffff00000000ull; \ 2100 tid |= (((uint64_t)inst) << 32) 2101 2102/* 2103 * 24XX ATIO Definition 2104 * 2105 * This is *quite* different from other entry types. 2106 * First of all, it has its own queue it comes in on. 2107 * 2108 * Secondly, it doesn't have a normal header. 2109 * 2110 * Thirdly, it's just a passthru of the FCP CMND IU 2111 * which is recorded in big endian mode. 2112 */ 2113typedef struct { 2114 uint8_t at_type; 2115 uint8_t at_count; 2116 /* 2117 * Task attribute in high four bits, 2118 * the rest is the FCP CMND IU Length. 2119 * NB: the command can extend past the 2120 * length for a single queue entry. 2121 */ 2122 uint16_t at_ta_len; 2123 uint32_t at_rxid; 2124 fc_hdr_t at_hdr; 2125 fcp_cmnd_iu_t at_cmnd; 2126} at7_entry_t; 2127#define AT7_NORESRC_RXID 0xffffffff 2128 2129 2130/* 2131 * Continue Target I/O Entry structure 2132 * Request from driver. The response from the 2133 * ISP firmware is the same except that the last 18 2134 * bytes are overwritten by suggested sense data if 2135 * the 'autosense valid' bit is set in the status byte. 2136 */ 2137typedef struct { 2138 isphdr_t ct_header; 2139 uint16_t ct_syshandle; 2140 uint16_t ct_fwhandle; /* required by f/w */ 2141 uint8_t ct_lun; /* lun */ 2142 uint8_t ct_iid; /* initiator id */ 2143 uint8_t ct_reserved2; 2144 uint8_t ct_tgt; /* our target id */ 2145 uint32_t ct_flags; 2146 uint8_t ct_status; /* isp status */ 2147 uint8_t ct_scsi_status; /* scsi status */ 2148 uint8_t ct_tag_val; /* tag value */ 2149 uint8_t ct_tag_type; /* tag type */ 2150 uint32_t ct_xfrlen; /* transfer length */ 2151 uint32_t ct_resid; /* residual length */ 2152 uint16_t ct_timeout; 2153 uint16_t ct_seg_count; 2154 ispds_t ct_dataseg[ISP_RQDSEG]; 2155} ct_entry_t; 2156 2157/* 2158 * For some of the dual port SCSI adapters, port (bus #) is reported 2159 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 2160 * 2161 * Note that this does not apply to FC adapters at all which can and 2162 * do report IIDs between 0x81 && 0xfe (or 0x7ff) which represent devices 2163 * that have logged in across a SCSI fabric. 2164 */ 2165#define GET_IID_VAL(x) (x & 0x3f) 2166#define GET_BUS_VAL(x) ((x >> 7) & 0x1) 2167#define SET_IID_VAL(y, x) y = ((y & ~0x3f) | (x & 0x3f)) 2168#define SET_BUS_VAL(y, x) y = ((y & 0x3f) | ((x & 0x1) << 7)) 2169 2170/* 2171 * ct_flags values 2172 */ 2173#define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 2174#define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction - *to* initiator */ 2175#define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction - *from* initiator */ 2176#define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 2177#define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 2178#define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 2179#define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 2180#define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 2181#define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 2182#define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 2183#define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 2184 2185/* 2186 * ct_status values 2187 * - set by the firmware when it returns the CTIO 2188 */ 2189#define CT_OK 0x01 /* completed without error */ 2190#define CT_ABORTED 0x02 /* aborted by host */ 2191#define CT_ERR 0x04 /* see sense data for error */ 2192#define CT_INVAL 0x06 /* request for disabled lun */ 2193#define CT_NOPATH 0x07 /* invalid ITL nexus */ 2194#define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 2195#define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 2196#define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 2197#define CT_TIMEOUT 0x0B /* timed out */ 2198#define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 2199#define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 2200#define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 2201#define CT_PANIC 0x13 /* Unrecoverable Error */ 2202#define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 2203#define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 2204#define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 2205#define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 2206#define CT_PORTUNAVAIL 0x28 /* port not available */ 2207#define CT_LOGOUT 0x29 /* port logout */ 2208#define CT_PORTCHANGED 0x2A /* port changed */ 2209#define CT_IDE 0x33 /* Initiator Detected Error */ 2210#define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 2211#define CT_SRR 0x45 /* SRR Received */ 2212#define CT_LUN_RESET 0x48 /* Lun Reset Received */ 2213 2214#define CT_HBA_RESET 0xffff /* pseudo error - command destroyed by HBA reset*/ 2215 2216/* 2217 * When the firmware returns a CTIO entry, it may overwrite the last 2218 * part of the structure with sense data. This starts at offset 0x2E 2219 * into the entry, which is in the middle of ct_dataseg[1]. Rather 2220 * than define a new struct for this, I'm just using the sense data 2221 * offset. 2222 */ 2223#define CTIO_SENSE_OFFSET 0x2E 2224 2225/* 2226 * Entry length in u_longs. All entries are the same size so 2227 * any one will do as the numerator. 2228 */ 2229#define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(uint32_t)) 2230 2231/* 2232 * QLA2100 CTIO (type 2) entry 2233 */ 2234#define MAXRESPLEN 26 2235typedef struct { 2236 isphdr_t ct_header; 2237 uint32_t ct_syshandle; 2238 uint8_t ct_lun; /* lun */ 2239 uint8_t ct_iid; /* initiator id */ 2240 uint16_t ct_rxid; /* response ID */ 2241 uint16_t ct_flags; 2242 uint16_t ct_status; /* isp status */ 2243 uint16_t ct_timeout; 2244 uint16_t ct_seg_count; 2245 uint32_t ct_reloff; /* relative offset */ 2246 uint32_t ct_resid; /* residual length */ 2247 union { 2248 /* 2249 * The three different modes that the target driver 2250 * can set the CTIO{2,3,4} up as. 2251 * 2252 * The first is for sending FCP_DATA_IUs as well as 2253 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 2254 * 2255 * The second is for sending SCSI sense data in an FCP_RSP_IU. 2256 * Note that no FCP_DATA_IUs will be sent. 2257 * 2258 * The third is for sending FCP_RSP_IUs as built specifically 2259 * in system memory as located by the isp_dataseg. 2260 */ 2261 struct { 2262 uint32_t _reserved; 2263 uint16_t _reserved2; 2264 uint16_t ct_scsi_status; 2265 uint32_t ct_xfrlen; 2266 union { 2267 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2268 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2269 ispdslist_t ct_dslist; 2270 } u; 2271 } m0; 2272 struct { 2273 uint16_t _reserved; 2274 uint16_t _reserved2; 2275 uint16_t ct_senselen; 2276 uint16_t ct_scsi_status; 2277 uint16_t ct_resplen; 2278 uint8_t ct_resp[MAXRESPLEN]; 2279 } m1; 2280 struct { 2281 uint32_t _reserved; 2282 uint16_t _reserved2; 2283 uint16_t _reserved3; 2284 uint32_t ct_datalen; 2285 union { 2286 ispds_t ct_fcp_rsp_iudata_32; 2287 ispds64_t ct_fcp_rsp_iudata_64; 2288 } u; 2289 } m2; 2290 } rsp; 2291} ct2_entry_t; 2292 2293typedef struct { 2294 isphdr_t ct_header; 2295 uint32_t ct_syshandle; 2296 uint16_t ct_iid; /* initiator id */ 2297 uint16_t ct_rxid; /* response ID */ 2298 uint16_t ct_flags; 2299 uint16_t ct_status; /* isp status */ 2300 uint16_t ct_timeout; 2301 uint16_t ct_seg_count; 2302 uint32_t ct_reloff; /* relative offset */ 2303 uint32_t ct_resid; /* residual length */ 2304 union { 2305 struct { 2306 uint32_t _reserved; 2307 uint16_t _reserved2; 2308 uint16_t ct_scsi_status; 2309 uint32_t ct_xfrlen; 2310 union { 2311 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 2312 ispds64_t ct_dataseg64[ISP_RQDSEG_T3]; 2313 ispdslist_t ct_dslist; 2314 } u; 2315 } m0; 2316 struct { 2317 uint16_t _reserved; 2318 uint16_t _reserved2; 2319 uint16_t ct_senselen; 2320 uint16_t ct_scsi_status; 2321 uint16_t ct_resplen; 2322 uint8_t ct_resp[MAXRESPLEN]; 2323 } m1; 2324 struct { 2325 uint32_t _reserved; 2326 uint16_t _reserved2; 2327 uint16_t _reserved3; 2328 uint32_t ct_datalen; 2329 union { 2330 ispds_t ct_fcp_rsp_iudata_32; 2331 ispds64_t ct_fcp_rsp_iudata_64; 2332 } u; 2333 } m2; 2334 } rsp; 2335} ct2e_entry_t; 2336 2337/* 2338 * ct_flags values for CTIO2 2339 */ 2340#define CT2_FLAG_MODE0 0x0000 2341#define CT2_FLAG_MODE1 0x0001 2342#define CT2_FLAG_MODE2 0x0002 2343#define CT2_FLAG_MMASK 0x0003 2344#define CT2_DATA_IN 0x0040 /* *to* initiator */ 2345#define CT2_DATA_OUT 0x0080 /* *from* initiator */ 2346#define CT2_NO_DATA 0x00C0 2347#define CT2_DATAMASK 0x00C0 2348#define CT2_CCINCR 0x0100 2349#define CT2_FASTPOST 0x0200 2350#define CT2_CONFIRM 0x2000 2351#define CT2_TERMINATE 0x4000 2352#define CT2_SENDSTATUS 0x8000 2353 2354/* 2355 * ct_status values are (mostly) the same as that for ct_entry. 2356 */ 2357 2358/* 2359 * ct_scsi_status values- the low 8 bits are the normal SCSI status 2360 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 2361 * fields. 2362 */ 2363#define CT2_RSPLEN_VALID 0x0100 2364#define CT2_SNSLEN_VALID 0x0200 2365#define CT2_DATA_OVER 0x0400 2366#define CT2_DATA_UNDER 0x0800 2367 2368/* 2369 * ISP24XX CTIO 2370 */ 2371#define MAXRESPLEN_24XX 24 2372typedef struct { 2373 isphdr_t ct_header; 2374 uint32_t ct_syshandle; 2375 uint16_t ct_nphdl; /* status on returned CTIOs */ 2376 uint16_t ct_timeout; 2377 uint16_t ct_seg_count; 2378 uint8_t ct_vpidx; 2379 uint8_t ct_xflags; 2380 uint16_t ct_iid_lo; /* low 16 bits of portid */ 2381 uint8_t ct_iid_hi; /* hi 8 bits of portid */ 2382 uint8_t ct_reserved; 2383 uint32_t ct_rxid; 2384 uint16_t ct_senselen; /* mode 1 only */ 2385 uint16_t ct_flags; 2386 uint32_t ct_resid; /* residual length */ 2387 uint16_t ct_oxid; 2388 uint16_t ct_scsi_status; /* modes 0 && 1 only */ 2389 union { 2390 struct { 2391 uint32_t reloff; 2392 uint32_t reserved0; 2393 uint32_t ct_xfrlen; 2394 uint32_t reserved1; 2395 ispds64_t ds; 2396 } m0; 2397 struct { 2398 uint16_t ct_resplen; 2399 uint16_t reserved; 2400 uint8_t ct_resp[MAXRESPLEN_24XX]; 2401 } m1; 2402 struct { 2403 uint32_t reserved0; 2404 uint32_t reserved1; 2405 uint32_t ct_datalen; 2406 uint32_t reserved2; 2407 ispds64_t ct_fcp_rsp_iudata; 2408 } m2; 2409 } rsp; 2410} ct7_entry_t; 2411 2412/* 2413 * ct_flags values for CTIO7 2414 */ 2415#define CT7_NO_DATA 0x0000 2416#define CT7_DATA_OUT 0x0001 /* *from* initiator */ 2417#define CT7_DATA_IN 0x0002 /* *to* initiator */ 2418#define CT7_DATAMASK 0x3 2419#define CT7_DSD_ENABLE 0x0004 2420#define CT7_CONF_STSFD 0x0010 2421#define CT7_EXPLCT_CONF 0x0020 2422#define CT7_FLAG_MODE0 0x0000 2423#define CT7_FLAG_MODE1 0x0040 2424#define CT7_FLAG_MODE2 0x0080 2425#define CT7_FLAG_MMASK 0x00C0 2426#define CT7_NOACK 0x0100 2427#define CT7_TASK_ATTR_SHIFT 9 2428#define CT7_CONFIRM 0x2000 2429#define CT7_TERMINATE 0x4000 2430#define CT7_SENDSTATUS 0x8000 2431 2432/* 2433 * Type 7 CTIO status codes 2434 */ 2435#define CT7_OK 0x01 /* completed without error */ 2436#define CT7_ABORTED 0x02 /* aborted by host */ 2437#define CT7_ERR 0x04 /* see sense data for error */ 2438#define CT7_INVAL 0x06 /* request for disabled lun */ 2439#define CT7_INVRXID 0x08 /* Invalid RX_ID */ 2440#define CT7_DATA_OVER 0x09 /* Data Overrun */ 2441#define CT7_TIMEOUT 0x0B /* timed out */ 2442#define CT7_RESET 0x0E /* LIP Rset Received */ 2443#define CT7_BUS_ERROR 0x10 /* DMA PCI Error */ 2444#define CT7_REASSY_ERR 0x11 /* DMA reassembly error */ 2445#define CT7_DATA_UNDER 0x15 /* Data Underrun */ 2446#define CT7_PORTUNAVAIL 0x28 /* port not available */ 2447#define CT7_LOGOUT 0x29 /* port logout */ 2448#define CT7_PORTCHANGED 0x2A /* port changed */ 2449#define CT7_SRR 0x45 /* SRR Received */ 2450 2451/* 2452 * Other 24XX related target IOCBs 2453 */ 2454 2455/* 2456 * ABTS Received 2457 */ 2458typedef struct { 2459 isphdr_t abts_header; 2460 uint8_t abts_reserved0[6]; 2461 uint16_t abts_nphdl; 2462 uint16_t abts_reserved1; 2463 uint16_t abts_sof; 2464 uint32_t abts_rxid_abts; 2465 uint16_t abts_did_lo; 2466 uint8_t abts_did_hi; 2467 uint8_t abts_r_ctl; 2468 uint16_t abts_sid_lo; 2469 uint8_t abts_sid_hi; 2470 uint8_t abts_cs_ctl; 2471 uint16_t abts_fs_ctl; 2472 uint8_t abts_f_ctl; 2473 uint8_t abts_type; 2474 uint16_t abts_seq_cnt; 2475 uint8_t abts_df_ctl; 2476 uint8_t abts_seq_id; 2477 uint16_t abts_rx_id; 2478 uint16_t abts_ox_id; 2479 uint32_t abts_param; 2480 uint8_t abts_reserved2[16]; 2481 uint32_t abts_rxid_task; 2482} abts_t; 2483 2484typedef struct { 2485 isphdr_t abts_rsp_header; 2486 uint32_t abts_rsp_handle; 2487 uint16_t abts_rsp_status; 2488 uint16_t abts_rsp_nphdl; 2489 uint16_t abts_rsp_ctl_flags; 2490 uint16_t abts_rsp_sof; 2491 uint32_t abts_rsp_rxid_abts; 2492 uint16_t abts_rsp_did_lo; 2493 uint8_t abts_rsp_did_hi; 2494 uint8_t abts_rsp_r_ctl; 2495 uint16_t abts_rsp_sid_lo; 2496 uint8_t abts_rsp_sid_hi; 2497 uint8_t abts_rsp_cs_ctl; 2498 uint16_t abts_rsp_f_ctl_lo; 2499 uint8_t abts_rsp_f_ctl_hi; 2500 uint8_t abts_rsp_type; 2501 uint16_t abts_rsp_seq_cnt; 2502 uint8_t abts_rsp_df_ctl; 2503 uint8_t abts_rsp_seq_id; 2504 uint16_t abts_rsp_rx_id; 2505 uint16_t abts_rsp_ox_id; 2506 uint32_t abts_rsp_param; 2507 union { 2508 struct { 2509 uint16_t reserved; 2510 uint8_t last_seq_id; 2511 uint8_t seq_id_valid; 2512 uint16_t aborted_rx_id; 2513 uint16_t aborted_ox_id; 2514 uint16_t high_seq_cnt; 2515 uint16_t low_seq_cnt; 2516 uint8_t reserved2[4]; 2517 } ba_acc; 2518 struct { 2519 uint8_t vendor_unique; 2520 uint8_t explanation; 2521 uint8_t reason; 2522 uint8_t reserved; 2523 uint8_t reserved2[12]; 2524 } ba_rjt; 2525 struct { 2526 uint8_t reserved[8]; 2527 uint32_t subcode1; 2528 uint32_t subcode2; 2529 } rsp; 2530 uint8_t reserved[16]; 2531 } abts_rsp_payload; 2532 uint32_t abts_rsp_rxid_task; 2533} abts_rsp_t; 2534 2535/* terminate this ABTS exchange */ 2536#define ISP24XX_ABTS_RSP_TERMINATE 0x01 2537 2538#define ISP24XX_ABTS_RSP_COMPLETE 0x00 2539#define ISP24XX_ABTS_RSP_RESET 0x04 2540#define ISP24XX_ABTS_RSP_ABORTED 0x05 2541#define ISP24XX_ABTS_RSP_TIMEOUT 0x06 2542#define ISP24XX_ABTS_RSP_INVXID 0x08 2543#define ISP24XX_ABTS_RSP_LOGOUT 0x29 2544#define ISP24XX_ABTS_RSP_SUBCODE 0x31 2545 2546#define ISP24XX_NO_TASK 0xffffffff 2547 2548/* 2549 * Miscellaneous 2550 * 2551 * These are the limits of the number of dma segments we 2552 * can deal with based not on the size of the segment counter 2553 * (which is 16 bits), but on the size of the number of 2554 * queue entries field (which is 8 bits). We assume no 2555 * segments in the first queue entry, so we can either 2556 * have 7 dma segments per continuation entry or 5 2557 * (for 64 bit dma).. multiplying out by 254.... 2558 */ 2559#define ISP_NSEG_MAX 1778 2560#define ISP_NSEG64_MAX 1270 2561 2562#endif /* _ISPMBOX_H */ 2563