1/*- 2 * Copyright (c) 2011 HighPoint Technologies, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29#include <dev/hptnr/hptnr_config.h> 30 31#ifndef HPT_INTF_H 32#define HPT_INTF_H 33 34#if defined(__BIG_ENDIAN__)&&!defined(__BIG_ENDIAN_BITFIELD) 35#define __BIG_ENDIAN_BITFIELD 36#endif 37 38#ifdef __cplusplus 39extern "C" { 40#endif 41 42#ifndef __GNUC__ 43#define __attribute__(x) 44#endif 45 46#pragma pack(1) 47 48/* 49 * Version of this interface. 50 * The user mode application must first issue a hpt_get_version() call to 51 * check HPT_INTERFACE_VERSION. When an utility using newer version interface 52 * is used with old version drivers, it must call only the functions that 53 * driver supported. 54 * A new version interface should only add ioctl functions; it should implement 55 * all old version functions without change their definition. 56 */ 57#define __this_HPT_INTERFACE_VERSION 0x02010000 58 59#ifndef HPT_INTERFACE_VERSION 60#error "You must define HPT_INTERFACE_VERSION you implemented" 61#endif 62 63#if HPT_INTERFACE_VERSION > __this_HPT_INTERFACE_VERSION 64#error "HPT_INTERFACE_VERSION is invalid" 65#endif 66 67/* 68 * DEFINITION 69 * Logical device --- a device that can be accessed by OS. 70 * Physical device --- device attached to the controller. 71 * A logical device can be simply a physical device. 72 * 73 * Each logical and physical device has a 32bit ID. GUI will use this ID 74 * to identify devices. 75 * 1. The ID must be unique. 76 * 2. The ID must be immutable. Once an ID is assigned to a device, it 77 * must not change when system is running and the device exists. 78 * 3. The ID of logical device must be NOT reusable. If a device is 79 * removed, other newly created logical device must not use the same ID. 80 * 4. The ID must not be zero or 0xFFFFFFFF. 81 */ 82typedef HPT_U32 DEVICEID; 83 84/* 85 * logical device type. 86 * Identify array (logical device) and physical device. 87 */ 88#define LDT_ARRAY 1 89#define LDT_DEVICE 2 90 91/* 92 * Array types 93 * GUI will treat all array as 1-level RAID. No RAID0/1 or RAID1/0. 94 * A RAID0/1 device is type AT_RAID1. A RAID1/0 device is type AT_RAID0. 95 * Their members may be another array of type RAID0 or RAID1. 96 */ 97#define AT_UNKNOWN 0 98#define AT_RAID0 1 99#define AT_RAID1 2 100#define AT_RAID5 3 101#define AT_RAID6 4 102#define AT_RAID3 5 103#define AT_RAID4 6 104#define AT_JBOD 7 105#define AT_RAID1E 8 106 107/* 108 * physical device type 109 */ 110#define PDT_UNKNOWN 0 111#define PDT_HARDDISK 1 112#define PDT_CDROM 2 113#define PDT_TAPE 3 114 115/* 116 * Some constants. 117 */ 118#define MAX_NAME_LENGTH 36 119#define MAX_ARRAYNAME_LEN 16 120 121#define MAX_ARRAY_MEMBERS_V1 8 122 123#ifndef MAX_ARRAY_MEMBERS_V2 124#define MAX_ARRAY_MEMBERS_V2 16 125#endif 126 127#ifndef MAX_ARRAY_MEMBERS_V3 128#define MAX_ARRAY_MEMBERS_V3 64 129#endif 130 131/* keep definition for source code compatiblity */ 132#define MAX_ARRAY_MEMBERS MAX_ARRAY_MEMBERS_V1 133 134/* 135 * io commands 136 * GUI use these commands to do IO on logical/physical devices. 137 */ 138#define IO_COMMAND_READ 1 139#define IO_COMMAND_WRITE 2 140 141 142 143/* 144 * array flags 145 */ 146#define ARRAY_FLAG_DISABLED 0x00000001 /* The array is disabled */ 147#define ARRAY_FLAG_NEEDBUILDING 0x00000002 /* array data need to be rebuilt */ 148#define ARRAY_FLAG_REBUILDING 0x00000004 /* array is in rebuilding process */ 149#define ARRAY_FLAG_BROKEN 0x00000008 /* broken but may still working */ 150#define ARRAY_FLAG_BOOTDISK 0x00000010 /* array has a active partition */ 151 152#define ARRAY_FLAG_BOOTMARK 0x00000040 /* array has boot mark set */ 153#define ARRAY_FLAG_NEED_AUTOREBUILD 0x00000080 /* auto-rebuild should start */ 154#define ARRAY_FLAG_VERIFYING 0x00000100 /* is being verified */ 155#define ARRAY_FLAG_INITIALIZING 0x00000200 /* is being initialized */ 156#define ARRAY_FLAG_TRANSFORMING 0x00000400 /* tranform in progress */ 157#define ARRAY_FLAG_NEEDTRANSFORM 0x00000800 /* array need tranform */ 158#define ARRAY_FLAG_NEEDINITIALIZING 0x00001000 /* the array's initialization hasn't finished*/ 159#define ARRAY_FLAG_BROKEN_REDUNDANT 0x00002000 /* broken but redundant (raid6) */ 160#define ARRAY_FLAG_RAID15PLUS 0x80000000 /* display this RAID 1 as RAID 1.5 */ 161 162#define ARRAY_FLAG_ZERO_STARTING 0x40000000 /* start lba of all members of this array is 0 */ 163 164/* 165 * device flags 166 */ 167#define DEVICE_FLAG_DISABLED 0x00000001 /* device is disabled */ 168#define DEVICE_FLAG_BOOTDISK 0x00000002 /* disk has a active partition */ 169#define DEVICE_FLAG_BOOTMARK 0x00000004 /* disk has boot mark set */ 170#define DEVICE_FLAG_WITH_601 0x00000008 /* has HPT601 connected */ 171#define DEVICE_FLAG_SATA 0x00000010 /* SATA or SAS device */ 172#define DEVICE_FLAG_ON_PM_PORT 0x00000020 /* PM port */ 173#define DEVICE_FLAG_SAS 0x00000040 /* SAS device */ 174#define DEVICE_FLAG_IN_ENCLOSURE 0x00000080 /* PathId is enclosure# */ 175#define DEVICE_FLAG_UNINITIALIZED 0x00010000 /* device is not initialized, can't be used to create array */ 176#define DEVICE_FLAG_LEGACY 0x00020000 /* single disk & mbr contains at least one partition */ 177#define DEVICE_FLAG_BAD_SECTOR_FOUND 0x00040000 /* found bad sector on target disk, set and clear by GUI */ 178 179#define DEVICE_FLAG_IS_SPARE 0x80000000 /* is a spare disk */ 180 181 182#define DEVICE_FLAG_SSD 0x00000100 /* SSD device */ 183#define DEVICE_FLAG_3G 0x10000000 184#define DEVICE_FLAG_6G 0x20000000 185 186 187/* 188 * array states used by hpt_set_array_state() 189 */ 190/* old defines */ 191#define MIRROR_REBUILD_START 1 192#define MIRROR_REBUILD_ABORT 2 193#define MIRROR_REBUILD_COMPLETE 3 194/* new defines */ 195#define AS_REBUILD_START 1 196#define AS_REBUILD_ABORT 2 197#define AS_REBUILD_PAUSE AS_REBUILD_ABORT 198#define AS_REBUILD_COMPLETE 3 199#define AS_VERIFY_START 4 200#define AS_VERIFY_ABORT 5 201#define AS_VERIFY_COMPLETE 6 202#define AS_INITIALIZE_START 7 203#define AS_INITIALIZE_ABORT 8 204#define AS_INITIALIZE_COMPLETE 9 205#define AS_VERIFY_FAILED 10 206#define AS_REBUILD_STOP 11 207#define AS_SAVE_STATE 12 208#define AS_TRANSFORM_START 13 209#define AS_TRANSFORM_ABORT 14 210 211/************************************************************************ 212 * ioctl code 213 * It would be better if ioctl code are the same on different platforms, 214 * but we must not conflict with system defined ioctl code. 215 ************************************************************************/ 216#if defined(LINUX) || defined(__FreeBSD_version) || defined(linux) 217#define HPT_CTL_CODE(x) (x+0xFF00) 218#define HPT_CTL_CODE_LINUX_TO_IOP(x) ((x)-0xff00) 219#elif defined(_MS_WIN32_) || defined(WIN32) 220 221#ifndef CTL_CODE 222#define CTL_CODE( DeviceType, Function, Method, Access ) \ 223 (((DeviceType) << 16) | ((Access) << 14) | ((Function) << 2) | (Method)) 224#endif 225#define HPT_CTL_CODE(x) CTL_CODE(0x370, 0x900+(x), 0, 0) 226#define HPT_CTL_CODE_WIN32_TO_IOP(x) ((((x) & 0xffff)>>2)-0x900) 227 228#else 229#define HPT_CTL_CODE(x) (x) 230#endif 231 232#define HPT_IOCTL_GET_VERSION HPT_CTL_CODE(0) 233#define HPT_IOCTL_GET_CONTROLLER_COUNT HPT_CTL_CODE(1) 234#define HPT_IOCTL_GET_CONTROLLER_INFO HPT_CTL_CODE(2) 235#define HPT_IOCTL_GET_CHANNEL_INFO HPT_CTL_CODE(3) 236#define HPT_IOCTL_GET_LOGICAL_DEVICES HPT_CTL_CODE(4) 237#define HPT_IOCTL_GET_DEVICE_INFO HPT_CTL_CODE(5) 238#define HPT_IOCTL_CREATE_ARRAY HPT_CTL_CODE(6) 239#define HPT_IOCTL_DELETE_ARRAY HPT_CTL_CODE(7) 240#define HPT_IOCTL_ARRAY_IO HPT_CTL_CODE(8) 241#define HPT_IOCTL_DEVICE_IO HPT_CTL_CODE(9) 242#define HPT_IOCTL_GET_EVENT HPT_CTL_CODE(10) 243#define HPT_IOCTL_REBUILD_MIRROR HPT_CTL_CODE(11) 244/* use HPT_IOCTL_REBUILD_DATA_BLOCK from now on */ 245#define HPT_IOCTL_REBUILD_DATA_BLOCK HPT_IOCTL_REBUILD_MIRROR 246#define HPT_IOCTL_ADD_SPARE_DISK HPT_CTL_CODE(12) 247#define HPT_IOCTL_REMOVE_SPARE_DISK HPT_CTL_CODE(13) 248#define HPT_IOCTL_ADD_DISK_TO_ARRAY HPT_CTL_CODE(14) 249#define HPT_IOCTL_SET_ARRAY_STATE HPT_CTL_CODE(15) 250#define HPT_IOCTL_SET_ARRAY_INFO HPT_CTL_CODE(16) 251#define HPT_IOCTL_SET_DEVICE_INFO HPT_CTL_CODE(17) 252#define HPT_IOCTL_RESCAN_DEVICES HPT_CTL_CODE(18) 253#define HPT_IOCTL_GET_DRIVER_CAPABILITIES HPT_CTL_CODE(19) 254#define HPT_IOCTL_GET_601_INFO HPT_CTL_CODE(20) 255#define HPT_IOCTL_SET_601_INFO HPT_CTL_CODE(21) 256#define HPT_IOCTL_LOCK_DEVICE HPT_CTL_CODE(22) 257#define HPT_IOCTL_UNLOCK_DEVICE HPT_CTL_CODE(23) 258#define HPT_IOCTL_IDE_PASS_THROUGH HPT_CTL_CODE(24) 259#define HPT_IOCTL_VERIFY_DATA_BLOCK HPT_CTL_CODE(25) 260#define HPT_IOCTL_INITIALIZE_DATA_BLOCK HPT_CTL_CODE(26) 261#define HPT_IOCTL_ADD_DEDICATED_SPARE HPT_CTL_CODE(27) 262#define HPT_IOCTL_DEVICE_IO_EX HPT_CTL_CODE(28) 263#define HPT_IOCTL_SET_BOOT_MARK HPT_CTL_CODE(29) 264#define HPT_IOCTL_QUERY_REMOVE HPT_CTL_CODE(30) 265#define HPT_IOCTL_REMOVE_DEVICES HPT_CTL_CODE(31) 266#define HPT_IOCTL_CREATE_ARRAY_V2 HPT_CTL_CODE(32) 267#define HPT_IOCTL_GET_DEVICE_INFO_V2 HPT_CTL_CODE(33) 268#define HPT_IOCTL_SET_DEVICE_INFO_V2 HPT_CTL_CODE(34) 269#define HPT_IOCTL_REBUILD_DATA_BLOCK_V2 HPT_CTL_CODE(35) 270#define HPT_IOCTL_VERIFY_DATA_BLOCK_V2 HPT_CTL_CODE(36) 271#define HPT_IOCTL_INITIALIZE_DATA_BLOCK_V2 HPT_CTL_CODE(37) 272#define HPT_IOCTL_LOCK_DEVICE_V2 HPT_CTL_CODE(38) 273#define HPT_IOCTL_DEVICE_IO_V2 HPT_CTL_CODE(39) 274#define HPT_IOCTL_DEVICE_IO_EX_V2 HPT_CTL_CODE(40) 275#define HPT_IOCTL_CREATE_TRANSFORM HPT_CTL_CODE(41) 276#define HPT_IOCTL_STEP_TRANSFORM HPT_CTL_CODE(42) 277#define HPT_IOCTL_SET_VDEV_INFO HPT_CTL_CODE(43) 278#define HPT_IOCTL_CALC_MAX_CAPACITY HPT_CTL_CODE(44) 279#define HPT_IOCTL_INIT_DISKS HPT_CTL_CODE(45) 280#define HPT_IOCTL_GET_DEVICE_INFO_V3 HPT_CTL_CODE(46) 281#define HPT_IOCTL_GET_CONTROLLER_INFO_V2 HPT_CTL_CODE(47) 282#define HPT_IOCTL_I2C_TRANSACTION HPT_CTL_CODE(48) 283#define HPT_IOCTL_GET_PARAMETER_LIST HPT_CTL_CODE(49) 284#define HPT_IOCTL_GET_PARAMETER HPT_CTL_CODE(50) 285#define HPT_IOCTL_SET_PARAMETER HPT_CTL_CODE(51) 286#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_V2 HPT_CTL_CODE(52) 287#define HPT_IOCTL_GET_CHANNEL_INFO_V2 HPT_CTL_CODE(53) 288#define HPT_IOCTL_GET_CONTROLLER_INFO_V3 HPT_CTL_CODE(54) 289#define HPT_IOCTL_GET_DEVICE_INFO_V4 HPT_CTL_CODE(55) 290#define HPT_IOCTL_CREATE_ARRAY_V3 HPT_CTL_CODE(56) 291#define HPT_IOCTL_CREATE_TRANSFORM_V2 HPT_CTL_CODE(57) 292#define HPT_IOCTL_CALC_MAX_CAPACITY_V2 HPT_CTL_CODE(58) 293#define HPT_IOCTL_SCSI_PASSTHROUGH HPT_CTL_CODE(59) 294#define HPT_IOCTL_GET_PHYSICAL_DEVICES HPT_CTL_CODE(60) 295#define HPT_IOCTL_GET_ENCLOSURE_COUNT HPT_CTL_CODE(61) 296#define HPT_IOCTL_GET_ENCLOSURE_INFO HPT_CTL_CODE(62) 297#define HPT_IOCTL_GET_PERFMON_STATUS HPT_CTL_CODE(63) 298#define HPT_IOCTL_SET_PERFMON_STATUS HPT_CTL_CODE(64) 299#define HPT_IOCTL_GET_PERFMON_DATA HPT_CTL_CODE(65) 300#define HPT_IOCTL_IDE_PASS_THROUGH_V2 HPT_CTL_CODE(66) 301#define HPT_IOCTL_GET_ENCLOSURE_INFO_V2 HPT_CTL_CODE(67) 302#define HPT_IOCTL_GET_ENCLOSURE_INFO_V3 HPT_CTL_CODE(68) 303#define HPT_IOCTL_ACCESS_CONFIG_REG HPT_CTL_CODE(69) 304 305#define HPT_IOCTL_GET_ENCLOSURE_INFO_V4 HPT_CTL_CODE(70) 306#define HPT_IOCTL_GET_ENCLOSURE_ELEMENT_INFO HPT_CTL_CODE(71) 307#define HPT_IOCTL_DUMP_METADATA HPT_CTL_CODE(72) 308#define HPT_IOCTL_GET_CONTROLLER_INFO_V2_EXT HPT_CTL_CODE(73) 309 310 311#define HPT_IOCTL_GET_CONTROLLER_IDS HPT_CTL_CODE(100) 312#define HPT_IOCTL_GET_DCB HPT_CTL_CODE(101) 313 314#define HPT_IOCTL_EPROM_IO HPT_CTL_CODE(102) 315#define HPT_IOCTL_GET_CONTROLLER_VENID HPT_CTL_CODE(103) 316 317 318#define HPT_IOCTL_GET_DRIVER_CAPABILITIES_CC HPT_CTL_CODE(200) 319#define HPT_IOCTL_GET_CCS_INFO HPT_CTL_CODE(201) 320#define HPT_IOCTL_CREATE_CC HPT_CTL_CODE(202) 321#define HPT_IOCTL_DELETE_CC HPT_CTL_CODE(203) 322#define HPT_IOCTL_REENABLE_ARRAY HPT_CTL_CODE(204) 323 324/************************************************************************ 325 * shared data structures 326 ************************************************************************/ 327 328/* 329 * Chip Type 330 */ 331#define CHIP_TYPE_HPT366 1 332#define CHIP_TYPE_HPT368 2 333#define CHIP_TYPE_HPT370 3 334#define CHIP_TYPE_HPT370A 4 335#define CHIP_TYPE_HPT370B 5 336#define CHIP_TYPE_HPT374 6 337#define CHIP_TYPE_HPT372 7 338#define CHIP_TYPE_HPT372A 8 339#define CHIP_TYPE_HPT302 9 340#define CHIP_TYPE_HPT371 10 341#define CHIP_TYPE_HPT372N 11 342#define CHIP_TYPE_HPT302N 12 343#define CHIP_TYPE_HPT371N 13 344#define CHIP_TYPE_SI3112A 14 345#define CHIP_TYPE_ICH5 15 346#define CHIP_TYPE_ICH5R 16 347#define CHIP_TYPE_MV50XX 20 348#define CHIP_TYPE_MV60X1 21 349#define CHIP_TYPE_MV60X2 22 350#define CHIP_TYPE_MV70X2 23 351#define CHIP_TYPE_MV5182 24 352#define CHIP_TYPE_IOP331 31 353#define CHIP_TYPE_IOP333 32 354#define CHIP_TYPE_IOP341 33 355#define CHIP_TYPE_IOP348 34 356 357/* 358 * Chip Flags 359 */ 360#define CHIP_SUPPORT_ULTRA_66 0x20 361#define CHIP_SUPPORT_ULTRA_100 0x40 362#define CHIP_HPT3XX_DPLL_MODE 0x80 363#define CHIP_SUPPORT_ULTRA_133 0x01 364#define CHIP_SUPPORT_ULTRA_150 0x02 365#define CHIP_MASTER 0x04 366#define CHIP_SUPPORT_SATA_300 0x08 367 368#define HPT_SPIN_UP_MODE_NOSUPPORT 0 369#define HPT_SPIN_UP_MODE_FULL 1 370#define HPT_SPIN_UP_MODE_STANDBY 2 371 372#define HPT_CAP_DUMP_METADATA 0x1 373#define HPT_CAP_DISK_CHECKING 0x2 374 375typedef struct _DRIVER_CAPABILITIES { 376 HPT_U32 dwSize; 377 378 HPT_U8 MaximumControllers; /* maximum controllers the driver can support */ 379 HPT_U8 SupportCrossControllerRAID; /* 1-support, 0-not support */ 380 HPT_U8 MinimumBlockSizeShift; /* minimum block size shift */ 381 HPT_U8 MaximumBlockSizeShift; /* maximum block size shift */ 382 383 HPT_U8 SupportDiskModeSetting; 384 HPT_U8 SupportSparePool; 385 HPT_U8 MaximumArrayNameLength; 386 /* only one HPT_U8 left here! */ 387#ifdef __BIG_ENDIAN_BITFIELD 388 HPT_U8 reserved: 2; 389 HPT_U8 SupportPerformanceMonitor: 1; 390 HPT_U8 SupportVariableSectorSize: 1; 391 HPT_U8 SupportHotSwap: 1; 392 HPT_U8 HighPerformanceRAID1: 1; 393 HPT_U8 RebuildProcessInDriver: 1; 394 HPT_U8 SupportDedicatedSpare: 1; 395#else 396 HPT_U8 SupportDedicatedSpare: 1; /* call hpt_add_dedicated_spare() for dedicated spare. */ 397 HPT_U8 RebuildProcessInDriver: 1; /* Windows only. used by mid layer for rebuild control. */ 398 HPT_U8 HighPerformanceRAID1: 1; 399 HPT_U8 SupportHotSwap: 1; 400 HPT_U8 SupportVariableSectorSize: 1; 401 HPT_U8 SupportPerformanceMonitor: 1; 402 HPT_U8 reserved: 2; 403#endif 404 405 406 HPT_U8 SupportedRAIDTypes[16]; 407 /* maximum members in an array corresponding to SupportedRAIDTypes */ 408 HPT_U8 MaximumArrayMembers[16]; 409} 410DRIVER_CAPABILITIES, *PDRIVER_CAPABILITIES; 411 412typedef struct _DRIVER_CAPABILITIES_V2 { 413 DRIVER_CAPABILITIES v1; 414 HPT_U8 SupportedCachePolicies[16]; 415 HPT_U32 ConfigRegSize; /* max sectors */ 416 HPT_U32 SupportDiskCachePolicy; /* disable/enable disk cache policy */ 417 HPT_U32 Flags; 418 HPT_U32 reserved[14]; 419} 420DRIVER_CAPABILITIES_V2, *PDRIVER_CAPABILITIES_V2; 421 422/* 423 * Controller information. 424 */ 425typedef struct _CONTROLLER_INFO { 426 HPT_U8 ChipType; /* chip type */ 427 HPT_U8 InterruptLevel; /* IRQ level */ 428 HPT_U8 NumBuses; /* bus count */ 429 HPT_U8 ChipFlags; 430 431 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 432 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 433 434} CONTROLLER_INFO, *PCONTROLLER_INFO; 435 436#if HPT_INTERFACE_VERSION>=0x01020000 437typedef struct _CONTROLLER_INFO_V2 { 438 HPT_U8 ChipType; /* chip type */ 439 HPT_U8 InterruptLevel; /* IRQ level */ 440 HPT_U8 NumBuses; /* bus count */ 441 HPT_U8 ChipFlags; 442 443 HPT_U8 szProductID[MAX_NAME_LENGTH];/* product name */ 444 HPT_U8 szVendorID[MAX_NAME_LENGTH]; /* vender name */ 445 446 HPT_U32 GroupId; /* low 32bit of vbus pointer the controller belongs 447 * the master controller has CHIP_MASTER flag set*/ 448 HPT_U8 pci_tree; 449 HPT_U8 pci_bus; 450 HPT_U8 pci_device; 451 HPT_U8 pci_function; 452 453 HPT_U32 ExFlags; 454} CONTROLLER_INFO_V2, *PCONTROLLER_INFO_V2; 455 456typedef struct _CONTROLLER_INFO_V2_EXT { 457 HPT_U8 MaxWidth; 458 HPT_U8 CurrentWidth; 459 HPT_U8 MaxSpeed; 460 HPT_U8 CurrentSpeed; 461 HPT_U8 reserve[64]; 462} CONTROLLER_INFO_V2_EXT, *PCONTROLLER_INFO_V2_EXT; 463 464 465#define CEXF_IOPModel 1 466#define CEXF_SDRAMSize 2 467#define CEXF_BatteryInstalled 4 468#define CEXF_BatteryStatus 8 469#define CEXF_BatteryVoltage 0x10 470#define CEXF_BatteryBackupTime 0x20 471#define CEXF_FirmwareVersion 0x40 472#define CEXF_SerialNumber 0x80 473#define CEXF_BatteryTemperature 0x100 474#define CEXF_Power12v 0x200 475#define CEXF_Power5v 0x400 476#define CEXF_Power3p3v 0x800 477#define CEXF_Power2p5v 0x1000 478#define CEXF_Power1p8v 0x2000 479#define CEXF_Core1p8v 0x4000 480#define CEXF_Core1p2v 0x8000 481#define CEXF_DDR1p8v 0x10000 482#define CEXF_DDR1p8vRef 0x20000 483#define CEXF_CPUTemperature 0x40000 484#define CEXF_BoardTemperature 0x80000 485#define CEXF_FanSpeed 0x100000 486#define CEXF_Core1p0v 0x200000 487#define CEXF_Fan2Speed 0x400000 488#define CEXF_Power1p0v 0x800000 489#define CEXF_Power1p5v 0x1000000 490#define CEXF_SASAddress 0x2000000 491 492typedef struct _CONTROLLER_INFO_V3 { 493 HPT_U8 ChipType; 494 HPT_U8 InterruptLevel; 495 HPT_U8 NumBuses; 496 HPT_U8 ChipFlags; 497 HPT_U8 szProductID[MAX_NAME_LENGTH]; 498 HPT_U8 szVendorID[MAX_NAME_LENGTH]; 499 HPT_U32 GroupId; 500 HPT_U8 pci_tree; 501 HPT_U8 pci_bus; 502 HPT_U8 pci_device; 503 HPT_U8 pci_function; 504 HPT_U32 ExFlags; 505 HPT_U8 IOPModel[32]; 506 HPT_U32 SDRAMSize; 507 HPT_U8 BatteryInstalled; 508 HPT_U8 BatteryStatus; 509 HPT_U16 BatteryVoltage; 510 HPT_U32 BatteryBackupTime; 511 HPT_U32 FirmwareVersion; 512 HPT_U8 SerialNumber[32]; 513 HPT_U8 BatteryMBInstalled; 514 HPT_U8 BatteryTemperature; 515 signed char CPUTemperature; 516 signed char BoardTemperature; 517 HPT_U16 FanSpeed; 518 HPT_U16 Power12v; 519 HPT_U16 Power5v; 520 HPT_U16 Power3p3v; 521 HPT_U16 Power2p5v; 522 HPT_U16 Power1p8v; 523 HPT_U16 Core1p8v; 524 HPT_U16 Core1p2v; 525 HPT_U16 DDR1p8v; 526 HPT_U16 DDR1p8vRef; 527 HPT_U16 Core1p0v; 528 HPT_U16 Fan2Speed; 529 HPT_U16 Power1p0v; 530 HPT_U16 Power1p5v; 531 HPT_U8 SASAddress[8]; 532 HPT_U8 reserve[48]; 533} 534CONTROLLER_INFO_V3, *PCONTROLLER_INFO_V3; 535typedef char check_CONTROLLER_INFO_V3[sizeof(CONTROLLER_INFO_V3)==256? 1:-1]; 536#endif 537/* 538 * Channel information. 539 */ 540typedef struct _CHANNEL_INFO { 541 HPT_U32 IoPort; /* IDE Base Port Address */ 542 HPT_U32 ControlPort; /* IDE Control Port Address */ 543 544 DEVICEID Devices[2]; /* device connected to this channel */ 545 546} CHANNEL_INFO, *PCHANNEL_INFO; 547 548typedef struct _CHANNEL_INFO_V2 { 549 HPT_U32 IoPort; /* IDE Base Port Address */ 550 HPT_U32 ControlPort; /* IDE Control Port Address */ 551 552 DEVICEID Devices[2+13]; /* device connected to this channel, PMPort max=15 */ 553} CHANNEL_INFO_V2, *PCHANNEL_INFO_V2; 554 555typedef struct _ENCLOSURE_INFO { 556 HPT_U8 EnclosureType; 557 HPT_U8 NumberOfPhys; 558 HPT_U8 AttachedTo; 559 HPT_U8 Status; 560 HPT_U8 VendorId[8]; 561 HPT_U8 ProductId[16]; 562 HPT_U8 ProductRevisionLevel[4]; 563 HPT_U32 PortPhyMap; 564 HPT_U32 reserve[55]; 565} ENCLOSURE_INFO, *PENCLOSURE_INFO; 566 567 568typedef struct _SES_ELEMENT_STATUS { 569 HPT_U8 ElementType; 570 HPT_U8 ElementOverallIndex; 571 HPT_U8 ElementStatus; 572 HPT_U8 Reserved; 573 HPT_U32 ElementValue; 574 HPT_U8 ElementDescriptor[32]; 575}SES_ELEMENT_STATUS,*PSES_ELEMENT_STATUS; 576 577#define MAX_ELEMENT_COUNT 80 578/* Element Type */ 579#define SES_TYPE_UNSPECIFIED 0x00 580#define SES_TYPE_DEVICE 0x01 581#define SES_TYPE_POWER_SUPPLY 0x02 582#define SES_TYPE_FAN 0x03 583#define SES_TYPE_TEMPERATURE_SENSOR 0x04 584#define SES_TYPE_DOOR_LOCK 0x05 585#define SES_TYPE_SPEAKER 0x06 586#define SES_TYPE_ES_CONTROLLER 0x07 587#define SES_TYPE_SCC_CONTROLLER 0x08 588#define SES_TYPE_NONVOLATILE_CACHE 0x09 589#define SES_TYPE_UPS 0x0B 590#define SES_TYPE_DISPLAY 0x0C 591#define SES_TYPE_KEYPAD 0x0D 592#define SES_TYPE_ENCLOSURE 0x0E 593#define SES_TYPE_SCSI_TRANSCEIVER 0x0F 594#define SES_TYPE_LANGUAGE 0x10 595#define SES_TYPE_COMM_PORT 0x11 596#define SES_TYPE_VOLTAGE_SENSOR 0x12 597#define SES_TYPE_CURRENT_SENSOR 0x13 598#define SES_TYPE_SCSI_TARGET_PORT 0x14 599#define SES_TYPE_SCSI_INITIATOR_PORT 0x15 600#define SES_TYPE_SIMPLE_SUBENCLOSURE 0x16 601#define SES_TYPE_ARRAY_DEVICE 0x17 602#define SES_TYPE_VENDOR_SPECIFIC 0x80 603 604/* Element Status */ 605 606#define SES_STATUS_UNSUPPORTED 0x00 607#define SES_STATUS_OK 0x01 608#define SES_STATUS_CRITICAL 0x02 609#define SES_STATUS_NONCRITICAL 0x03 610#define SES_STATUS_UNRECOVERABLE 0x04 611#define SES_STATUS_NOTINSTALLED 0x05 612#define SES_STATUS_UNKNOWN 0x06 613#define SES_STATUS_NOTAVAILABLE 0x07 614#define SES_STATUS_RESERVED 0x08 615 616 617typedef struct _ENCLOSURE_INFO_V2 { 618 HPT_U8 EnclosureType; 619 HPT_U8 NumberOfPhys; 620 HPT_U8 AttachedTo; 621 HPT_U8 Status; 622 HPT_U8 VendorId[8]; 623 HPT_U8 ProductId[16]; 624 HPT_U8 ProductRevisionLevel[4]; 625 HPT_U32 PortPhyMap; 626 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 627} ENCLOSURE_INFO_V2, *PENCLOSURE_INFO_V2; 628 629typedef struct _ENCLOSURE_INFO_V3 { 630 HPT_U8 EnclosureType; 631 HPT_U8 NumberOfPhys; 632 HPT_U8 AttachedTo; 633 HPT_U8 Status; 634 HPT_U8 VendorId[8]; 635 HPT_U8 ProductId[16]; 636 HPT_U8 ProductRevisionLevel[4]; 637 HPT_U32 PortPhyMap; 638 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 639 HPT_U32 reserved[32]; 640 SES_ELEMENT_STATUS ElementStatus[MAX_ELEMENT_COUNT]; 641} ENCLOSURE_INFO_V3, *PENCLOSURE_INFO_V3; 642 643typedef struct _ENCLOSURE_INFO_V4 { 644 HPT_U8 EnclosureType; 645 HPT_U8 NumberOfPhys; 646 HPT_U8 AttachedTo; 647 HPT_U8 Status; 648 HPT_U8 VendorId[8]; 649 HPT_U8 ProductId[16]; 650 HPT_U8 ProductRevisionLevel[4]; 651 HPT_U32 PortPhyMap; 652 HPT_U32 UnitId; /*272x card has two Cores, unitId is used to distinguish them */ 653 HPT_U32 ElementCount; 654 HPT_U32 reserved[32]; 655} ENCLOSURE_INFO_V4, *PENCLOSURE_INFO_V4; 656 657#define ENCLOSURE_STATUS_OFFLINE 1 658 659#define ENCLOSURE_TYPE_INTERNAL 0 660#define ENCLOSURE_TYPE_SMP 1 661#define ENCLOSURE_TYPE_PM 2 662 663#ifndef __KERNEL__ 664/* 665 * time represented in HPT_U32 format 666 */ 667typedef struct _TIME_RECORD { 668 HPT_U32 seconds:6; /* 0 - 59 */ 669 HPT_U32 minutes:6; /* 0 - 59 */ 670 HPT_U32 month:4; /* 1 - 12 */ 671 HPT_U32 hours:6; /* 0 - 59 */ 672 HPT_U32 day:5; /* 1 - 31 */ 673 HPT_U32 year:5; /* 0=2000, 31=2031 */ 674} TIME_RECORD; 675#endif 676 677/* 678 * Array information. 679 */ 680typedef struct _HPT_ARRAY_INFO { 681 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 682 HPT_U8 Description[64]; /* array description */ 683 HPT_U8 CreateManager[16]; /* who created it */ 684 TIME_RECORD CreateTime; /* when created it */ 685 686 HPT_U8 ArrayType; /* array type */ 687 HPT_U8 BlockSizeShift; /* stripe size */ 688 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 689 HPT_U8 SubArrayType; 690 691 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 692 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1]; /* member array/disks */ 693 694 /* 695 * rebuilding progress, xx.xx% = sprintf(s, "%.2f%%", RebuildingProgress/100.0); 696 * only valid if rebuilding is done by driver code. 697 * Member Flags will have ARRAY_FLAG_REBUILDING set at this case. 698 * Verify operation use same fields below, the only difference is 699 * ARRAY_FLAG_VERIFYING is set. 700 */ 701 HPT_U32 RebuildingProgress; 702 HPT_U32 RebuiltSectors; /* rebuilding point (LBA) for single member */ 703 704} HPT_ARRAY_INFO, *PHPT_ARRAY_INFO; 705 706#if HPT_INTERFACE_VERSION>=0x01010000 707typedef struct _HPT_ARRAY_INFO_V2 { 708 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 709 HPT_U8 Description[64]; /* array description */ 710 HPT_U8 CreateManager[16]; /* who created it */ 711 TIME_RECORD CreateTime; /* when created it */ 712 713 HPT_U8 ArrayType; /* array type */ 714 HPT_U8 BlockSizeShift; /* stripe size */ 715 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 716 HPT_U8 SubArrayType; 717 718 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 719 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 720 721 HPT_U32 RebuildingProgress; 722 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 723 724 HPT_U32 reserve4[4]; 725} HPT_ARRAY_INFO_V2, *PHPT_ARRAY_INFO_V2; 726#endif 727 728#if HPT_INTERFACE_VERSION>=0x01020000 729typedef struct _HPT_ARRAY_INFO_V3 { 730 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 731 HPT_U8 Description[64]; /* array description */ 732 HPT_U8 CreateManager[16]; /* who created it */ 733 TIME_RECORD CreateTime; /* when created it */ 734 735 HPT_U8 ArrayType; /* array type */ 736 HPT_U8 BlockSizeShift; /* stripe size */ 737 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 738 HPT_U8 SubArrayType; 739 740 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 741 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2]; /* member array/disks */ 742 743 HPT_U32 RebuildingProgress; 744 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 745 746 DEVICEID TransformSource; 747 DEVICEID TransformTarget; /* destination device ID */ 748 HPT_U32 TransformingProgress; 749 HPT_U32 Signature; /* persistent identification*/ 750#if MAX_ARRAY_MEMBERS_V2==16 751 HPT_U16 Critical_Members; /* bit mask of critical members */ 752 HPT_U16 reserve2; 753 HPT_U32 reserve; 754#else 755 HPT_U32 Critical_Members; 756 HPT_U32 reserve; 757#endif 758} HPT_ARRAY_INFO_V3, *PHPT_ARRAY_INFO_V3; 759#endif 760 761#if HPT_INTERFACE_VERSION>=0x02000001 762typedef struct _HPT_ARRAY_INFO_V4 { 763 HPT_U8 Name[MAX_ARRAYNAME_LEN];/* array name */ 764 HPT_U8 Description[64]; /* array description */ 765 HPT_U8 CreateManager[16]; /* who created it */ 766 TIME_RECORD CreateTime; /* when created it */ 767 768 HPT_U8 ArrayType; /* array type */ 769 HPT_U8 BlockSizeShift; /* stripe size */ 770 HPT_U8 nDisk; /* member count: Number of ID in Members[] */ 771 HPT_U8 SubArrayType; 772 773 HPT_U32 Flags; /* working flags, see ARRAY_FLAG_XXX */ 774 775 HPT_U32 RebuildingProgress; 776 HPT_U64 RebuiltSectors; /* rebuilding point (LBA) for single member */ 777 778 DEVICEID TransformSource; 779 DEVICEID TransformTarget; /* destination device ID */ 780 HPT_U32 TransformingProgress; 781 HPT_U32 Signature; /* persistent identification*/ 782 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 783 HPT_U8 reserved2[7]; 784 HPT_U64 Critical_Members; 785 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3]; /* member array/disks */ 786} HPT_ARRAY_INFO_V4, *PHPT_ARRAY_INFO_V4; 787#endif 788 789 790/* 791 * ATA/ATAPI Device identify data without the Reserved4. 792 */ 793typedef struct _IDENTIFY_DATA2 { 794 HPT_U16 GeneralConfiguration; 795 HPT_U16 NumberOfCylinders; 796 HPT_U16 Reserved1; 797 HPT_U16 NumberOfHeads; 798 HPT_U16 UnformattedBytesPerTrack; 799 HPT_U16 UnformattedBytesPerSector; 800 HPT_U8 SasAddress[8]; 801 HPT_U16 SerialNumber[10]; 802 HPT_U16 BufferType; 803 HPT_U16 BufferSectorSize; 804 HPT_U16 NumberOfEccBytes; 805 HPT_U16 FirmwareRevision[4]; 806 HPT_U16 ModelNumber[20]; 807 HPT_U8 MaximumBlockTransfer; 808 HPT_U8 VendorUnique2; 809 HPT_U16 DoubleWordIo; 810 HPT_U16 Capabilities; 811 HPT_U16 Reserved2; 812 HPT_U8 VendorUnique3; 813 HPT_U8 PioCycleTimingMode; 814 HPT_U8 VendorUnique4; 815 HPT_U8 DmaCycleTimingMode; 816 HPT_U16 TranslationFieldsValid; 817 HPT_U16 NumberOfCurrentCylinders; 818 HPT_U16 NumberOfCurrentHeads; 819 HPT_U16 CurrentSectorsPerTrack; 820 HPT_U32 CurrentSectorCapacity; 821 HPT_U16 CurrentMultiSectorSetting; 822 HPT_U32 UserAddressableSectors; 823 HPT_U8 SingleWordDMASupport; 824 HPT_U8 SingleWordDMAActive; 825 HPT_U8 MultiWordDMASupport; 826 HPT_U8 MultiWordDMAActive; 827 HPT_U8 AdvancedPIOModes; 828 HPT_U8 Reserved4; 829 HPT_U16 MinimumMWXferCycleTime; 830 HPT_U16 RecommendedMWXferCycleTime; 831 HPT_U16 MinimumPIOCycleTime; 832 HPT_U16 MinimumPIOCycleTimeIORDY; 833 HPT_U16 Reserved5[2]; 834 HPT_U16 ReleaseTimeOverlapped; 835 HPT_U16 ReleaseTimeServiceCommand; 836 HPT_U16 MajorRevision; 837 HPT_U16 MinorRevision; 838} __attribute__((packed)) IDENTIFY_DATA2, *PIDENTIFY_DATA2; 839 840/* 841 * physical device information. 842 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 843 */ 844typedef struct _DEVICE_INFO { 845 HPT_U8 ControllerId; /* controller id */ 846 HPT_U8 PathId; /* bus */ 847 HPT_U8 TargetId; /* id */ 848 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 849 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 850 HPT_U8 DeviceType; /* device type */ 851 HPT_U8 UsableMode; /* highest usable mode */ 852 853#ifdef __BIG_ENDIAN_BITFIELD 854 HPT_U8 NCQEnabled: 1; 855 HPT_U8 NCQSupported: 1; 856 HPT_U8 TCQEnabled: 1; 857 HPT_U8 TCQSupported: 1; 858 HPT_U8 WriteCacheEnabled: 1; 859 HPT_U8 WriteCacheSupported: 1; 860 HPT_U8 ReadAheadEnabled: 1; 861 HPT_U8 ReadAheadSupported: 1; 862 HPT_U8 reserved6: 6; 863 HPT_U8 SpinUpMode: 2; 864#else 865 HPT_U8 ReadAheadSupported: 1; 866 HPT_U8 ReadAheadEnabled: 1; 867 HPT_U8 WriteCacheSupported: 1; 868 HPT_U8 WriteCacheEnabled: 1; 869 HPT_U8 TCQSupported: 1; 870 HPT_U8 TCQEnabled: 1; 871 HPT_U8 NCQSupported: 1; 872 HPT_U8 NCQEnabled: 1; 873 HPT_U8 SpinUpMode: 2; 874 HPT_U8 reserved6: 6; 875#endif 876 877 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 878 879 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 880 881} 882__attribute__((packed)) DEVICE_INFO, *PDEVICE_INFO; 883 884#if HPT_INTERFACE_VERSION>=0x01020000 885#define MAX_PARENTS_PER_DISK 8 886/* 887 * physical device information. 888 * IdentifyData.ModelNumber[] is HPT_U8-swapped from the original identify data. 889 */ 890typedef struct _DEVICE_INFO_V2 { 891 HPT_U8 ControllerId; /* controller id */ 892 HPT_U8 PathId; /* bus */ 893 HPT_U8 TargetId; /* id */ 894 HPT_U8 DeviceModeSetting; /* Current Data Transfer mode: 0-4 PIO 0-4 */ 895 /* 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 896 HPT_U8 DeviceType; /* device type */ 897 HPT_U8 UsableMode; /* highest usable mode */ 898 899#ifdef __BIG_ENDIAN_BITFIELD 900 HPT_U8 NCQEnabled: 1; 901 HPT_U8 NCQSupported: 1; 902 HPT_U8 TCQEnabled: 1; 903 HPT_U8 TCQSupported: 1; 904 HPT_U8 WriteCacheEnabled: 1; 905 HPT_U8 WriteCacheSupported: 1; 906 HPT_U8 ReadAheadEnabled: 1; 907 HPT_U8 ReadAheadSupported: 1; 908 HPT_U8 reserved6: 6; 909 HPT_U8 SpinUpMode: 2; 910#else 911 HPT_U8 ReadAheadSupported: 1; 912 HPT_U8 ReadAheadEnabled: 1; 913 HPT_U8 WriteCacheSupported: 1; 914 HPT_U8 WriteCacheEnabled: 1; 915 HPT_U8 TCQSupported: 1; 916 HPT_U8 TCQEnabled: 1; 917 HPT_U8 NCQSupported: 1; 918 HPT_U8 NCQEnabled: 1; 919 HPT_U8 SpinUpMode: 2; 920 HPT_U8 reserved6: 6; 921#endif 922 923 HPT_U32 Flags; /* working flags, see DEVICE_FLAG_XXX */ 924 925 IDENTIFY_DATA2 IdentifyData; /* Identify Data of this device */ 926 927 HPT_U64 TotalFree; 928 HPT_U64 MaxFree; 929 HPT_U64 BadSectors; 930 DEVICEID ParentArrays[MAX_PARENTS_PER_DISK]; 931 932} 933__attribute__((packed)) DEVICE_INFO_V2, *PDEVICE_INFO_V2, DEVICE_INFO_V3, *PDEVICE_INFO_V3; 934 935/* 936 * HPT601 information 937 */ 938#endif 939/* 940 * HPT601 information 941 */ 942#define HPT601_INFO_DEVICEID 1 943#define HPT601_INFO_TEMPERATURE 2 944#define HPT601_INFO_FANSTATUS 4 945#define HPT601_INFO_BEEPERCONTROL 8 946#define HPT601_INFO_LED1CONTROL 0x10 947#define HPT601_INFO_LED2CONTROL 0x20 948#define HPT601_INFO_POWERSTATUS 0x40 949 950typedef struct _HPT601_INFO_ { 951 HPT_U16 ValidFields; /* mark valid fields below */ 952 HPT_U16 DeviceId; /* 0x5A3E */ 953 HPT_U16 Temperature; /* Read: temperature sensor value. Write: temperature limit */ 954 HPT_U16 FanStatus; /* Fan status */ 955 HPT_U16 BeeperControl; /* bit4: beeper control bit. bit0-3: frequency bits */ 956 HPT_U16 LED1Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 957 HPT_U16 LED2Control; /* bit4: twinkling control bit. bit0-3: frequency bits */ 958 HPT_U16 PowerStatus; /* 1: has power 2: no power */ 959} HPT601_INFO, *PHPT601_INFO; 960 961#if HPT_INTERFACE_VERSION>=0x01010000 962#ifndef __KERNEL__ 963/* cache policy for each vdev, copied from ldm.h */ 964#define CACHE_POLICY_NONE 0 965#define CACHE_POLICY_WRITE_THROUGH 1 966#define CACHE_POLICY_WRITE_BACK 2 967 968#endif 969#endif 970/* 971 * Logical device information. 972 * Union of ArrayInfo and DeviceInfo. 973 * Common properties will be put in logical device information. 974 */ 975typedef struct _LOGICAL_DEVICE_INFO { 976 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 977 HPT_U8 reserved[3]; 978 979 HPT_U32 Capacity; /* array capacity */ 980 DEVICEID ParentArray; 981 982 union { 983 HPT_ARRAY_INFO array; 984 DEVICE_INFO device; 985 } __attribute__((packed)) u; 986 987} __attribute__((packed)) LOGICAL_DEVICE_INFO, *PLOGICAL_DEVICE_INFO; 988 989#if HPT_INTERFACE_VERSION>=0x01010000 990typedef struct _LOGICAL_DEVICE_INFO_V2 { 991 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 992 HPT_U8 reserved[3]; 993 994 HPT_U64 Capacity; /* array capacity */ 995 DEVICEID ParentArray; /* for physical device, Please don't use this field. 996 * use ParentArrays field in DEVICE_INFO_V2 997 */ 998 999 union { 1000 HPT_ARRAY_INFO_V2 array; 1001 DEVICE_INFO device; 1002 } __attribute__((packed)) u; 1003 1004} __attribute__((packed)) LOGICAL_DEVICE_INFO_V2, *PLOGICAL_DEVICE_INFO_V2; 1005#endif 1006 1007#if HPT_INTERFACE_VERSION>=0x01020000 1008#define INVALID_TARGET_ID 0xFF 1009#define INVALID_BUS_ID 0xFF 1010typedef struct _LOGICAL_DEVICE_INFO_V3 { 1011 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1012 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1013 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1014 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1015 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1016 HPT_U64 Capacity; /* array capacity */ 1017 DEVICEID ParentArray; /* for physical device, don't use this field. 1018 * use ParentArrays field in DEVICE_INFO_V2 instead. 1019 */ 1020 HPT_U32 TotalIOs; 1021 HPT_U32 TobalMBs; 1022 HPT_U32 IOPerSec; 1023 HPT_U32 MBPerSec; 1024 1025 union { 1026 HPT_ARRAY_INFO_V3 array; 1027 DEVICE_INFO_V2 device; 1028 } __attribute__((packed)) u; 1029 1030} 1031__attribute__((packed)) LOGICAL_DEVICE_INFO_V3, *PLOGICAL_DEVICE_INFO_V3; 1032#endif 1033 1034#if HPT_INTERFACE_VERSION>=0x02000001 1035typedef struct _LOGICAL_DEVICE_INFO_V4 { 1036 HPT_U32 dwSize; 1037 HPT_U8 revision; 1038 HPT_U8 reserved[7]; 1039 1040 HPT_U8 Type; /* LDT_ARRAY or LDT_DEVICE */ 1041 HPT_U8 CachePolicy; /* refer to CACHE_POLICY_xxx */ 1042 HPT_U8 VBusId; /* vbus sequence in vbus_list */ 1043 HPT_U8 TargetId; /* OS target id. Value 0xFF is invalid */ 1044 /* OS disk name: HPT DISK $VBusId_$TargetId */ 1045 HPT_U64 Capacity; /* array capacity */ 1046 DEVICEID ParentArray; /* for physical device, don't use this field. 1047 * use ParentArrays field in DEVICE_INFO_V2 instead. 1048 */ 1049 HPT_U32 TotalIOs; 1050 HPT_U32 TobalMBs; 1051 HPT_U32 IOPerSec; 1052 HPT_U32 MBPerSec; 1053 1054 union { 1055 HPT_ARRAY_INFO_V4 array; 1056 DEVICE_INFO_V3 device; 1057 } __attribute__((packed)) u; 1058} 1059__attribute__((packed)) LOGICAL_DEVICE_INFO_V4, *PLOGICAL_DEVICE_INFO_V4; 1060 1061/*LOGICAL_DEVICE_INFO_V4 max revision number*/ 1062#define LOGICAL_DEVICE_INFO_V4_REVISION 0 1063/*If new revision was defined please check evey revision size*/ 1064#define LOGICAL_DEVICE_INFO_V4_R0_SIZE (sizeof(LOGICAL_DEVICE_INFO_V4)) 1065#endif 1066 1067/* 1068 * ALTERABLE_ARRAY_INFO and ALTERABLE_DEVICE_INFO, used in set_array_info() 1069 * and set_device_info(). 1070 * When set_xxx_info() is called, the ValidFields member indicates which 1071 * fields in the structure are valid. 1072 */ 1073/* field masks */ 1074#define AAIF_NAME 1 1075#define AAIF_DESCRIPTION 2 1076 1077#define ADIF_MODE 1 1078#define ADIF_TCQ 2 1079#define ADIF_NCQ 4 1080#define ADIF_WRITE_CACHE 8 1081#define ADIF_READ_AHEAD 0x10 1082#define ADIF_SPIN_UP_MODE 0x20 1083#define ADIF_SET_BAD 0x40 1084 1085typedef struct _ALTERABLE_ARRAY_INFO { 1086 HPT_U32 ValidFields; /* mark valid fields below */ 1087 HPT_U8 Name[MAX_ARRAYNAME_LEN]; /* array name */ 1088 HPT_U8 Description[64]; /* array description */ 1089}__attribute__((packed))ALTERABLE_ARRAY_INFO, *PALTERABLE_ARRAY_INFO; 1090 1091typedef struct _ALTERABLE_DEVICE_INFO { 1092 HPT_U32 ValidFields; /* mark valid fields below */ 1093 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1094}__attribute__((packed))ALTERABLE_DEVICE_INFO, *PALTERABLE_DEVICE_INFO; 1095 1096typedef struct _ALTERABLE_DEVICE_INFO_V2 { 1097 HPT_U32 ValidFields; /* mark valid fields below */ 1098 HPT_U8 DeviceModeSetting; /* 0-4 PIO 0-4, 5-7 MW DMA0-2, 8-13 UDMA0-5 */ 1099 HPT_U8 TCQEnabled; 1100 HPT_U8 NCQEnabled; 1101 HPT_U8 WriteCacheEnabled; 1102 HPT_U8 ReadAheadEnabled; 1103 HPT_U8 SpinUpMode; 1104 HPT_U8 SetBadSector; 1105 HPT_U8 reserve[1]; 1106 HPT_U32 reserve2[13]; /* pad to 64 bytes */ 1107}__attribute__((packed))ALTERABLE_DEVICE_INFO_V2, *PALTERABLE_DEVICE_INFO_V2; 1108 1109#if HPT_INTERFACE_VERSION>=0x01020000 1110 1111#define TARGET_TYPE_DEVICE 0 1112#define TARGET_TYPE_ARRAY 1 1113 1114 1115#define AIT_NAME 0 1116#define AIT_DESCRIPTION 1 1117#define AIT_CACHE_POLICY 2 1118 1119 1120#define DIT_MODE 0 1121#define DIT_READ_AHEAD 1 1122#define DIT_WRITE_CACHE 2 1123#define DIT_TCQ 3 1124#define DIT_NCQ 4 1125#define DIT_IDENTIFY 5 1126 1127#define DISK_CACHE_POLICY_UNCHANGE 0 1128#define DISK_CACHE_POLICY_ENABLE 1 1129#define DISK_CACHE_POLICY_DISABLE 2 1130 1131/* param type is determined by target_type and info_type*/ 1132typedef struct _SET_DEV_INFO 1133{ 1134 HPT_U8 target_type; 1135 HPT_U8 infor_type; 1136 HPT_U16 param_length; 1137 #define SET_VDEV_INFO_param(p) ((HPT_U8 *)(p)+sizeof(SET_VDEV_INFO)) 1138 /* HPT_U8 param[0]; */ 1139} SET_VDEV_INFO, * PSET_VDEV_INFO; 1140 1141typedef HPT_U8 PARAM_ARRAY_NAME[MAX_ARRAYNAME_LEN] ; 1142typedef HPT_U8 PARAM_ARRAY_DES[64]; 1143typedef HPT_U8 PARAM_DEVICE_MODE, PARAM_TCQ, PARAM_NCQ, PARAM_READ_AHEAD, PARAM_WRITE_CACHE, PARAM_CACHE_POLICY; 1144 1145#endif 1146 1147/* 1148 * CREATE_ARRAY_PARAMS 1149 * Param structure used to create an array. 1150 */ 1151typedef struct _CREATE_ARRAY_PARAMS { 1152 HPT_U8 ArrayType; /* 1-level array type */ 1153 HPT_U8 nDisk; /* number of elements in Members[] array */ 1154 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1155 HPT_U8 CreateFlags; /* See CAF_xxx */ 1156 1157 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1158 HPT_U8 Description[64]; /* array description */ 1159 HPT_U8 CreateManager[16]; /* who created it */ 1160 TIME_RECORD CreateTime; /* when created it */ 1161 1162 HPT_U32 Members[MAX_ARRAY_MEMBERS_V1];/* ID of array members, a member can be an array */ 1163 1164} CREATE_ARRAY_PARAMS, *PCREATE_ARRAY_PARAMS; 1165 1166#if HPT_INTERFACE_VERSION>=0x01010000 1167typedef struct _CREATE_ARRAY_PARAMS_V2 { 1168 HPT_U8 ArrayType; /* 1-level array type */ 1169 HPT_U8 nDisk; /* number of elements in Members[] array */ 1170 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1171 HPT_U8 CreateFlags; /* See CAF_xxx */ 1172 1173 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1174 HPT_U8 Description[64]; /* array description */ 1175 HPT_U8 CreateManager[16]; /* who created it */ 1176 TIME_RECORD CreateTime; /* when created it */ 1177 HPT_U64 Capacity; 1178 1179 HPT_U32 Members[MAX_ARRAY_MEMBERS_V2];/* ID of array members, a member can be an array */ 1180 1181} CREATE_ARRAY_PARAMS_V2, *PCREATE_ARRAY_PARAMS_V2; 1182#endif 1183 1184#if HPT_INTERFACE_VERSION>=0x02000001 1185typedef struct _CREATE_ARRAY_PARAMS_V3 { 1186 HPT_U32 dwSize; 1187 HPT_U8 revision; /*CREATE_ARRAY_PARAMS_V3_REVISION*/ 1188 HPT_U8 diskCachePolicy; /*unchange:0 enable:1 disable:2*/ 1189 HPT_U8 reserved[4]; 1190 HPT_U8 subDisks; /* RAIDn0 sub array */ 1191 HPT_U8 SectorSizeShift; /*sector size = 512B<<SectorSizeShift*/ 1192 HPT_U8 ArrayType; /* 1-level array type */ 1193 HPT_U8 nDisk; /* number of elements in Members[] array */ 1194 HPT_U8 BlockSizeShift; /* Stripe size if ArrayType==AT_RAID0 / AT_RAID5 */ 1195 HPT_U8 CreateFlags; /* See CAF_xxx */ 1196 1197 HPT_U8 ArrayName[MAX_ARRAYNAME_LEN];/* Array name */ 1198 HPT_U8 Description[64]; /* array description */ 1199 HPT_U8 CreateManager[16]; /* who created it */ 1200 TIME_RECORD CreateTime; /* when created it */ 1201 HPT_U64 Capacity; 1202 1203 HPT_U32 Members[MAX_ARRAY_MEMBERS_V3];/* ID of array members, a member can be an array */ 1204} CREATE_ARRAY_PARAMS_V3, *PCREATE_ARRAY_PARAMS_V3; 1205 1206/*CREATE_ARRAY_PARAMS_V3 current max revision*/ 1207#define CREATE_ARRAY_PARAMS_V3_REVISION 0 1208/*If new revision defined please check evey revision size*/ 1209#define CREATE_ARRAY_PARAMS_V3_R0_SIZE (sizeof(CREATE_ARRAY_PARAMS_V3)) 1210#endif 1211 1212#if HPT_INTERFACE_VERSION < 0x01020000 1213/* 1214 * Flags used for creating an RAID 1 array 1215 * 1216 * CAF_CREATE_AND_DUPLICATE 1217 * Copy source disk contents to target for RAID 1. If user choose "create and duplicate" 1218 * to create an array, GUI will call CreateArray() with this flag set. Then GUI should 1219 * call hpt_get_device_info() with the returned array ID and check returned flags to 1220 * see if ARRAY_FLAG_REBUILDING is set. If not set, driver does not support rebuilding 1221 * and GUI must do duplication itself. 1222 * CAF_DUPLICATE_MUST_DONE 1223 * If the duplication is aborted or fails, do not create the array. 1224 */ 1225#define CAF_CREATE_AND_DUPLICATE 1 1226#define CAF_DUPLICATE_MUST_DONE 2 1227#define CAF_CREATE_AS_RAID15 4 1228/* 1229 * Flags used for creating an RAID 5 array 1230 */ 1231#define CAF_CREATE_R5_NO_BUILD 1 1232#define CAF_CREATE_R5_ZERO_INIT 2 1233#define CAF_CREATE_R5_BUILD_PARITY 4 1234 1235#else 1236/* 1237 * Flags used for creating 1238 */ 1239#define CAF_FOREGROUND_INITIALIZE 1 1240#define CAF_BACKGROUND_INITIALIZE 2 1241#define CAF_CREATE_R5_WRITE_BACK (CACHE_POLICY_WRITE_BACK<<CAF_CACHE_POLICY_SHIFT) 1242 1243 1244#define CAF_CACHE_POLICY_MASK 0x1C 1245#define CAF_CACHE_POLICY_SHIFT 2 1246 1247#endif 1248 1249#define CAF_KEEP_DATA_ALWAYS 0x80 1250 1251/* Flags used for deleting an array 1252 * 1253 * DAF_KEEP_DATA_IF_POSSIBLE 1254 * If this flag is set, deleting a RAID 1 array will not destroy the data on both disks. 1255 * Deleting a JBOD should keep partitions on first disk ( not implement now ). 1256 * Deleting a RAID 0/1 should result as two RAID 0 array ( not implement now ). 1257 */ 1258#define DAF_KEEP_DATA_IF_POSSIBLE 1 1259#define DAF_KEEP_DATA_ALWAYS 2 1260 1261/* 1262 * event types 1263 */ 1264#define ET_DEVICE_REMOVED 1 /* device removed */ 1265#define ET_DEVICE_PLUGGED 2 /* device plugged */ 1266#define ET_DEVICE_ERROR 3 /* device I/O error */ 1267#define ET_REBUILD_STARTED 4 1268#define ET_REBUILD_ABORTED 5 1269#define ET_REBUILD_FINISHED 6 1270#define ET_SPARE_TOOK_OVER 7 1271#define ET_REBUILD_FAILED 8 1272#define ET_VERIFY_STARTED 9 1273#define ET_VERIFY_ABORTED 10 1274#define ET_VERIFY_FAILED 11 1275#define ET_VERIFY_FINISHED 12 1276#define ET_INITIALIZE_STARTED 13 1277#define ET_INITIALIZE_ABORTED 14 1278#define ET_INITIALIZE_FAILED 15 1279#define ET_INITIALIZE_FINISHED 16 1280#define ET_VERIFY_DATA_ERROR 17 1281#define ET_TRANSFORM_STARTED 18 1282#define ET_TRANSFORM_ABORTED 19 1283#define ET_TRANSFORM_FAILED 20 1284#define ET_TRANSFORM_FINISHED 21 1285#define ET_SMART_FAILED 22 1286#define ET_SMART_PASSED 23 1287#define ET_SECTOR_REPAIR_FAIL 24 1288#define ET_SECTOR_REPAIR_SUCCESS 25 1289#define ET_ERASE_FAIL 26 1290#define ET_ERASE_SUCCESS 27 1291#define ET_CONTINUE_REBUILD_ON_ERROR 28 1292 1293 1294/* 1295 * event structure 1296 */ 1297typedef struct _HPT_EVENT { 1298 TIME_RECORD Time; 1299 DEVICEID DeviceID; 1300 HPT_U8 EventType; 1301 HPT_U8 reserved[3]; 1302 1303 HPT_U8 Data[32]; /* various data depend on EventType */ 1304} HPT_EVENT, *PHPT_EVENT; 1305 1306/* 1307 * IDE pass-through command. Use it at your own risk! 1308 */ 1309typedef struct _IDE_PASS_THROUGH_HEADER { 1310 DEVICEID idDisk; /* disk ID */ 1311 HPT_U8 bFeaturesReg; /* feature register */ 1312 HPT_U8 bSectorCountReg; /* IDE sector count register. */ 1313 HPT_U8 bLbaLowReg; /* IDE LBA low value. */ 1314 HPT_U8 bLbaMidReg; /* IDE LBA mid register. */ 1315 HPT_U8 bLbaHighReg; /* IDE LBA high value. */ 1316 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1317 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1318 HPT_U8 nSectors; /* data size in sectors, if the command has data transfer */ 1319 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1320 HPT_U8 reserve[3]; 1321 #define IDE_PASS_THROUGH_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER)) 1322 /* HPT_U8 DataBuffer[0]; */ 1323} 1324IDE_PASS_THROUGH_HEADER, *PIDE_PASS_THROUGH_HEADER; 1325 1326typedef struct _IDE_PASS_THROUGH_HEADER_V2 { 1327 DEVICEID idDisk; /* disk ID */ 1328 HPT_U16 bFeaturesReg; /* feature register */ 1329 HPT_U16 bSectorCountReg; /* IDE sector count register. */ 1330 HPT_U16 bLbaLowReg; /* IDE LBA low value. */ 1331 HPT_U16 bLbaMidReg; /* IDE LBA mid register. */ 1332 HPT_U16 bLbaHighReg; /* IDE LBA high value. */ 1333 HPT_U8 bDriveHeadReg; /* IDE drive/head register. */ 1334 HPT_U8 bCommandReg; /* Actual IDE command. Checked for validity by driver. */ 1335 HPT_U16 nSectors; /* data size in sectors, if the command has data transfer */ 1336 HPT_U8 protocol; /* IO_COMMAND_(READ,WRITE) or zero for non-DATA */ 1337 HPT_U8 reserve; 1338 #define IDE_PASS_THROUGH_V2_buffer(p) ((HPT_U8 *)(p) + sizeof(IDE_PASS_THROUGH_HEADER_V2)) 1339 /* HPT_U8 DataBuffer[0]; */ 1340} 1341IDE_PASS_THROUGH_HEADER_V2, *PIDE_PASS_THROUGH_HEADER_V2; 1342 1343typedef struct _HPT_SCSI_PASSTHROUGH_IN { 1344 DEVICEID idDisk; 1345 HPT_U8 protocol; 1346 HPT_U8 reserve1; 1347 HPT_U8 reserve2; 1348 HPT_U8 cdbLength; 1349 HPT_U8 cdb[16]; 1350 HPT_U32 dataLength; 1351 /* data follows, if any */ 1352} 1353HPT_SCSI_PASSTHROUGH_IN, *PHPT_SCSI_PASSTHROUGH_IN; 1354 1355typedef struct _HPT_SCSI_PASSTHROUGH_OUT { 1356 HPT_U8 scsiStatus; 1357 HPT_U8 reserve1; 1358 HPT_U8 reserve2; 1359 HPT_U8 reserve3; 1360 HPT_U32 dataLength; 1361 /* data/sense follows if any */ 1362} 1363HPT_SCSI_PASSTHROUGH_OUT, *PHPT_SCSI_PASSTHROUGH_OUT; 1364 1365/* 1366 * device io packet format 1367 */ 1368typedef struct _DEVICE_IO_EX_PARAMS { 1369 DEVICEID idDisk; 1370 HPT_U32 Lba; 1371 HPT_U16 nSectors; 1372 HPT_U8 Command; /* IO_COMMAD_xxx */ 1373 HPT_U8 BufferType; /* BUFFER_TYPE_xxx, see below */ 1374 HPT_U32 BufferPtr; 1375} 1376DEVICE_IO_EX_PARAMS, *PDEVICE_IO_EX_PARAMS; 1377 1378#define BUFFER_TYPE_LOGICAL 1 /* logical pointer to buffer */ 1379#define BUFFER_TYPE_PHYSICAL 2 /* physical address of buffer */ 1380#define BUFFER_TYPE_LOGICAL_LOGICAL_SG 3 /* logical pointer to logical S/G table */ 1381#define BUFFER_TYPE_LOGICAL_PHYSICAL_SG 4 /* logical pointer to physical S/G table */ 1382#define BUFFER_TYPE_PHYSICAL_LOGICAL_SG 5 /* physical address to logical S/G table */ 1383#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG 6 /* physical address of physical S/G table */ 1384#define BUFFER_TYPE_PHYSICAL_PHYSICAL_SG_PIO 7 /* non DMA capable physical address of physical S/G table */ 1385 1386typedef struct _HPT_DRIVER_PARAMETER { 1387 char name[32]; 1388 HPT_U8 value[32]; 1389 HPT_U8 type; /* HPT_DRIVER_PARAMETER_TYPE_* */ 1390 HPT_U8 persistent; 1391 HPT_U8 reserve2[2]; 1392 HPT_U8 location; /* 0 - system */ 1393 HPT_U8 controller; 1394 HPT_U8 bus; 1395 HPT_U8 reserve1; 1396 char desc[128]; 1397} 1398HPT_DRIVER_PARAMETER, *PHPT_DRIVER_PARAMETER; 1399 1400#define HPT_DRIVER_PARAMETER_TYPE_INT 1 1401#define HPT_DRIVER_PARAMETER_TYPE_BOOL 2 1402 1403typedef struct _HPT_PM_CMDSTAT { 1404 HPT_U64 timeStamp; 1405 HPT_U64 lba; 1406 HPT_U16 sectors; 1407 HPT_U16 reserved; 1408 HPT_U32 rspTime; 1409} 1410HPT_PM_CMDSTAT, *PHPT_PM_CMDSTAT; 1411 1412#define HIGHEST_RSPTIME_CMD_SAVE 10 1413#define RSPTIME_HISTOGRAM_SEGMENT_COUNT 38 1414 1415typedef struct _HPT_PM_IOSTAT { 1416 HPT_PM_CMDSTAT highestRspCmdStatData[HIGHEST_RSPTIME_CMD_SAVE]; 1417 HPT_U32 rspTimeHistogram[RSPTIME_HISTOGRAM_SEGMENT_COUNT]; 1418 HPT_U16 pendingIo; 1419 HPT_U16 activeIo; 1420 HPT_U32 instantKBPs; 1421 HPT_U32 averageKBPs; 1422 HPT_U32 instantIOPs; 1423 HPT_U32 averageIOPs; 1424} 1425HPT_PM_IOSTAT, *PHPT_PM_IOSTAT; 1426 1427/* 1428 * disk config region 1429 */ 1430typedef struct _ACCESS_CONFIG_REG { 1431 DEVICEID id; 1432 HPT_U16 start; 1433 HPT_U8 sectors; 1434 HPT_U8 read; 1435 HPT_U32 Reserved; 1436 #define ACCESS_CONFIG_REG_buffer(p) ((HPT_U8 *)(p) + sizeof(ACCESS_CONFIG_REG_PARAMS)) 1437} __attribute__((packed))ACCESS_CONFIG_REG_PARAMS, *PACCESS_CONFIG_REG_PARAMS; 1438 1439/* 1440 * dump meta data 1441 */ 1442typedef struct _DUMP_METADATA { 1443 DEVICEID id; 1444 HPT_U8 sectors; 1445 HPT_U8 backsectors; 1446 HPT_U8 offset; 1447 HPT_U8 backoffset; 1448} __attribute__((packed))DUMP_METADATA_PARAMS, *PDUMP_METADATA_PARAMS; 1449 1450 1451 1452/* 1453 * ioctl structure 1454 */ 1455#define HPT_IOCTL_MAGIC32 0x1A2B3C4D 1456#define HPT_IOCTL_MAGIC 0xA1B2C3D4 1457 1458typedef struct _HPT_IOCTL_PARAM { 1459 HPT_U32 Magic; /* used to check if it's a valid ioctl packet */ 1460 HPT_U32 dwIoControlCode; /* operation control code */ 1461 HPT_PTR lpInBuffer; /* input data buffer */ 1462 HPT_U32 nInBufferSize; /* size of input data buffer */ 1463 HPT_PTR lpOutBuffer; /* output data buffer */ 1464 HPT_U32 nOutBufferSize; /* size of output data buffer */ 1465 HPT_PTR lpBytesReturned; /* count of HPT_U8s returned */ 1466} 1467HPT_IOCTL_PARAM, *PHPT_IOCTL_PARAM; 1468 1469/* for 32-bit app running on 64-bit system */ 1470typedef struct _HPT_IOCTL_PARAM32 { 1471 HPT_U32 Magic; 1472 HPT_U32 dwIoControlCode; 1473 HPT_U32 lpInBuffer; 1474 HPT_U32 nInBufferSize; 1475 HPT_U32 lpOutBuffer; 1476 HPT_U32 nOutBufferSize; 1477 HPT_U32 lpBytesReturned; 1478} 1479HPT_IOCTL_PARAM32, *PHPT_IOCTL_PARAM32; 1480 1481#if !defined(__KERNEL__) || defined(SIMULATE) 1482/* 1483 * User-mode ioctl parameter passing conventions: 1484 * The ioctl function implementation is platform specific, so we don't 1485 * have forced rules for it. However, it's suggested to use a parameter 1486 * passing method as below 1487 * 1) Put all input data continuously in an input buffer. 1488 * 2) Prepare an output buffer with enough size if needed. 1489 * 3) Fill a HPT_IOCTL_PARAM structure. 1490 * 4) Pass the structure to driver through a platform-specific method. 1491 * This is implemented in the mid-layer user-mode library. The UI 1492 * programmer needn't care about it. 1493 */ 1494 1495/************************************************************************ 1496 * User mode functions 1497 ************************************************************************/ 1498/* 1499 * hpt_get_version 1500 * Version compatibility: all versions 1501 * Parameters: 1502 * None 1503 * Returns: 1504 * interface version. 0 when fail. 1505 */ 1506HPT_U32 hpt_get_version(void); 1507 1508/* 1509 * hpt_get_driver_capabilities 1510 * Version compatibility: v1.0.0.2 or later 1511 * Parameters: 1512 * Pointer to receive a DRIVE_CAPABILITIES structure. The caller must set 1513 * dwSize member to sizeof(DRIVER_CAPABILITIES). The callee must check this 1514 * member to see if it's correct. 1515 * Returns: 1516 * 0 - Success 1517 */ 1518int hpt_get_driver_capabilities(PDRIVER_CAPABILITIES cap); 1519int hpt_get_driver_capabilities_v2(PDRIVER_CAPABILITIES_V2 cap); 1520 1521/* 1522 * hpt_get_controller_count 1523 * Version compatibility: v1.0.0.1 or later 1524 * Parameters: 1525 * None 1526 * Returns: 1527 * number of controllers 1528 */ 1529int hpt_get_controller_count(void); 1530 1531/* hpt_get_controller_info 1532 * Version compatibility: v1.0.0.1 or later 1533 * Parameters: 1534 * id Controller id 1535 * pInfo pointer to CONTROLLER_INFO buffer 1536 * Returns: 1537 * 0 Success, controller info is put into (*pInfo ). 1538 */ 1539int hpt_get_controller_info(int id, PCONTROLLER_INFO pInfo); 1540 1541#if HPT_INTERFACE_VERSION>=0x01020000 1542/* hpt_get_controller_info_v2 1543 * Version compatibility: v2.0.0.0 or later 1544 * Parameters: 1545 * id Controller id 1546 * pInfo pointer to CONTROLLER_INFO_V2 buffer 1547 * Returns: 1548 * 0 Success, controller info is put into (*pInfo ). 1549 */ 1550int hpt_get_controller_info_v2(int id, PCONTROLLER_INFO_V2 pInfo); 1551 1552/* hpt_get_controller_info_v2_ext 1553 * Version compatibility: v2.0.0.0 or later 1554 * Parameters: 1555 * id Controller id 1556 * pInfo pointer to CONTROLLER_INFO_V2_EXT buffer 1557 * Returns: 1558 * 0 Success, controller info is put into (*pInfo ). 1559 */ 1560int hpt_get_controller_info_v2_ext(int id, PCONTROLLER_INFO_V2_EXT pInfo); 1561 1562/* hpt_get_controller_info_v3 1563 * Version compatibility: v2.0.0.0 or later 1564 * Parameters: 1565 * id Controller id 1566 * pInfo pointer to CONTROLLER_INFO_V3 buffer 1567 * Returns: 1568 * 0 Success, controller info is put into (*pInfo ). 1569 */ 1570int hpt_get_controller_info_v3(int id, PCONTROLLER_INFO_V3 pInfo); 1571#endif 1572 1573/* hpt_get_channel_info 1574 * Version compatibility: v1.0.0.1 or later 1575 * Parameters: 1576 * id Controller id 1577 * bus bus number 1578 * pInfo pointer to CHANNEL_INFO buffer 1579 * Returns: 1580 * 0 Success, channel info is put into (*pInfo ). 1581 */ 1582int hpt_get_channel_info(int id, int bus, PCHANNEL_INFO pInfo); 1583 1584/* hpt_get_channel_info_v2 1585 * Version compatibility: v1.0.0.1 or later 1586 * Parameters: 1587 * id Controller id 1588 * bus bus number 1589 * pInfo pointer to CHANNEL_INFO buffer 1590 * Returns: 1591 * 0 Success, channel info is put into (*pInfo ). 1592 */ 1593int hpt_get_channel_info_v2(int id, int bus, PCHANNEL_INFO_V2 pInfo); 1594 1595/* hpt_get_logical_devices 1596 * Version compatibility: v1.0.0.1 or later 1597 * Parameters: 1598 * pIds pointer to a DEVICEID array 1599 * nMaxCount array size 1600 * Returns: 1601 * Number of ID returned. All logical device IDs are put into pIds array. 1602 * Note: A spare disk is not a logical device. 1603 */ 1604int hpt_get_logical_devices(DEVICEID * pIds, int nMaxCount); 1605 1606/* hpt_get_physical_devices 1607 * Version compatibility: v2.1.0.0 or later 1608 * Parameters: 1609 * pIds pointer to a DEVICEID array 1610 * nMaxCount array size 1611 * Returns: 1612 * Number of ID returned. All physical device IDs are put into pIds array. 1613 */ 1614int hpt_get_physical_devices(DEVICEID * pIds, int nMaxCount); 1615 1616/* hpt_get_device_info 1617 * Version compatibility: v1.0.0.1 or later 1618 * Parameters: 1619 * id logical device id 1620 * pInfo pointer to LOGICAL_DEVICE_INFO structure 1621 * Returns: 1622 * 0 - Success 1623 */ 1624int hpt_get_device_info(DEVICEID id, PLOGICAL_DEVICE_INFO pInfo); 1625 1626/* hpt_create_array 1627 * Version compatibility: v1.0.0.1 or later 1628 * Parameters: 1629 * pParam pointer to CREATE_ARRAY_PARAMS structure 1630 * Returns: 1631 * 0 failed 1632 * else return array id 1633 */ 1634DEVICEID hpt_create_array(PCREATE_ARRAY_PARAMS pParam); 1635 1636/* hpt_delete_array 1637 * Version compatibility: v1.0.0.1 or later 1638 * Parameters: 1639 * id array id 1640 * Returns: 1641 * 0 Success 1642 */ 1643int hpt_delete_array(DEVICEID id, HPT_U32 options); 1644 1645/* hpt_device_io 1646 * Read/write data on array and physcal device. 1647 * Version compatibility: v1.0.0.1 or later 1648 * Parameters: 1649 * id device id. If it's an array ID, IO will be performed on the array. 1650 * If it's a physical device ID, IO will be performed on the device. 1651 * cmd IO_COMMAND_READ or IO_COMMAND_WRITE 1652 * buffer data buffer 1653 * length data size 1654 * Returns: 1655 * 0 Success 1656 */ 1657int hpt_device_io(DEVICEID id, int cmd, HPT_U32 lba, HPT_U32 nSector, void * buffer); 1658 1659/* hpt_add_disk_to_array 1660 * Used to dynamicly add a disk to an RAID1, RAID0/1, RAID1/0 or RAID5 array. 1661 * Auto-rebuild will start. 1662 * Version compatibility: v1.0.0.1 or later 1663 * Parameters: 1664 * idArray array id 1665 * idDisk disk id 1666 * Returns: 1667 * 0 Success 1668 */ 1669int hpt_add_disk_to_array(DEVICEID idArray, DEVICEID idDisk); 1670 1671/* hpt_add_spare_disk 1672 * Version compatibility: v1.0.0.1 or later 1673 * Add a disk to spare pool. 1674 * Parameters: 1675 * idDisk disk id 1676 * Returns: 1677 * 0 Success 1678 */ 1679int hpt_add_spare_disk(DEVICEID idDisk); 1680 1681/* hpt_add_dedicated_spare 1682 * Version compatibility: v1.0.0.3 or later 1683 * Add a spare disk to an array 1684 * Parameters: 1685 * idDisk disk id 1686 * idArray array id 1687 * Returns: 1688 * 0 Success 1689 */ 1690int hpt_add_dedicated_spare(DEVICEID idDisk, DEVICEID idArray); 1691 1692/* hpt_remove_spare_disk 1693 * remove a disk from spare pool. 1694 * Version compatibility: v1.0.0.1 or later 1695 * Parameters: 1696 * idDisk disk id 1697 * Returns: 1698 * 0 Success 1699 */ 1700int hpt_remove_spare_disk(DEVICEID idDisk); 1701 1702/* hpt_get_event 1703 * Used to poll events from driver. 1704 * Version compatibility: v1.0.0.1 or later 1705 * Parameters: 1706 * pEvent pointer to HPT_EVENT structure 1707 * Returns: 1708 * 0 Success, event info is filled in *pEvent 1709 */ 1710int hpt_get_event(PHPT_EVENT pEvent); 1711 1712/* hpt_rebuild_data_block 1713 * Used to copy data from source disk and mirror disk. 1714 * Version compatibility: v1.0.0.1 or later 1715 * Parameters: 1716 * idArray Array ID (RAID1, 0/1 or RAID5) 1717 * Lba Start LBA for each array member 1718 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 1719 * 1720 * Returns: 1721 * 0 Success, event info is filled in *pEvent 1722 */ 1723int hpt_rebuild_data_block(DEVICEID idMirror, HPT_U32 Lba, HPT_U8 nSector); 1724#define hpt_rebuild_mirror(p1, p2, p3) hpt_rebuild_data_block(p1, p2, p3) 1725 1726/* hpt_set_array_state 1727 * set array state. 1728 * Version compatibility: v1.0.0.1 or later 1729 * Parameters: 1730 * idArray Array ID 1731 * state See above 'array states' constants, possible values are: 1732 * MIRROR_REBUILD_START 1733 * Indicate that GUI wants to rebuild a mirror array 1734 * MIRROR_REBUILD_ABORT 1735 * GUI wants to abort rebuilding an array 1736 * MIRROR_REBUILD_COMPLETE 1737 * GUI finished to rebuild an array. If rebuild is done by driver this 1738 * state has no use 1739 * 1740 * Returns: 1741 * 0 Success 1742 */ 1743int hpt_set_array_state(DEVICEID idArray, HPT_U32 state); 1744 1745/* hpt_set_array_info 1746 * set array info. 1747 * Version compatibility: v1.0.0.1 or later 1748 * Parameters: 1749 * idArray Array ID 1750 * pInfo pointer to new info 1751 * 1752 * Returns: 1753 * 0 Success 1754 */ 1755int hpt_set_array_info(DEVICEID idArray, PALTERABLE_ARRAY_INFO pInfo); 1756 1757/* hpt_set_device_info 1758 * set device info. 1759 * Version compatibility: v1.0.0.1 or later 1760 * Parameters: 1761 * idDisk device ID 1762 * pInfo pointer to new info 1763 * 1764 * Returns: 1765 * 0 Success 1766 * Additional notes: 1767 * If idDisk==0, call to this function will stop buzzer on the adapter 1768 * (if supported by driver). 1769 */ 1770int hpt_set_device_info(DEVICEID idDisk, PALTERABLE_DEVICE_INFO pInfo); 1771 1772#if HPT_INTERFACE_VERSION >= 0x01000004 1773int hpt_set_device_info_v2(DEVICEID idDisk, PALTERABLE_DEVICE_INFO_V2 pInfo); 1774#endif 1775 1776/* hpt_rescan_devices 1777 * rescan devices 1778 * Version compatibility: v1.0.0.1 or later 1779 * Parameters: 1780 * None 1781 * Returns: 1782 * 0 Success 1783 */ 1784int hpt_rescan_devices(void); 1785 1786/* hpt_get_601_info 1787 * Get HPT601 status 1788 * Version compatibiilty: v1.0.0.3 or later 1789 * Parameters: 1790 * idDisk - Disk handle 1791 * PHPT601_INFO - pointer to HPT601 info buffer 1792 * Returns: 1793 * 0 Success 1794 */ 1795int hpt_get_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1796 1797/* hpt_set_601_info 1798 * HPT601 function control 1799 * Version compatibiilty: v1.0.0.3 or later 1800 * Parameters: 1801 * idDisk - Disk handle 1802 * PHPT601_INFO - pointer to HPT601 info buffer 1803 * Returns: 1804 * 0 Success 1805 */ 1806int hpt_set_601_info(DEVICEID idDisk, PHPT601_INFO pInfo); 1807 1808/* hpt_lock_device 1809 * Lock a block on a device (prevent OS accessing it) 1810 * Version compatibiilty: v1.0.0.3 or later 1811 * Parameters: 1812 * idDisk - Disk handle 1813 * Lba - Start LBA 1814 * nSectors - number of sectors 1815 * Returns: 1816 * 0 Success 1817 */ 1818int hpt_lock_device(DEVICEID idDisk, HPT_U32 Lba, HPT_U8 nSectors); 1819 1820/* hpt_lock_device 1821 * Unlock a device 1822 * Version compatibiilty: v1.0.0.3 or later 1823 * Parameters: 1824 * idDisk - Disk handle 1825 * Returns: 1826 * 0 Success 1827 */ 1828int hpt_unlock_device(DEVICEID idDisk); 1829 1830/* hpt_ide_pass_through 1831 * send a ATA passthrough command to a device. 1832 * Version compatibility: v1.0.0.3 or later 1833 * Parameters: 1834 * p - IDE_PASS_THROUGH header pointer 1835 * Returns: 1836 * 0 Success 1837 */ 1838int hpt_ide_pass_through(PIDE_PASS_THROUGH_HEADER p); 1839int hpt_ide_pass_through_v2(PIDE_PASS_THROUGH_HEADER_V2 p); 1840 1841/* hpt_scsi_passthrough 1842 * send a SCSI passthrough command to a device. 1843 * Version compatibility: v2.0.0.0 or later 1844 * Parameters: 1845 * in - HPT_SCSI_PASSTHROUGH_IN header pointer 1846 * out - PHPT_SCSI_PASSTHROUGH_OUT header pointer 1847 * insize, outsize - in/out buffer size 1848 * Returns: 1849 * 0 Success 1850 */ 1851int hpt_scsi_passthrough(PHPT_SCSI_PASSTHROUGH_IN in, HPT_U32 insize, 1852 PHPT_SCSI_PASSTHROUGH_OUT out, HPT_U32 outsize); 1853 1854/* hpt_verify_data_block 1855 * verify data block on RAID1 or RAID5. 1856 * Version compatibility: v1.0.0.3 or later 1857 * Parameters: 1858 * idArray - Array ID 1859 * Lba - block number (on each array member, not logical block!) 1860 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1861 * Returns: 1862 * 0 Success 1863 * 1 Data compare error 1864 * 2 I/O error 1865 */ 1866int hpt_verify_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1867 1868/* hpt_initialize_data_block 1869 * initialize data block (fill with zero) on RAID5 1870 * Version compatibility: v1.0.0.3 or later 1871 * Parameters: 1872 * idArray - Array ID 1873 * Lba - block number (on each array member, not logical block!) 1874 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 1875 * Returns: 1876 * 0 Success 1877 */ 1878int hpt_initialize_data_block(DEVICEID idArray, HPT_U32 Lba, HPT_U8 nSectors); 1879 1880/* hpt_device_io_ex 1881 * extended device I/O function 1882 * Version compatibility: v1.0.0.3 or later 1883 * Parameters: 1884 * idArray - Array ID 1885 * Lba - block number (on each array member, not logical block!) 1886 * nSectors - Sectors for each member 1887 * buffer - I/O buffer or s/g address 1888 * Returns: 1889 * 0 Success 1890 */ 1891int hpt_device_io_ex(PDEVICE_IO_EX_PARAMS param); 1892 1893/* hpt_set_boot_mark 1894 * select boot device 1895 * Version compatibility: v1.0.0.3 or later 1896 * Parameters: 1897 * id - logical device ID. If id is 0 the boot mark will be removed. 1898 * Returns: 1899 * 0 Success 1900 */ 1901int hpt_set_boot_mark(DEVICEID id); 1902 1903/* hpt_query_remove 1904 * check if device can be removed safely 1905 * Version compatibility: v1.0.0.4 or later 1906 * Parameters: 1907 * ndev - number of devices 1908 * pIds - device ID list 1909 * Returns: 1910 * 0 - Success 1911 * -1 - unknown error 1912 * n - the n-th device that can't be removed 1913 */ 1914int hpt_query_remove(HPT_U32 ndev, DEVICEID *pIds); 1915 1916/* hpt_remove_devices 1917 * remove a list of devices 1918 * Version compatibility: v1.0.0.4 or later 1919 * Parameters: 1920 * ndev - number of devices 1921 * pIds - device ID list 1922 * Returns: 1923 * 0 - Success 1924 * -1 - unknown error 1925 * n - the n-th device that can't be removed 1926 */ 1927int hpt_remove_devices(HPT_U32 ndev, DEVICEID *pIds); 1928 1929/* hpt_create_array_v2 1930 * Version compatibility: v1.1.0.0 or later 1931 * Parameters: 1932 * pParam pointer to CREATE_ARRAY_PARAMS_V2 structure 1933 * Returns: 1934 * 0 failed 1935 * else return array id 1936 */ 1937#if HPT_INTERFACE_VERSION>=0x01010000 1938DEVICEID hpt_create_array_v2(PCREATE_ARRAY_PARAMS_V2 pParam); 1939#endif 1940 1941/* hpt_create_array_v3 1942 * Version compatibility: v2.0.0.1 or later 1943 * Parameters: 1944 * pParam pointer to CREATE_ARRAY_PARAMS_V3 structure 1945 * Returns: 1946 * 0 failed 1947 * else return array id 1948 */ 1949#if HPT_INTERFACE_VERSION>=0x02000001 1950DEVICEID hpt_create_array_v3(PCREATE_ARRAY_PARAMS_V3 pParam); 1951#endif 1952 1953/* hpt_get_device_info_v2 1954 * Version compatibility: v1.1.0.0 or later 1955 * Parameters: 1956 * id logical device id 1957 * pInfo pointer to LOGICAL_DEVICE_INFO_V2 structure 1958 * Returns: 1959 * 0 - Success 1960 */ 1961#if HPT_INTERFACE_VERSION>=0x01010000 1962int hpt_get_device_info_v2(DEVICEID id, PLOGICAL_DEVICE_INFO_V2 pInfo); 1963#endif 1964 1965/* hpt_get_device_info_v3 1966 * Version compatibility: v1.2.0.0 or later 1967 * Parameters: 1968 * id logical device id 1969 * pInfo pointer to LOGICAL_DEVICE_INFO_V3 structure 1970 * Returns: 1971 * 0 - Success 1972 */ 1973#if HPT_INTERFACE_VERSION>=0x01020000 1974int hpt_get_device_info_v3(DEVICEID id, PLOGICAL_DEVICE_INFO_V3 pInfo); 1975#endif 1976 1977/* hpt_get_device_info_v4 1978 * Version compatibility: v2.0.0.1 or later 1979 * Parameters: 1980 * id logical device id 1981 * pInfo pointer to LOGICAL_DEVICE_INFO_V4 structure 1982 * Returns: 1983 * 0 - Success 1984 */ 1985#if HPT_INTERFACE_VERSION>=0x02000001 1986int hpt_get_device_info_v4(DEVICEID id, PLOGICAL_DEVICE_INFO_V4 pInfo); 1987#endif 1988 1989/* hpt_create_transform 1990 * create a transform instance. 1991 * Version compatibility: v2.0.0.0 or later 1992 * Parameters: 1993 * idArray - source array 1994 * destInfo - destination array info 1995 * Returns: 1996 * destination array id 1997 */ 1998#if HPT_INTERFACE_VERSION>=0x02000000 1999DEVICEID hpt_create_transform(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V2 destInfo); 2000#endif 2001 2002/* hpt_create_transform_v2 2003 * create a transform instance. 2004 * Version compatibility: v2.0.0.1 or later 2005 * Parameters: 2006 * idArray - source array 2007 * destInfo - destination array info 2008 * Returns: 2009 * destination array id 2010 */ 2011#if HPT_INTERFACE_VERSION>=0x02000001 2012DEVICEID hpt_create_transform_v2(DEVICEID idArray, PCREATE_ARRAY_PARAMS_V3 destInfo); 2013#endif 2014 2015/* hpt_step_transform 2016 * move a block in a tranform progress. 2017 * This function is called by mid-layer, not GUI (which uses set_array_state instead). 2018 * Version compatibility: v2.0.0.0 or later 2019 * Parameters: 2020 * idArray - destination array ID 2021 * the source ID will be invalid when transform complete. 2022 * Returns: 2023 * 0 - Success 2024 */ 2025#if HPT_INTERFACE_VERSION>=0x02000000 2026int hpt_step_transform(DEVICEID idArray); 2027#endif 2028 2029/* hpt_set_vdev_info 2030 * set information for disk or array 2031 * Version compatibility: v1.2.0.0 or later 2032 * Parameters: 2033 * dev - destination device 2034 * 2035 * Returns: 2036 * 0 - Success 2037 */ 2038#if HPT_INTERFACE_VERSION>=0x01020000 2039int hpt_set_vdev_info(DEVICEID dev, PSET_VDEV_INFO pInfo); 2040#endif 2041 2042/* hpt_init_disks 2043 * initialize disks for use 2044 * Version compatibility: v2.0.0.0 or later 2045 * Parameters: 2046 * ndev - number of disks to initialize 2047 * pIds - array of DEVICEID 2048 * 2049 * Returns: 2050 * 0 - Success 2051 */ 2052#if HPT_INTERFACE_VERSION>=0x02000000 2053int hpt_init_disks(HPT_U32 ndev, DEVICEID * pIds); 2054#endif 2055 2056/* hpt_calc_max_array_capacity 2057 * cap max capacity of the array user want to create or transform 2058 * Version compatibility: v1.2.0.0 or later 2059 * Parameters: 2060 * source - if transform, this is the source array, otherwise, it should be zero 2061 * destInfo - target array params 2062 * Returns: 2063 * 0 - Success 2064 * cap - max capacity of the target array 2065 */ 2066#if HPT_INTERFACE_VERSION>=0x01020000 2067int hpt_calc_max_array_capacity(DEVICEID source, PCREATE_ARRAY_PARAMS_V2 destInfo, HPT_U64 * cap); 2068#endif 2069 2070/* hpt_calc_max_array_capacity_v2 2071 * cap max capacity of the array user want to create or transform 2072 * Version compatibility: v2.0.0.1 or later 2073 * Parameters: 2074 * source - if transform, this is the source array, otherwise, it should be zero 2075 * destInfo - target array params 2076 * Returns: 2077 * 0 - Success 2078 * cap - max capacity of the target array 2079 */ 2080#if HPT_INTERFACE_VERSION>=0x02000001 2081int hpt_calc_max_array_capacity_v2(DEVICEID source, PCREATE_ARRAY_PARAMS_V3 destInfo, HPT_U64 * cap); 2082#endif 2083 2084/* hpt_rebuild_data_block2 2085 * Used to copy data from source disk and mirror disk. 2086 * Version compatibility: v1.1.0.0 or later 2087 * Parameters: 2088 * idArray Array ID (RAID1, 0/1 or RAID5) 2089 * Lba Start LBA for each array member 2090 * nSector Number of sectors for each array member (RAID 5 will ignore this parameter) 2091 * 2092 * Returns: 2093 * 0 Success, event info is filled in *pEvent 2094 */ 2095#if HPT_INTERFACE_VERSION>=0x01010000 2096int hpt_rebuild_data_block_v2(DEVICEID idMirror, HPT_U64 Lba, HPT_U16 nSector); 2097#endif 2098 2099/* hpt_verify_data_block2 2100 * verify data block on RAID1 or RAID5. 2101 * Version compatibility: v1.1.0.0 or later 2102 * Parameters: 2103 * idArray - Array ID 2104 * Lba - block number (on each array member, not logical block!) 2105 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2106 * Returns: 2107 * 0 Success 2108 * 1 Data compare error 2109 * 2 I/O error 2110 */ 2111#if HPT_INTERFACE_VERSION>=0x01010000 2112int hpt_verify_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2113#endif 2114 2115/* hpt_initialize_data_block2 2116 * initialize data block (fill with zero) on RAID5 2117 * Version compatibility: v1.1.0.0 or later 2118 * Parameters: 2119 * idArray - Array ID 2120 * Lba - block number (on each array member, not logical block!) 2121 * nSectors - Sectors for each member (RAID 5 will ignore this parameter) 2122 * Returns: 2123 * 0 Success 2124 */ 2125#if HPT_INTERFACE_VERSION>=0x01010000 2126int hpt_initialize_data_block_v2(DEVICEID idArray, HPT_U64 Lba, HPT_U16 nSectors); 2127#endif 2128 2129/* hpt_i2c_transaction 2130 * perform an transaction on i2c bus 2131 * Version compatibility: v2.0.0.0 or later 2132 * Parameters: 2133 * indata[0] - controller ID 2134 * Returns: 2135 * 0 Success 2136 */ 2137#if HPT_INTERFACE_VERSION>=0x01020000 2138int hpt_i2c_transaction(HPT_U8 *indata, HPT_U32 inlen, HPT_U8 *outdata, HPT_U32 outlen, HPT_U32 *poutlen); 2139#endif 2140 2141/* hpt_get_parameter_list 2142 * get a list of driver parameters. 2143 * Version compatibility: v1.0.0.0 or later 2144 * Parameters: 2145 * location - parameter location 2146 * outBuffer - a buffer to hold the output 2147 * outBufferSize - size of outBuffer 2148 * Returns: 2149 * 0 Success 2150 * put in outBuffer a list of zero terminated parameter names. the whole list 2151 * is terminated with an additional zero byte. 2152 */ 2153int hpt_get_parameter_list(HPT_U32 location, char *outBuffer, HPT_U32 outBufferSize); 2154 2155/* hpt_{get,set}_parameter 2156 * get/set a parameter value. 2157 * Version compatibility: v1.0.0.0 or later 2158 * Parameters: 2159 * pParam - a pointer to HPT_DRIVER_PARAMETER. 2160 * Returns: 2161 * 0 Success 2162 */ 2163int hpt_get_parameter(PHPT_DRIVER_PARAMETER pParam); 2164int hpt_set_parameter(PHPT_DRIVER_PARAMETER pParam); 2165int hpt_reenumerate_device(DEVICEID id); 2166 2167/* 2168 * hpt_get_enclosure_count 2169 * Version compatibility: v2.1.0.0 or later 2170 * Parameters: 2171 * controller_id 2172 * Returns: 2173 * number of enclosurers 2174 */ 2175int hpt_get_enclosure_count(int ctlr_id); 2176 2177/* hpt_get_enclosure_info 2178 * Version compatibility: v2.1.0.0 or later 2179 * Parameters: 2180 * id enclosure id 2181 * pInfo pointer to ENCLOSURE_INFO buffer 2182 * Returns: 2183 * 0 Success, enclosure info is put into (*pInfo ). 2184 */ 2185int hpt_get_enclosure_info(int ctlr_id, int enc_id, PENCLOSURE_INFO pInfo); 2186 2187int hpt_get_enclosure_info_v2(int ctlr_id, int enc_id, PENCLOSURE_INFO_V2 pInfo); 2188 2189int hpt_get_enclosure_info_v3(int ctlr_id, int enc_id, PENCLOSURE_INFO_V3 pInfo); 2190 2191int hpt_get_enclosure_info_v4(int ctlr_id, int enc_id, PENCLOSURE_INFO_V4 pInfo); 2192int hpt_get_enclosure_element_info(int ctlr_id, int enc_id, int ele_id, PSES_ELEMENT_STATUS pInfo); 2193 2194/* performance monitor interface 2195 * Version compatibility: v2.1.0.0 or later 2196 */ 2197int hpt_get_perfmon_status(int ctlr_id, int *p_status); 2198int hpt_set_perfmon_status(int ctlr_id, int enable); 2199int hpt_get_perfmon_data(DEVICEID id, PHPT_PM_IOSTAT iostat); 2200 2201/* hpt_get_controller_venid 2202 * Version compatibility: v1.0.0.0 or later 2203 */ 2204int hpt_get_controller_venid(int ctlr_id, HPT_U32 *venid); 2205 2206/* hpt_access_config_reg 2207 * access the reserved config space on disk 2208 * Parameters: 2209 * p - ACCESS_CONFIG_REG_PARAMS header pointer 2210 * Returns: 2211 * 0 Success 2212 */ 2213int hpt_access_config_reg(PACCESS_CONFIG_REG_PARAMS p); 2214 2215/* hpt_dump_metadata 2216 * dump internal metadata 2217 * Parameters: 2218 * p - PDUMP_METADATA_PARAMS header pointer 2219 * Returns: 2220 * 0 Success 2221 */ 2222int hpt_dump_metadata(PDUMP_METADATA_PARAMS p); 2223 2224#endif 2225 2226#pragma pack() 2227 2228#ifdef __cplusplus 2229} 2230#endif 2231#endif 2232