1/*
2 * Copyright © 2006-2007 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *	Eric Anholt <eric@anholt.net>
25 */
26
27#include <sys/cdefs.h>
28__FBSDID("$FreeBSD$");
29
30#include <dev/drm2/drmP.h>
31#include <dev/drm2/drm.h>
32#include <dev/drm2/drm_crtc.h>
33#include <dev/drm2/drm_crtc_helper.h>
34#include <dev/drm2/drm_edid.h>
35#include <dev/drm2/i915/i915_drm.h>
36#include <dev/drm2/i915/i915_drv.h>
37#include <dev/drm2/i915/intel_drv.h>
38
39/* Here's the desired hotplug mode */
40#define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 |		\
41			   ADPA_CRT_HOTPLUG_WARMUP_10MS |		\
42			   ADPA_CRT_HOTPLUG_SAMPLE_4S |			\
43			   ADPA_CRT_HOTPLUG_VOLTAGE_50 |		\
44			   ADPA_CRT_HOTPLUG_VOLREF_325MV |		\
45			   ADPA_CRT_HOTPLUG_ENABLE)
46
47struct intel_crt {
48	struct intel_encoder base;
49	bool force_hotplug_required;
50};
51
52static struct intel_crt *intel_attached_crt(struct drm_connector *connector)
53{
54	return container_of(intel_attached_encoder(connector),
55			    struct intel_crt, base);
56}
57
58static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
59{
60	struct drm_device *dev = encoder->dev;
61	struct drm_i915_private *dev_priv = dev->dev_private;
62	u32 temp, reg;
63
64	if (HAS_PCH_SPLIT(dev))
65		reg = PCH_ADPA;
66	else
67		reg = ADPA;
68
69	temp = I915_READ(reg);
70	temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
71	temp &= ~ADPA_DAC_ENABLE;
72
73	switch (mode) {
74	case DRM_MODE_DPMS_ON:
75		temp |= ADPA_DAC_ENABLE;
76		break;
77	case DRM_MODE_DPMS_STANDBY:
78		temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
79		break;
80	case DRM_MODE_DPMS_SUSPEND:
81		temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
82		break;
83	case DRM_MODE_DPMS_OFF:
84		temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
85		break;
86	}
87
88	I915_WRITE(reg, temp);
89}
90
91static int intel_crt_mode_valid(struct drm_connector *connector,
92				struct drm_display_mode *mode)
93{
94	struct drm_device *dev = connector->dev;
95
96	int max_clock = 0;
97	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
98		return MODE_NO_DBLESCAN;
99
100	if (mode->clock < 25000)
101		return MODE_CLOCK_LOW;
102
103	if (IS_GEN2(dev))
104		max_clock = 350000;
105	else
106		max_clock = 400000;
107	if (mode->clock > max_clock)
108		return MODE_CLOCK_HIGH;
109
110	return MODE_OK;
111}
112
113static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
114				 const struct drm_display_mode *mode,
115				 struct drm_display_mode *adjusted_mode)
116{
117	return true;
118}
119
120static void intel_crt_mode_set(struct drm_encoder *encoder,
121			       struct drm_display_mode *mode,
122			       struct drm_display_mode *adjusted_mode)
123{
124
125	struct drm_device *dev = encoder->dev;
126	struct drm_crtc *crtc = encoder->crtc;
127	struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
128	struct drm_i915_private *dev_priv = dev->dev_private;
129	int dpll_md_reg;
130	u32 adpa, dpll_md;
131	u32 adpa_reg;
132
133	dpll_md_reg = DPLL_MD(intel_crtc->pipe);
134
135	if (HAS_PCH_SPLIT(dev))
136		adpa_reg = PCH_ADPA;
137	else
138		adpa_reg = ADPA;
139
140	/*
141	 * Disable separate mode multiplier used when cloning SDVO to CRT
142	 * XXX this needs to be adjusted when we really are cloning
143	 */
144	if (INTEL_INFO(dev)->gen >= 4 && !HAS_PCH_SPLIT(dev)) {
145		dpll_md = I915_READ(dpll_md_reg);
146		I915_WRITE(dpll_md_reg,
147			   dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
148	}
149
150	adpa = ADPA_HOTPLUG_BITS;
151	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
152		adpa |= ADPA_HSYNC_ACTIVE_HIGH;
153	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
154		adpa |= ADPA_VSYNC_ACTIVE_HIGH;
155
156	/* For CPT allow 3 pipe config, for others just use A or B */
157	if (HAS_PCH_CPT(dev))
158		adpa |= PORT_TRANS_SEL_CPT(intel_crtc->pipe);
159	else if (intel_crtc->pipe == 0)
160		adpa |= ADPA_PIPE_A_SELECT;
161	else
162		adpa |= ADPA_PIPE_B_SELECT;
163
164	if (!HAS_PCH_SPLIT(dev))
165		I915_WRITE(BCLRPAT(intel_crtc->pipe), 0);
166
167	I915_WRITE(adpa_reg, adpa);
168}
169
170static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector)
171{
172	struct drm_device *dev = connector->dev;
173	struct intel_crt *crt = intel_attached_crt(connector);
174	struct drm_i915_private *dev_priv = dev->dev_private;
175	u32 adpa;
176	bool ret;
177
178	/* The first time through, trigger an explicit detection cycle */
179	if (crt->force_hotplug_required) {
180		bool turn_off_dac = HAS_PCH_SPLIT(dev);
181		u32 save_adpa;
182
183		crt->force_hotplug_required = 0;
184
185		save_adpa = adpa = I915_READ(PCH_ADPA);
186		DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa);
187
188		adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER;
189		if (turn_off_dac)
190			adpa &= ~ADPA_DAC_ENABLE;
191
192		I915_WRITE(PCH_ADPA, adpa);
193
194		if (_intel_wait_for(dev,
195		    (I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0,
196		    1000, 1, "915crt"))
197			DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER\n");
198
199		if (turn_off_dac) {
200			I915_WRITE(PCH_ADPA, save_adpa);
201			POSTING_READ(PCH_ADPA);
202		}
203	}
204
205	/* Check the status to see if both blue and green are on now */
206	adpa = I915_READ(PCH_ADPA);
207	if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0)
208		ret = true;
209	else
210		ret = false;
211	DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret);
212
213	return ret;
214}
215
216/**
217 * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
218 *
219 * Not for i915G/i915GM
220 *
221 * \return true if CRT is connected.
222 * \return false if CRT is disconnected.
223 */
224static bool intel_crt_detect_hotplug(struct drm_connector *connector)
225{
226	struct drm_device *dev = connector->dev;
227	struct drm_i915_private *dev_priv = dev->dev_private;
228	u32 hotplug_en, orig, stat;
229	bool ret = false;
230	int i, tries = 0;
231
232	if (HAS_PCH_SPLIT(dev))
233		return intel_ironlake_crt_detect_hotplug(connector);
234
235	/*
236	 * On 4 series desktop, CRT detect sequence need to be done twice
237	 * to get a reliable result.
238	 */
239
240	if (IS_G4X(dev) && !IS_GM45(dev))
241		tries = 2;
242	else
243		tries = 1;
244	hotplug_en = orig = I915_READ(PORT_HOTPLUG_EN);
245	hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
246
247	for (i = 0; i < tries ; i++) {
248		/* turn on the FORCE_DETECT */
249		I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
250		/* wait for FORCE_DETECT to go off */
251		if (_intel_wait_for(dev,
252		    (I915_READ(PORT_HOTPLUG_EN) & CRT_HOTPLUG_FORCE_DETECT) == 0,
253		    1000, 1, "915cr2"))
254			DRM_DEBUG_KMS("timed out waiting for FORCE_DETECT to go off");
255	}
256
257	stat = I915_READ(PORT_HOTPLUG_STAT);
258	if ((stat & CRT_HOTPLUG_MONITOR_MASK) != CRT_HOTPLUG_MONITOR_NONE)
259		ret = true;
260
261	/* clear the interrupt we just generated, if any */
262	I915_WRITE(PORT_HOTPLUG_STAT, CRT_HOTPLUG_INT_STATUS);
263
264	/* and put the bits back */
265	I915_WRITE(PORT_HOTPLUG_EN, orig);
266
267	return ret;
268}
269
270static bool intel_crt_detect_ddc(struct drm_connector *connector)
271{
272	struct intel_crt *crt = intel_attached_crt(connector);
273	struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private;
274
275	/* CRT should always be at 0, but check anyway */
276	if (crt->base.type != INTEL_OUTPUT_ANALOG)
277		return false;
278
279	if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) {
280		struct edid *edid;
281		bool is_digital = false;
282
283		edid = drm_get_edid(connector,
284		    dev_priv->gmbus[dev_priv->crt_ddc_pin]);
285		/*
286		 * This may be a DVI-I connector with a shared DDC
287		 * link between analog and digital outputs, so we
288		 * have to check the EDID input spec of the attached device.
289		 *
290		 * On the other hand, what should we do if it is a broken EDID?
291		 */
292		if (edid != NULL) {
293			is_digital = edid->input & DRM_EDID_INPUT_DIGITAL;
294			connector->display_info.raw_edid = NULL;
295			free(edid, DRM_MEM_KMS);
296		}
297
298		if (!is_digital) {
299			DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n");
300			return true;
301		} else {
302			DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n");
303		}
304	}
305
306	return false;
307}
308
309static enum drm_connector_status
310intel_crt_load_detect(struct intel_crt *crt)
311{
312	struct drm_device *dev = crt->base.base.dev;
313	struct drm_i915_private *dev_priv = dev->dev_private;
314	uint32_t pipe = to_intel_crtc(crt->base.base.crtc)->pipe;
315	uint32_t save_bclrpat;
316	uint32_t save_vtotal;
317	uint32_t vtotal, vactive;
318	uint32_t vsample;
319	uint32_t vblank, vblank_start, vblank_end;
320	uint32_t dsl;
321	uint32_t bclrpat_reg;
322	uint32_t vtotal_reg;
323	uint32_t vblank_reg;
324	uint32_t vsync_reg;
325	uint32_t pipeconf_reg;
326	uint32_t pipe_dsl_reg;
327	uint8_t	st00;
328	enum drm_connector_status status;
329
330	DRM_DEBUG_KMS("starting load-detect on CRT\n");
331
332	bclrpat_reg = BCLRPAT(pipe);
333	vtotal_reg = VTOTAL(pipe);
334	vblank_reg = VBLANK(pipe);
335	vsync_reg = VSYNC(pipe);
336	pipeconf_reg = PIPECONF(pipe);
337	pipe_dsl_reg = PIPEDSL(pipe);
338
339	save_bclrpat = I915_READ(bclrpat_reg);
340	save_vtotal = I915_READ(vtotal_reg);
341	vblank = I915_READ(vblank_reg);
342
343	vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
344	vactive = (save_vtotal & 0x7ff) + 1;
345
346	vblank_start = (vblank & 0xfff) + 1;
347	vblank_end = ((vblank >> 16) & 0xfff) + 1;
348
349	/* Set the border color to purple. */
350	I915_WRITE(bclrpat_reg, 0x500050);
351
352	if (!IS_GEN2(dev)) {
353		uint32_t pipeconf = I915_READ(pipeconf_reg);
354		I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
355		POSTING_READ(pipeconf_reg);
356		/* Wait for next Vblank to substitue
357		 * border color for Color info */
358		intel_wait_for_vblank(dev, pipe);
359		st00 = I915_READ8(VGA_MSR_WRITE);
360		status = ((st00 & (1 << 4)) != 0) ?
361			connector_status_connected :
362			connector_status_disconnected;
363
364		I915_WRITE(pipeconf_reg, pipeconf);
365	} else {
366		bool restore_vblank = false;
367		int count, detect;
368
369		/*
370		* If there isn't any border, add some.
371		* Yes, this will flicker
372		*/
373		if (vblank_start <= vactive && vblank_end >= vtotal) {
374			uint32_t vsync = I915_READ(vsync_reg);
375			uint32_t vsync_start = (vsync & 0xffff) + 1;
376
377			vblank_start = vsync_start;
378			I915_WRITE(vblank_reg,
379				   (vblank_start - 1) |
380				   ((vblank_end - 1) << 16));
381			restore_vblank = true;
382		}
383		/* sample in the vertical border, selecting the larger one */
384		if (vblank_start - vactive >= vtotal - vblank_end)
385			vsample = (vblank_start + vactive) >> 1;
386		else
387			vsample = (vtotal + vblank_end) >> 1;
388
389		/*
390		 * Wait for the border to be displayed
391		 */
392		while (I915_READ(pipe_dsl_reg) >= vactive)
393			;
394		while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
395			;
396		/*
397		 * Watch ST00 for an entire scanline
398		 */
399		detect = 0;
400		count = 0;
401		do {
402			count++;
403			/* Read the ST00 VGA status register */
404			st00 = I915_READ8(VGA_MSR_WRITE);
405			if (st00 & (1 << 4))
406				detect++;
407		} while ((I915_READ(pipe_dsl_reg) == dsl));
408
409		/* restore vblank if necessary */
410		if (restore_vblank)
411			I915_WRITE(vblank_reg, vblank);
412		/*
413		 * If more than 3/4 of the scanline detected a monitor,
414		 * then it is assumed to be present. This works even on i830,
415		 * where there isn't any way to force the border color across
416		 * the screen
417		 */
418		status = detect * 4 > count * 3 ?
419			 connector_status_connected :
420			 connector_status_disconnected;
421	}
422
423	/* Restore previous settings */
424	I915_WRITE(bclrpat_reg, save_bclrpat);
425
426	return status;
427}
428
429static enum drm_connector_status
430intel_crt_detect(struct drm_connector *connector, bool force)
431{
432	struct drm_device *dev = connector->dev;
433	struct intel_crt *crt = intel_attached_crt(connector);
434	enum drm_connector_status status;
435	struct intel_load_detect_pipe tmp;
436
437	if (I915_HAS_HOTPLUG(dev)) {
438		if (intel_crt_detect_hotplug(connector)) {
439			DRM_DEBUG_KMS("CRT detected via hotplug\n");
440			return connector_status_connected;
441		} else {
442			DRM_DEBUG_KMS("CRT not detected via hotplug\n");
443			return connector_status_disconnected;
444		}
445	}
446
447	if (intel_crt_detect_ddc(connector))
448		return connector_status_connected;
449
450	if (!force)
451		return connector->status;
452
453	/* for pre-945g platforms use load detect */
454	if (intel_get_load_detect_pipe(&crt->base, connector, NULL,
455				       &tmp)) {
456		if (intel_crt_detect_ddc(connector))
457			status = connector_status_connected;
458		else
459			status = intel_crt_load_detect(crt);
460		intel_release_load_detect_pipe(&crt->base, connector,
461					       &tmp);
462	} else
463		status = connector_status_unknown;
464
465	return status;
466}
467
468static void intel_crt_destroy(struct drm_connector *connector)
469{
470
471#if 0
472	drm_sysfs_connector_remove(connector);
473#endif
474	drm_connector_cleanup(connector);
475	free(connector, DRM_MEM_KMS);
476}
477
478static int intel_crt_get_modes(struct drm_connector *connector)
479{
480	struct drm_device *dev = connector->dev;
481	struct drm_i915_private *dev_priv = dev->dev_private;
482	int ret;
483
484	ret = intel_ddc_get_modes(connector,
485	    dev_priv->gmbus[dev_priv->crt_ddc_pin]);
486	if (ret || !IS_G4X(dev))
487		return ret;
488
489	/* Try to probe digital port for output in DVI-I -> VGA mode. */
490	return (intel_ddc_get_modes(connector,
491	    dev_priv->gmbus[GMBUS_PORT_DPB]));
492}
493
494static int intel_crt_set_property(struct drm_connector *connector,
495				  struct drm_property *property,
496				  uint64_t value)
497{
498	return 0;
499}
500
501static void intel_crt_reset(struct drm_connector *connector)
502{
503	struct drm_device *dev = connector->dev;
504	struct intel_crt *crt = intel_attached_crt(connector);
505
506	if (HAS_PCH_SPLIT(dev))
507		crt->force_hotplug_required = 1;
508}
509
510/*
511 * Routines for controlling stuff on the analog port
512 */
513
514static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
515	.dpms = intel_crt_dpms,
516	.mode_fixup = intel_crt_mode_fixup,
517	.prepare = intel_encoder_prepare,
518	.commit = intel_encoder_commit,
519	.mode_set = intel_crt_mode_set,
520};
521
522static const struct drm_connector_funcs intel_crt_connector_funcs = {
523	.reset = intel_crt_reset,
524	.dpms = drm_helper_connector_dpms,
525	.detect = intel_crt_detect,
526	.fill_modes = drm_helper_probe_single_connector_modes,
527	.destroy = intel_crt_destroy,
528	.set_property = intel_crt_set_property,
529};
530
531static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
532	.mode_valid = intel_crt_mode_valid,
533	.get_modes = intel_crt_get_modes,
534	.best_encoder = intel_best_encoder,
535};
536
537static const struct drm_encoder_funcs intel_crt_enc_funcs = {
538	.destroy = intel_encoder_destroy,
539};
540
541static int intel_no_crt_dmi_callback(const struct dmi_system_id *id)
542{
543	DRM_DEBUG_KMS("Skipping CRT initialization for %s\n", id->ident);
544	return 1;
545}
546
547static const struct dmi_system_id intel_no_crt[] = {
548	{
549		.callback = intel_no_crt_dmi_callback,
550		.ident = "ACER ZGB",
551		.matches = {
552			DMI_MATCH(DMI_SYS_VENDOR, "ACER"),
553			DMI_MATCH(DMI_PRODUCT_NAME, "ZGB"),
554		},
555	},
556	{ }
557};
558
559void intel_crt_init(struct drm_device *dev)
560{
561	struct drm_connector *connector;
562	struct intel_crt *crt;
563	struct intel_connector *intel_connector;
564	struct drm_i915_private *dev_priv = dev->dev_private;
565
566	/* Skip machines without VGA that falsely report hotplug events */
567	if (dmi_check_system(intel_no_crt))
568		return;
569
570	crt = malloc(sizeof(struct intel_crt), DRM_MEM_KMS, M_WAITOK | M_ZERO);
571	intel_connector = malloc(sizeof(struct intel_connector), DRM_MEM_KMS,
572	    M_WAITOK | M_ZERO);
573
574	connector = &intel_connector->base;
575	drm_connector_init(dev, &intel_connector->base,
576			   &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
577
578	drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs,
579			 DRM_MODE_ENCODER_DAC);
580
581	intel_connector_attach_encoder(intel_connector, &crt->base);
582
583	crt->base.type = INTEL_OUTPUT_ANALOG;
584	crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT |
585				1 << INTEL_ANALOG_CLONE_BIT |
586				1 << INTEL_SDVO_LVDS_CLONE_BIT);
587	crt->base.crtc_mask = (1 << 0) | (1 << 1);
588	if (IS_GEN2(dev))
589		connector->interlace_allowed = 0;
590	else
591		connector->interlace_allowed = 1;
592	connector->doublescan_allowed = 0;
593
594	drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs);
595	drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
596
597#if 0
598	drm_sysfs_connector_add(connector);
599#endif
600
601	if (I915_HAS_HOTPLUG(dev))
602		connector->polled = DRM_CONNECTOR_POLL_HPD;
603	else
604		connector->polled = DRM_CONNECTOR_POLL_CONNECT;
605
606	/*
607	 * Configure the automatic hotplug detection stuff
608	 */
609	crt->force_hotplug_required = 0;
610	if (HAS_PCH_SPLIT(dev)) {
611		u32 adpa;
612
613		adpa = I915_READ(PCH_ADPA);
614		adpa &= ~ADPA_CRT_HOTPLUG_MASK;
615		adpa |= ADPA_HOTPLUG_BITS;
616		I915_WRITE(PCH_ADPA, adpa);
617		POSTING_READ(PCH_ADPA);
618
619		DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa);
620		crt->force_hotplug_required = 1;
621	}
622
623	dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
624}
625