common.h revision 237925
1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: stable/9/sys/dev/cxgbe/common/common.h 237925 2012-07-01 13:43:30Z np $ 27 * 28 */ 29 30#ifndef __CHELSIO_COMMON_H 31#define __CHELSIO_COMMON_H 32 33#include "t4_hw.h" 34 35 36enum { 37 MAX_NPORTS = 4, /* max # of ports */ 38 SERNUM_LEN = 24, /* Serial # length */ 39 EC_LEN = 16, /* E/C length */ 40 ID_LEN = 16, /* ID length */ 41 PN_LEN = 16, /* Part Number length */ 42 MACADDR_LEN = 12, /* MAC Address length */ 43}; 44 45enum { MEM_EDC0, MEM_EDC1, MEM_MC }; 46 47enum { 48 MEMWIN0_APERTURE = 2048, 49 MEMWIN0_BASE = 0x1b800, 50 MEMWIN1_APERTURE = 32768, 51 MEMWIN1_BASE = 0x28000, 52 MEMWIN2_APERTURE = 65536, 53 MEMWIN2_BASE = 0x30000, 54}; 55 56enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 57 58enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 59 60enum { 61 PAUSE_RX = 1 << 0, 62 PAUSE_TX = 1 << 1, 63 PAUSE_AUTONEG = 1 << 2 64}; 65 66#define FW_VERSION_MAJOR 1 67#define FW_VERSION_MINOR 5 68#define FW_VERSION_MICRO 2 69 70struct port_stats { 71 u64 tx_octets; /* total # of octets in good frames */ 72 u64 tx_frames; /* all good frames */ 73 u64 tx_bcast_frames; /* all broadcast frames */ 74 u64 tx_mcast_frames; /* all multicast frames */ 75 u64 tx_ucast_frames; /* all unicast frames */ 76 u64 tx_error_frames; /* all error frames */ 77 78 u64 tx_frames_64; /* # of Tx frames in a particular range */ 79 u64 tx_frames_65_127; 80 u64 tx_frames_128_255; 81 u64 tx_frames_256_511; 82 u64 tx_frames_512_1023; 83 u64 tx_frames_1024_1518; 84 u64 tx_frames_1519_max; 85 86 u64 tx_drop; /* # of dropped Tx frames */ 87 u64 tx_pause; /* # of transmitted pause frames */ 88 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 89 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 90 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 91 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 92 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 93 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 94 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 95 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 96 97 u64 rx_octets; /* total # of octets in good frames */ 98 u64 rx_frames; /* all good frames */ 99 u64 rx_bcast_frames; /* all broadcast frames */ 100 u64 rx_mcast_frames; /* all multicast frames */ 101 u64 rx_ucast_frames; /* all unicast frames */ 102 u64 rx_too_long; /* # of frames exceeding MTU */ 103 u64 rx_jabber; /* # of jabber frames */ 104 u64 rx_fcs_err; /* # of received frames with bad FCS */ 105 u64 rx_len_err; /* # of received frames with length error */ 106 u64 rx_symbol_err; /* symbol errors */ 107 u64 rx_runt; /* # of short frames */ 108 109 u64 rx_frames_64; /* # of Rx frames in a particular range */ 110 u64 rx_frames_65_127; 111 u64 rx_frames_128_255; 112 u64 rx_frames_256_511; 113 u64 rx_frames_512_1023; 114 u64 rx_frames_1024_1518; 115 u64 rx_frames_1519_max; 116 117 u64 rx_pause; /* # of received pause frames */ 118 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 119 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 120 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 121 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 122 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 123 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 124 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 125 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 126 127 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 128 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 129 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 130 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 131 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 132 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 133 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 134 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 135}; 136 137struct lb_port_stats { 138 u64 octets; 139 u64 frames; 140 u64 bcast_frames; 141 u64 mcast_frames; 142 u64 ucast_frames; 143 u64 error_frames; 144 145 u64 frames_64; 146 u64 frames_65_127; 147 u64 frames_128_255; 148 u64 frames_256_511; 149 u64 frames_512_1023; 150 u64 frames_1024_1518; 151 u64 frames_1519_max; 152 153 u64 drop; 154 155 u64 ovflow0; 156 u64 ovflow1; 157 u64 ovflow2; 158 u64 ovflow3; 159 u64 trunc0; 160 u64 trunc1; 161 u64 trunc2; 162 u64 trunc3; 163}; 164 165struct tp_tcp_stats { 166 u32 tcpOutRsts; 167 u64 tcpInSegs; 168 u64 tcpOutSegs; 169 u64 tcpRetransSegs; 170}; 171 172struct tp_usm_stats { 173 u32 frames; 174 u32 drops; 175 u64 octets; 176}; 177 178struct tp_fcoe_stats { 179 u32 framesDDP; 180 u32 framesDrop; 181 u64 octetsDDP; 182}; 183 184struct tp_err_stats { 185 u32 macInErrs[4]; 186 u32 hdrInErrs[4]; 187 u32 tcpInErrs[4]; 188 u32 tnlCongDrops[4]; 189 u32 ofldChanDrops[4]; 190 u32 tnlTxDrops[4]; 191 u32 ofldVlanDrops[4]; 192 u32 tcp6InErrs[4]; 193 u32 ofldNoNeigh; 194 u32 ofldCongDefer; 195}; 196 197struct tp_proxy_stats { 198 u32 proxy[4]; 199}; 200 201struct tp_cpl_stats { 202 u32 req[4]; 203 u32 rsp[4]; 204}; 205 206struct tp_rdma_stats { 207 u32 rqe_dfr_mod; 208 u32 rqe_dfr_pkt; 209}; 210 211struct tp_params { 212 unsigned int ntxchan; /* # of Tx channels */ 213 unsigned int tre; /* log2 of core clocks per TP tick */ 214 unsigned int dack_re; /* DACK timer resolution */ 215 unsigned int la_mask; /* what events are recorded by TP LA */ 216 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */ 217}; 218 219struct vpd_params { 220 unsigned int cclk; 221 u8 ec[EC_LEN + 1]; 222 u8 sn[SERNUM_LEN + 1]; 223 u8 id[ID_LEN + 1]; 224 u8 pn[PN_LEN + 1]; 225 u8 na[MACADDR_LEN + 1]; 226}; 227 228struct pci_params { 229 unsigned int vpd_cap_addr; 230 unsigned short speed; 231 unsigned short width; 232}; 233 234/* 235 * Firmware device log. 236 */ 237struct devlog_params { 238 u32 memtype; /* which memory (EDC0, EDC1, MC) */ 239 u32 start; /* start of log in firmware memory */ 240 u32 size; /* size of log */ 241}; 242 243struct adapter_params { 244 struct tp_params tp; 245 struct vpd_params vpd; 246 struct pci_params pci; 247 struct devlog_params devlog; 248 249 unsigned int sf_size; /* serial flash size in bytes */ 250 unsigned int sf_nsec; /* # of flash sectors */ 251 252 unsigned int fw_vers; 253 unsigned int tp_vers; 254 255 unsigned short mtus[NMTUS]; 256 unsigned short a_wnd[NCCTRL_WIN]; 257 unsigned short b_wnd[NCCTRL_WIN]; 258 259 unsigned int mc_size; /* MC memory size */ 260 unsigned int nfilters; /* size of filter region */ 261 262 unsigned int cim_la_size; 263 264 /* Used as int in sysctls, do not reduce size */ 265 unsigned int nports; /* # of ethernet ports */ 266 unsigned int portvec; 267 unsigned int rev; /* chip revision */ 268 unsigned int offload; 269 270 unsigned int ofldq_wr_cred; 271}; 272 273enum { /* chip revisions */ 274 T4_REV_A = 0, 275}; 276 277struct trace_params { 278 u32 data[TRACE_LEN / 4]; 279 u32 mask[TRACE_LEN / 4]; 280 unsigned short snap_len; 281 unsigned short min_len; 282 unsigned char skip_ofst; 283 unsigned char skip_len; 284 unsigned char invert; 285 unsigned char port; 286}; 287 288struct link_config { 289 unsigned short supported; /* link capabilities */ 290 unsigned short advertising; /* advertised capabilities */ 291 unsigned short requested_speed; /* speed user has requested */ 292 unsigned short speed; /* actual link speed */ 293 unsigned char requested_fc; /* flow control user has requested */ 294 unsigned char fc; /* actual link flow control */ 295 unsigned char autoneg; /* autonegotiating? */ 296 unsigned char link_ok; /* link up? */ 297}; 298 299#include "adapter.h" 300 301#ifndef PCI_VENDOR_ID_CHELSIO 302# define PCI_VENDOR_ID_CHELSIO 0x1425 303#endif 304 305#define for_each_port(adapter, iter) \ 306 for (iter = 0; iter < (adapter)->params.nports; ++iter) 307 308static inline int is_offload(const struct adapter *adap) 309{ 310 return adap->params.offload; 311} 312 313static inline unsigned int core_ticks_per_usec(const struct adapter *adap) 314{ 315 return adap->params.vpd.cclk / 1000; 316} 317 318static inline unsigned int us_to_core_ticks(const struct adapter *adap, 319 unsigned int us) 320{ 321 return (us * adap->params.vpd.cclk) / 1000; 322} 323 324static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, 325 unsigned int ticks) 326{ 327 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); 328} 329 330void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); 331int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity, 332 int attempts, int delay, u32 *valp); 333 334static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, 335 int polarity, int attempts, int delay) 336{ 337 return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts, 338 delay, NULL); 339} 340 341int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 342 void *rpl, bool sleep_ok); 343 344static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 345 int size, void *rpl) 346{ 347 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); 348} 349 350static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, 351 int size, void *rpl) 352{ 353 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); 354} 355 356void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 357 unsigned int data_reg, u32 *vals, unsigned int nregs, 358 unsigned int start_idx); 359void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 360 unsigned int data_reg, const u32 *vals, 361 unsigned int nregs, unsigned int start_idx); 362 363u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg); 364 365struct fw_filter_wr; 366 367void t4_intr_enable(struct adapter *adapter); 368void t4_intr_disable(struct adapter *adapter); 369void t4_intr_clear(struct adapter *adapter); 370int t4_slow_intr_handler(struct adapter *adapter); 371 372int t4_hash_mac_addr(const u8 *addr); 373int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port, 374 struct link_config *lc); 375int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 376int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 377int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 378int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 379int t4_seeprom_wp(struct adapter *adapter, int enable); 380int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, 381 u32 *data, int byte_oriented); 382int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 383int t4_load_boot(struct adapter *adap, u8 *boot_data, 384 unsigned int boot_addr, unsigned int size); 385unsigned int t4_flash_cfg_addr(struct adapter *adapter); 386int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 387int t4_get_fw_version(struct adapter *adapter, u32 *vers); 388int t4_get_tp_version(struct adapter *adapter, u32 *vers); 389int t4_check_fw_version(struct adapter *adapter); 390int t4_init_hw(struct adapter *adapter, u32 fw_params); 391int t4_prep_adapter(struct adapter *adapter); 392int t4_port_init(struct port_info *p, int mbox, int pf, int vf); 393int t4_reinit_adapter(struct adapter *adap); 394void t4_fatal_err(struct adapter *adapter); 395int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 396 int filter_index, int enable); 397void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 398 int filter_index, int *enabled); 399int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 400 int start, int n, const u16 *rspq, unsigned int nrspq); 401int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 402 unsigned int flags); 403int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 404 unsigned int flags, unsigned int defq); 405int t4_read_rss(struct adapter *adapter, u16 *entries); 406void t4_read_rss_key(struct adapter *adapter, u32 *key); 407void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx); 408void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp); 409void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val); 410void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 411 u32 *vfl, u32 *vfh); 412void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 413 u32 vfl, u32 vfh); 414u32 t4_read_rss_pf_map(struct adapter *adapter); 415void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap); 416u32 t4_read_rss_pf_mask(struct adapter *adapter); 417void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask); 418int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 419void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 420void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 421void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 422int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 423int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 424int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 425 unsigned int *valp); 426int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 427 const unsigned int *valp); 428int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 429 unsigned int *valp); 430int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 431void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 432 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 433void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 434int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity); 435int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity); 436int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 437 __be32 *data); 438 439void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 440void t4_get_port_stats_offset(struct adapter *adap, int idx, 441 struct port_stats *stats, 442 struct port_stats *offset); 443void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 444void t4_clr_port_stats(struct adapter *adap, int idx); 445 446void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 447void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 448void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 449void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, 450 unsigned int *ipg); 451void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 452 unsigned int mask, unsigned int val); 453void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 454void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); 455void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st); 456void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); 457void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); 458void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); 459void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 460 struct tp_tcp_stats *v6); 461void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 462 struct tp_fcoe_stats *st); 463void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 464 const unsigned short *alpha, const unsigned short *beta); 465 466void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 467 468int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 469int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 470int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 471 unsigned int start, unsigned int n); 472void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 473int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map); 474void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 475 476void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr); 477int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 478 u64 mask0, u64 mask1, unsigned int crc, bool enable); 479 480int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 481 enum dev_master master, enum dev_state *state); 482int t4_fw_bye(struct adapter *adap, unsigned int mbox); 483int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 484int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force); 485int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset); 486int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, 487 const u8 *fw_data, unsigned int size, int force); 488int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 489int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 490 unsigned int vf, unsigned int nparams, const u32 *params, 491 u32 *val); 492int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 493 unsigned int vf, unsigned int nparams, const u32 *params, 494 const u32 *val); 495int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 496 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 497 unsigned int rxqi, unsigned int rxq, unsigned int tc, 498 unsigned int vi, unsigned int cmask, unsigned int pmask, 499 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps); 500int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, 501 unsigned int port, unsigned int pf, unsigned int vf, 502 unsigned int nmac, u8 *mac, unsigned int *rss_size, 503 unsigned int portfunc, unsigned int idstype); 504int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 505 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 506 unsigned int *rss_size); 507int t4_free_vi(struct adapter *adap, unsigned int mbox, 508 unsigned int pf, unsigned int vf, 509 unsigned int viid); 510int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 511 int mtu, int promisc, int all_multi, int bcast, int vlanex, 512 bool sleep_ok); 513int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, 514 bool free, unsigned int naddr, const u8 **addr, u16 *idx, 515 u64 *hash, bool sleep_ok); 516int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 517 int idx, const u8 *addr, bool persist, bool add_smt); 518int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 519 bool ucast, u64 vec, bool sleep_ok); 520int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 521 bool rx_en, bool tx_en); 522int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 523 unsigned int nblinks); 524int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 525 unsigned int mmd, unsigned int reg, unsigned int *valp); 526int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 527 unsigned int mmd, unsigned int reg, unsigned int val); 528int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start, 529 unsigned int pf, unsigned int vf, unsigned int iqid, 530 unsigned int fl0id, unsigned int fl1id); 531int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 532 unsigned int vf, unsigned int iqtype, unsigned int iqid, 533 unsigned int fl0id, unsigned int fl1id); 534int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 535 unsigned int vf, unsigned int eqid); 536int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 537 unsigned int vf, unsigned int eqid); 538int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 539 unsigned int vf, unsigned int eqid); 540int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 541 enum ctxt_type ctype, u32 *data); 542int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, 543 u32 *data); 544int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox); 545int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 546int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val); 547int t4_config_scheduler(struct adapter *adapter, int mode, int level, int pktsize, 548 int sched_class, int port, int rate, int unit, 549 int weight, int minrate, int maxrate); 550#endif /* __CHELSIO_COMMON_H */ 551