1191762Simp/* 2191762Simp * Copyright (c) 2007 The DragonFly Project. All rights reserved. 3191762Simp * 4191762Simp * This code is derived from software contributed to The DragonFly Project 5191762Simp * by Sepherosa Ziehau <sepherosa@gmail.com> 6191762Simp * 7191762Simp * Redistribution and use in source and binary forms, with or without 8191762Simp * modification, are permitted provided that the following conditions 9191762Simp * are met: 10191762Simp * 11191762Simp * 1. Redistributions of source code must retain the above copyright 12191762Simp * notice, this list of conditions and the following disclaimer. 13191762Simp * 2. Redistributions in binary form must reproduce the above copyright 14191762Simp * notice, this list of conditions and the following disclaimer in 15191762Simp * the documentation and/or other materials provided with the 16191762Simp * distribution. 17191762Simp * 3. Neither the name of The DragonFly Project nor the names of its 18191762Simp * contributors may be used to endorse or promote products derived 19191762Simp * from this software without specific, prior written permission. 20191762Simp * 21191762Simp * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22191762Simp * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23191762Simp * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24191762Simp * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25191762Simp * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26191762Simp * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27191762Simp * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28191762Simp * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29191762Simp * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30191762Simp * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31191762Simp * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32191762Simp * SUCH DAMAGE. 33191762Simp * 34191762Simp * $DragonFly: src/sys/dev/netif/bwi/bwiphy.c,v 1.5 2008/01/15 09:01:13 sephe Exp $ 35191762Simp */ 36191762Simp 37191762Simp#include <sys/cdefs.h> 38191762Simp__FBSDID("$FreeBSD$"); 39191762Simp 40191762Simp#include "opt_inet.h" 41191762Simp 42191762Simp#include <sys/param.h> 43191762Simp#include <sys/endian.h> 44191762Simp#include <sys/kernel.h> 45191762Simp#include <sys/bus.h> 46191762Simp#include <sys/malloc.h> 47191762Simp#include <sys/proc.h> 48191762Simp#include <sys/rman.h> 49191762Simp#include <sys/socket.h> 50191762Simp#include <sys/sockio.h> 51191762Simp#include <sys/sysctl.h> 52191762Simp#include <sys/systm.h> 53191762Simp 54191762Simp#include <net/if.h> 55191762Simp#include <net/if_dl.h> 56191762Simp#include <net/if_media.h> 57191762Simp#include <net/if_types.h> 58191762Simp#include <net/if_arp.h> 59191762Simp#include <net/ethernet.h> 60191762Simp#include <net/if_llc.h> 61191762Simp 62191762Simp#include <net80211/ieee80211_var.h> 63191762Simp#include <net80211/ieee80211_radiotap.h> 64191762Simp#include <net80211/ieee80211_amrr.h> 65191762Simp 66191762Simp#include <machine/bus.h> 67191762Simp 68191762Simp#include <dev/bwi/bitops.h> 69191762Simp#include <dev/bwi/if_bwireg.h> 70191762Simp#include <dev/bwi/if_bwivar.h> 71191762Simp#include <dev/bwi/bwimac.h> 72191762Simp#include <dev/bwi/bwirf.h> 73191762Simp#include <dev/bwi/bwiphy.h> 74191762Simp 75191762Simpstatic void bwi_phy_init_11a(struct bwi_mac *); 76191762Simpstatic void bwi_phy_init_11g(struct bwi_mac *); 77191762Simpstatic void bwi_phy_init_11b_rev2(struct bwi_mac *); 78191762Simpstatic void bwi_phy_init_11b_rev4(struct bwi_mac *); 79191762Simpstatic void bwi_phy_init_11b_rev5(struct bwi_mac *); 80191762Simpstatic void bwi_phy_init_11b_rev6(struct bwi_mac *); 81191762Simp 82191762Simpstatic void bwi_phy_config_11g(struct bwi_mac *); 83191762Simpstatic void bwi_phy_config_agc(struct bwi_mac *); 84191762Simp 85191762Simpstatic void bwi_tbl_write_2(struct bwi_mac *mac, uint16_t, uint16_t); 86191762Simpstatic void bwi_tbl_write_4(struct bwi_mac *mac, uint16_t, uint32_t); 87191762Simp 88191762Simp#define SUP_BPHY(num) { .rev = num, .init = bwi_phy_init_11b_rev##num } 89191762Simp 90191762Simpstatic const struct { 91191762Simp uint8_t rev; 92191762Simp void (*init)(struct bwi_mac *); 93191762Simp} bwi_sup_bphy[] = { 94191762Simp SUP_BPHY(2), 95191762Simp SUP_BPHY(4), 96191762Simp SUP_BPHY(5), 97191762Simp SUP_BPHY(6) 98191762Simp}; 99191762Simp 100191762Simp#undef SUP_BPHY 101191762Simp 102191762Simp#define BWI_PHYTBL_WRSSI 0x1000 103191762Simp#define BWI_PHYTBL_NOISE_SCALE 0x1400 104191762Simp#define BWI_PHYTBL_NOISE 0x1800 105191762Simp#define BWI_PHYTBL_ROTOR 0x2000 106191762Simp#define BWI_PHYTBL_DELAY 0x2400 107191762Simp#define BWI_PHYTBL_RSSI 0x4000 108191762Simp#define BWI_PHYTBL_SIGMA_SQ 0x5000 109191762Simp#define BWI_PHYTBL_WRSSI_REV1 0x5400 110191762Simp#define BWI_PHYTBL_FREQ 0x5800 111191762Simp 112191762Simpstatic const uint16_t bwi_phy_freq_11g_rev1[] = 113191762Simp { BWI_PHY_FREQ_11G_REV1 }; 114191762Simpstatic const uint16_t bwi_phy_noise_11g_rev1[] = 115191762Simp { BWI_PHY_NOISE_11G_REV1 }; 116191762Simpstatic const uint16_t bwi_phy_noise_11g[] = 117191762Simp { BWI_PHY_NOISE_11G }; 118191762Simpstatic const uint32_t bwi_phy_rotor_11g_rev1[] = 119191762Simp { BWI_PHY_ROTOR_11G_REV1 }; 120191762Simpstatic const uint16_t bwi_phy_noise_scale_11g_rev2[] = 121191762Simp { BWI_PHY_NOISE_SCALE_11G_REV2 }; 122191762Simpstatic const uint16_t bwi_phy_noise_scale_11g_rev7[] = 123191762Simp { BWI_PHY_NOISE_SCALE_11G_REV7 }; 124191762Simpstatic const uint16_t bwi_phy_noise_scale_11g[] = 125191762Simp { BWI_PHY_NOISE_SCALE_11G }; 126191762Simpstatic const uint16_t bwi_phy_sigma_sq_11g_rev2[] = 127191762Simp { BWI_PHY_SIGMA_SQ_11G_REV2 }; 128191762Simpstatic const uint16_t bwi_phy_sigma_sq_11g_rev7[] = 129191762Simp { BWI_PHY_SIGMA_SQ_11G_REV7 }; 130191762Simpstatic const uint32_t bwi_phy_delay_11g_rev1[] = 131191762Simp { BWI_PHY_DELAY_11G_REV1 }; 132191762Simp 133191762Simpvoid 134191762Simpbwi_phy_write(struct bwi_mac *mac, uint16_t ctrl, uint16_t data) 135191762Simp{ 136191762Simp struct bwi_softc *sc = mac->mac_sc; 137191762Simp 138191762Simp CSR_WRITE_2(sc, BWI_PHY_CTRL, ctrl); 139191762Simp CSR_WRITE_2(sc, BWI_PHY_DATA, data); 140191762Simp} 141191762Simp 142191762Simpuint16_t 143191762Simpbwi_phy_read(struct bwi_mac *mac, uint16_t ctrl) 144191762Simp{ 145191762Simp struct bwi_softc *sc = mac->mac_sc; 146191762Simp 147191762Simp CSR_WRITE_2(sc, BWI_PHY_CTRL, ctrl); 148191762Simp return CSR_READ_2(sc, BWI_PHY_DATA); 149191762Simp} 150191762Simp 151191762Simpint 152191762Simpbwi_phy_attach(struct bwi_mac *mac) 153191762Simp{ 154191762Simp struct bwi_softc *sc = mac->mac_sc; 155191762Simp struct bwi_phy *phy = &mac->mac_phy; 156191762Simp uint8_t phyrev, phytype, phyver; 157191762Simp uint16_t val; 158191762Simp int i; 159191762Simp 160191762Simp /* Get PHY type/revision/version */ 161191762Simp val = CSR_READ_2(sc, BWI_PHYINFO); 162191762Simp phyrev = __SHIFTOUT(val, BWI_PHYINFO_REV_MASK); 163191762Simp phytype = __SHIFTOUT(val, BWI_PHYINFO_TYPE_MASK); 164191762Simp phyver = __SHIFTOUT(val, BWI_PHYINFO_VER_MASK); 165191762Simp device_printf(sc->sc_dev, "PHY: type %d, rev %d, ver %d\n", 166191762Simp phytype, phyrev, phyver); 167191762Simp 168191762Simp /* 169191762Simp * Verify whether the revision of the PHY type is supported 170191762Simp * Convert PHY type to ieee80211_phymode 171191762Simp */ 172191762Simp switch (phytype) { 173191762Simp case BWI_PHYINFO_TYPE_11A: 174191762Simp if (phyrev >= 4) { 175191762Simp device_printf(sc->sc_dev, "unsupported 11A PHY, " 176191762Simp "rev %u\n", phyrev); 177191762Simp return ENXIO; 178191762Simp } 179191762Simp phy->phy_init = bwi_phy_init_11a; 180191762Simp phy->phy_mode = IEEE80211_MODE_11A; 181191762Simp phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11A; 182191762Simp phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11A; 183191762Simp phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11A; 184191762Simp break; 185191762Simp case BWI_PHYINFO_TYPE_11B: 186191762Simp#define N(arr) (int)(sizeof(arr) / sizeof(arr[0])) 187191762Simp for (i = 0; i < N(bwi_sup_bphy); ++i) { 188191762Simp if (phyrev == bwi_sup_bphy[i].rev) { 189191762Simp phy->phy_init = bwi_sup_bphy[i].init; 190191762Simp break; 191191762Simp } 192191762Simp } 193191762Simp if (i == N(bwi_sup_bphy)) { 194191762Simp device_printf(sc->sc_dev, "unsupported 11B PHY, " 195191762Simp "rev %u\n", phyrev); 196191762Simp return ENXIO; 197191762Simp } 198191762Simp#undef N 199191762Simp phy->phy_mode = IEEE80211_MODE_11B; 200191762Simp break; 201191762Simp case BWI_PHYINFO_TYPE_11G: 202191762Simp if (phyrev > 8) { 203191762Simp device_printf(sc->sc_dev, "unsupported 11G PHY, " 204191762Simp "rev %u\n", phyrev); 205191762Simp return ENXIO; 206191762Simp } 207191762Simp phy->phy_init = bwi_phy_init_11g; 208191762Simp phy->phy_mode = IEEE80211_MODE_11G; 209191762Simp phy->phy_tbl_ctrl = BWI_PHYR_TBL_CTRL_11G; 210191762Simp phy->phy_tbl_data_lo = BWI_PHYR_TBL_DATA_LO_11G; 211191762Simp phy->phy_tbl_data_hi = BWI_PHYR_TBL_DATA_HI_11G; 212191762Simp break; 213191762Simp default: 214191762Simp device_printf(sc->sc_dev, "unsupported PHY type %d\n", 215191762Simp phytype); 216191762Simp return ENXIO; 217191762Simp } 218191762Simp phy->phy_rev = phyrev; 219191762Simp phy->phy_version = phyver; 220191762Simp return 0; 221191762Simp} 222191762Simp 223191762Simpvoid 224191762Simpbwi_phy_set_bbp_atten(struct bwi_mac *mac, uint16_t bbp_atten) 225191762Simp{ 226191762Simp struct bwi_phy *phy = &mac->mac_phy; 227191762Simp uint16_t mask = __BITS(3, 0); 228191762Simp 229191762Simp if (phy->phy_version == 0) { 230191762Simp CSR_FILT_SETBITS_2(mac->mac_sc, BWI_BBP_ATTEN, ~mask, 231191762Simp __SHIFTIN(bbp_atten, mask)); 232191762Simp } else { 233191762Simp if (phy->phy_version > 1) 234191762Simp mask <<= 2; 235191762Simp else 236191762Simp mask <<= 3; 237191762Simp PHY_FILT_SETBITS(mac, BWI_PHYR_BBP_ATTEN, ~mask, 238191762Simp __SHIFTIN(bbp_atten, mask)); 239191762Simp } 240191762Simp} 241191762Simp 242191762Simpint 243191762Simpbwi_phy_calibrate(struct bwi_mac *mac) 244191762Simp{ 245191762Simp struct bwi_phy *phy = &mac->mac_phy; 246191762Simp 247191762Simp /* Dummy read */ 248191762Simp CSR_READ_4(mac->mac_sc, BWI_MAC_STATUS); 249191762Simp 250191762Simp /* Don't re-init */ 251191762Simp if (phy->phy_flags & BWI_PHY_F_CALIBRATED) 252191762Simp return 0; 253191762Simp 254191762Simp if (phy->phy_mode == IEEE80211_MODE_11G && phy->phy_rev == 1) { 255191762Simp bwi_mac_reset(mac, 0); 256191762Simp bwi_phy_init_11g(mac); 257191762Simp bwi_mac_reset(mac, 1); 258191762Simp } 259191762Simp 260191762Simp phy->phy_flags |= BWI_PHY_F_CALIBRATED; 261191762Simp return 0; 262191762Simp} 263191762Simp 264191762Simpstatic void 265191762Simpbwi_tbl_write_2(struct bwi_mac *mac, uint16_t ofs, uint16_t data) 266191762Simp{ 267191762Simp struct bwi_phy *phy = &mac->mac_phy; 268191762Simp 269191762Simp KASSERT(phy->phy_tbl_ctrl != 0 && phy->phy_tbl_data_lo != 0, 270191762Simp ("phy_tbl_ctrl %d phy_tbl_data_lo %d", 271191762Simp phy->phy_tbl_ctrl, phy->phy_tbl_data_lo)); 272191762Simp PHY_WRITE(mac, phy->phy_tbl_ctrl, ofs); 273191762Simp PHY_WRITE(mac, phy->phy_tbl_data_lo, data); 274191762Simp} 275191762Simp 276191762Simpstatic void 277191762Simpbwi_tbl_write_4(struct bwi_mac *mac, uint16_t ofs, uint32_t data) 278191762Simp{ 279191762Simp struct bwi_phy *phy = &mac->mac_phy; 280191762Simp 281191762Simp KASSERT(phy->phy_tbl_data_lo != 0 && phy->phy_tbl_data_hi != 0 && 282191762Simp phy->phy_tbl_ctrl != 0, 283191762Simp ("phy_tbl_data_lo %d phy_tbl_data_hi %d phy_tbl_ctrl %d", 284191762Simp phy->phy_tbl_data_lo, phy->phy_tbl_data_hi, phy->phy_tbl_ctrl)); 285191762Simp 286191762Simp PHY_WRITE(mac, phy->phy_tbl_ctrl, ofs); 287191762Simp PHY_WRITE(mac, phy->phy_tbl_data_hi, data >> 16); 288191762Simp PHY_WRITE(mac, phy->phy_tbl_data_lo, data & 0xffff); 289191762Simp} 290191762Simp 291191762Simpvoid 292191762Simpbwi_nrssi_write(struct bwi_mac *mac, uint16_t ofs, int16_t data) 293191762Simp{ 294191762Simp PHY_WRITE(mac, BWI_PHYR_NRSSI_CTRL, ofs); 295191762Simp PHY_WRITE(mac, BWI_PHYR_NRSSI_DATA, (uint16_t)data); 296191762Simp} 297191762Simp 298191762Simpint16_t 299191762Simpbwi_nrssi_read(struct bwi_mac *mac, uint16_t ofs) 300191762Simp{ 301191762Simp PHY_WRITE(mac, BWI_PHYR_NRSSI_CTRL, ofs); 302191762Simp return (int16_t)PHY_READ(mac, BWI_PHYR_NRSSI_DATA); 303191762Simp} 304191762Simp 305191762Simpstatic void 306191762Simpbwi_phy_init_11a(struct bwi_mac *mac) 307191762Simp{ 308191762Simp /* TODO:11A */ 309191762Simp} 310191762Simp 311191762Simpstatic void 312191762Simpbwi_phy_init_11g(struct bwi_mac *mac) 313191762Simp{ 314191762Simp struct bwi_softc *sc = mac->mac_sc; 315191762Simp struct bwi_phy *phy = &mac->mac_phy; 316191762Simp struct bwi_rf *rf = &mac->mac_rf; 317191762Simp const struct bwi_tpctl *tpctl = &mac->mac_tpctl; 318191762Simp 319191762Simp if (phy->phy_rev == 1) 320191762Simp bwi_phy_init_11b_rev5(mac); 321191762Simp else 322191762Simp bwi_phy_init_11b_rev6(mac); 323191762Simp 324191762Simp if (phy->phy_rev >= 2 || (phy->phy_flags & BWI_PHY_F_LINKED)) 325191762Simp bwi_phy_config_11g(mac); 326191762Simp 327191762Simp if (phy->phy_rev >= 2) { 328191762Simp PHY_WRITE(mac, 0x814, 0); 329191762Simp PHY_WRITE(mac, 0x815, 0); 330191762Simp 331191762Simp if (phy->phy_rev == 2) { 332191762Simp PHY_WRITE(mac, 0x811, 0); 333191762Simp PHY_WRITE(mac, 0x15, 0xc0); 334191762Simp } else if (phy->phy_rev > 5) { 335191762Simp PHY_WRITE(mac, 0x811, 0x400); 336191762Simp PHY_WRITE(mac, 0x15, 0xc0); 337191762Simp } 338191762Simp } 339191762Simp 340191762Simp if (phy->phy_rev >= 2 || (phy->phy_flags & BWI_PHY_F_LINKED)) { 341191762Simp uint16_t val; 342191762Simp 343191762Simp val = PHY_READ(mac, 0x400) & 0xff; 344191762Simp if (val == 3 || val == 5) { 345191762Simp PHY_WRITE(mac, 0x4c2, 0x1816); 346191762Simp PHY_WRITE(mac, 0x4c3, 0x8006); 347191762Simp if (val == 5) { 348191762Simp PHY_FILT_SETBITS(mac, 0x4cc, 349191762Simp 0xff, 0x1f00); 350191762Simp } 351191762Simp } 352191762Simp } 353191762Simp 354191762Simp if ((phy->phy_rev <= 2 && (phy->phy_flags & BWI_PHY_F_LINKED)) || 355191762Simp phy->phy_rev >= 2) 356191762Simp PHY_WRITE(mac, 0x47e, 0x78); 357191762Simp 358191762Simp if (rf->rf_rev == 8) { 359191762Simp PHY_SETBITS(mac, 0x801, 0x80); 360191762Simp PHY_SETBITS(mac, 0x43e, 0x4); 361191762Simp } 362191762Simp 363191762Simp if (phy->phy_rev >= 2 && (phy->phy_flags & BWI_PHY_F_LINKED)) 364191762Simp bwi_rf_get_gains(mac); 365191762Simp 366191762Simp if (rf->rf_rev != 8) 367191762Simp bwi_rf_init(mac); 368191762Simp 369191762Simp if (tpctl->tp_ctrl2 == 0xffff) { 370191762Simp bwi_rf_lo_update(mac); 371191762Simp } else { 372191762Simp if (rf->rf_type == BWI_RF_T_BCM2050 && rf->rf_rev == 8) { 373191762Simp RF_WRITE(mac, 0x52, 374191762Simp (tpctl->tp_ctrl1 << 4) | tpctl->tp_ctrl2); 375191762Simp } else { 376192306Simp RF_FILT_SETBITS(mac, 0x52, 0xfff0, tpctl->tp_ctrl2); 377191762Simp } 378191762Simp 379191762Simp if (phy->phy_rev >= 6) { 380191762Simp PHY_FILT_SETBITS(mac, 0x36, 0xfff, 381191762Simp tpctl->tp_ctrl2 << 12); 382191762Simp } 383191762Simp 384191762Simp if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) 385191762Simp PHY_WRITE(mac, 0x2e, 0x8075); 386191762Simp else 387191762Simp PHY_WRITE(mac, 0x2e, 0x807f); 388191762Simp 389191762Simp if (phy->phy_rev < 2) 390191762Simp PHY_WRITE(mac, 0x2f, 0x101); 391191762Simp else 392191762Simp PHY_WRITE(mac, 0x2f, 0x202); 393191762Simp } 394191762Simp 395191762Simp if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { 396191762Simp bwi_rf_lo_adjust(mac, tpctl); 397191762Simp PHY_WRITE(mac, 0x80f, 0x8078); 398191762Simp } 399191762Simp 400191762Simp if ((sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) == 0) { 401191762Simp bwi_rf_init_hw_nrssi_table(mac, 0xffff /* XXX */); 402191762Simp bwi_rf_set_nrssi_thr(mac); 403191762Simp } else if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { 404191762Simp if (rf->rf_nrssi[0] == BWI_INVALID_NRSSI) { 405191762Simp KASSERT(rf->rf_nrssi[1] == BWI_INVALID_NRSSI, 406191762Simp ("rf_nrssi[1] %d", rf->rf_nrssi[1])); 407191762Simp bwi_rf_calc_nrssi_slope(mac); 408191762Simp } else { 409191762Simp KASSERT(rf->rf_nrssi[1] != BWI_INVALID_NRSSI, 410191762Simp ("rf_nrssi[1] %d", rf->rf_nrssi[1])); 411191762Simp bwi_rf_set_nrssi_thr(mac); 412191762Simp } 413191762Simp } 414191762Simp 415191762Simp if (rf->rf_rev == 8) 416191762Simp PHY_WRITE(mac, 0x805, 0x3230); 417191762Simp 418191762Simp bwi_mac_init_tpctl_11bg(mac); 419191762Simp 420191762Simp if (sc->sc_bbp_id == BWI_BBPID_BCM4306 && sc->sc_bbp_pkg == 2) { 421191762Simp PHY_CLRBITS(mac, 0x429, 0x4000); 422191762Simp PHY_CLRBITS(mac, 0x4c3, 0x8000); 423191762Simp } 424191762Simp} 425191762Simp 426191762Simpstatic void 427191762Simpbwi_phy_init_11b_rev2(struct bwi_mac *mac) 428191762Simp{ 429191762Simp /* TODO:11B */ 430191762Simp if_printf(mac->mac_sc->sc_ifp, 431191762Simp "%s is not implemented yet\n", __func__); 432191762Simp} 433191762Simp 434191762Simpstatic void 435191762Simpbwi_phy_init_11b_rev4(struct bwi_mac *mac) 436191762Simp{ 437191762Simp struct bwi_softc *sc = mac->mac_sc; 438191762Simp struct bwi_rf *rf = &mac->mac_rf; 439191762Simp uint16_t val, ofs; 440191762Simp u_int chan; 441191762Simp 442191762Simp CSR_WRITE_2(sc, BWI_BPHY_CTRL, BWI_BPHY_CTRL_INIT); 443191762Simp 444191762Simp PHY_WRITE(mac, 0x20, 0x301c); 445191762Simp PHY_WRITE(mac, 0x26, 0); 446191762Simp PHY_WRITE(mac, 0x30, 0xc6); 447191762Simp PHY_WRITE(mac, 0x88, 0x3e00); 448191762Simp 449191762Simp for (ofs = 0, val = 0x3c3d; ofs < 30; ++ofs, val -= 0x202) 450191762Simp PHY_WRITE(mac, 0x89 + ofs, val); 451191762Simp 452191762Simp CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL1); 453191762Simp 454191762Simp chan = rf->rf_curchan; 455191762Simp if (chan == IEEE80211_CHAN_ANY) 456191762Simp chan = 6; /* Force to channel 6 */ 457191762Simp bwi_rf_set_chan(mac, chan, 0); 458191762Simp 459191762Simp if (rf->rf_type != BWI_RF_T_BCM2050) { 460191762Simp RF_WRITE(mac, 0x75, 0x80); 461191762Simp RF_WRITE(mac, 0x79, 0x81); 462191762Simp } 463191762Simp 464191762Simp RF_WRITE(mac, 0x50, 0x20); 465191762Simp RF_WRITE(mac, 0x50, 0x23); 466191762Simp 467191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) { 468191762Simp RF_WRITE(mac, 0x50, 0x20); 469191762Simp RF_WRITE(mac, 0x5a, 0x70); 470191762Simp RF_WRITE(mac, 0x5b, 0x7b); 471191762Simp RF_WRITE(mac, 0x5c, 0xb0); 472191762Simp RF_WRITE(mac, 0x7a, 0xf); 473191762Simp PHY_WRITE(mac, 0x38, 0x677); 474191762Simp bwi_rf_init_bcm2050(mac); 475191762Simp } 476191762Simp 477191762Simp PHY_WRITE(mac, 0x14, 0x80); 478191762Simp PHY_WRITE(mac, 0x32, 0xca); 479191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) 480191762Simp PHY_WRITE(mac, 0x32, 0xe0); 481191762Simp PHY_WRITE(mac, 0x35, 0x7c2); 482191762Simp 483191762Simp bwi_rf_lo_update(mac); 484191762Simp 485191762Simp PHY_WRITE(mac, 0x26, 0xcc00); 486191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) 487191762Simp PHY_WRITE(mac, 0x26, 0xce00); 488191762Simp 489191762Simp CSR_WRITE_2(sc, BWI_RF_CHAN_EX, 0x1100); 490191762Simp 491191762Simp PHY_WRITE(mac, 0x2a, 0x88a3); 492191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) 493191762Simp PHY_WRITE(mac, 0x2a, 0x88c2); 494191762Simp 495191762Simp bwi_mac_set_tpctl_11bg(mac, NULL); 496191762Simp if (sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) { 497191762Simp bwi_rf_calc_nrssi_slope(mac); 498191762Simp bwi_rf_set_nrssi_thr(mac); 499191762Simp } 500191762Simp bwi_mac_init_tpctl_11bg(mac); 501191762Simp} 502191762Simp 503191762Simpstatic void 504191762Simpbwi_phy_init_11b_rev5(struct bwi_mac *mac) 505191762Simp{ 506191762Simp struct bwi_softc *sc = mac->mac_sc; 507191762Simp struct bwi_rf *rf = &mac->mac_rf; 508191762Simp struct bwi_phy *phy = &mac->mac_phy; 509191762Simp u_int orig_chan; 510191762Simp 511191762Simp if (phy->phy_version == 1) 512191762Simp RF_SETBITS(mac, 0x7a, 0x50); 513191762Simp 514191762Simp if (sc->sc_pci_subvid != PCI_VENDOR_BROADCOM && 515191762Simp sc->sc_pci_subdid != BWI_PCI_SUBDEVICE_BU4306) { 516191762Simp uint16_t ofs, val; 517191762Simp 518191762Simp val = 0x2120; 519191762Simp for (ofs = 0xa8; ofs < 0xc7; ++ofs) { 520191762Simp PHY_WRITE(mac, ofs, val); 521191762Simp val += 0x202; 522191762Simp } 523191762Simp } 524191762Simp 525191762Simp PHY_FILT_SETBITS(mac, 0x35, 0xf0ff, 0x700); 526191762Simp 527191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) 528191762Simp PHY_WRITE(mac, 0x38, 0x667); 529191762Simp 530191762Simp if ((phy->phy_flags & BWI_PHY_F_LINKED) || phy->phy_rev >= 2) { 531191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) { 532191762Simp RF_SETBITS(mac, 0x7a, 0x20); 533191762Simp RF_SETBITS(mac, 0x51, 0x4); 534191762Simp } 535191762Simp 536191762Simp CSR_WRITE_2(sc, BWI_RF_ANTDIV, 0); 537191762Simp 538191762Simp PHY_SETBITS(mac, 0x802, 0x100); 539191762Simp PHY_SETBITS(mac, 0x42b, 0x2000); 540191762Simp PHY_WRITE(mac, 0x1c, 0x186a); 541191762Simp 542191762Simp PHY_FILT_SETBITS(mac, 0x13, 0xff, 0x1900); 543191762Simp PHY_FILT_SETBITS(mac, 0x35, 0xffc0, 0x64); 544191762Simp PHY_FILT_SETBITS(mac, 0x5d, 0xff80, 0xa); 545191762Simp } 546191762Simp 547191762Simp /* TODO: bad_frame_preempt? */ 548191762Simp 549191762Simp if (phy->phy_version == 1) { 550191762Simp PHY_WRITE(mac, 0x26, 0xce00); 551191762Simp PHY_WRITE(mac, 0x21, 0x3763); 552191762Simp PHY_WRITE(mac, 0x22, 0x1bc3); 553191762Simp PHY_WRITE(mac, 0x23, 0x6f9); 554191762Simp PHY_WRITE(mac, 0x24, 0x37e); 555191762Simp } else { 556191762Simp PHY_WRITE(mac, 0x26, 0xcc00); 557191762Simp } 558191762Simp PHY_WRITE(mac, 0x30, 0xc6); 559191762Simp 560191762Simp CSR_WRITE_2(sc, BWI_BPHY_CTRL, BWI_BPHY_CTRL_INIT); 561191762Simp 562191762Simp if (phy->phy_version == 1) 563191762Simp PHY_WRITE(mac, 0x20, 0x3e1c); 564191762Simp else 565191762Simp PHY_WRITE(mac, 0x20, 0x301c); 566191762Simp 567191762Simp if (phy->phy_version == 0) 568191762Simp CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL1); 569191762Simp 570191762Simp /* Force to channel 7 */ 571191762Simp orig_chan = rf->rf_curchan; 572191762Simp bwi_rf_set_chan(mac, 7, 0); 573191762Simp 574191762Simp if (rf->rf_type != BWI_RF_T_BCM2050) { 575191762Simp RF_WRITE(mac, 0x75, 0x80); 576191762Simp RF_WRITE(mac, 0x79, 0x81); 577191762Simp } 578191762Simp 579191762Simp RF_WRITE(mac, 0x50, 0x20); 580191762Simp RF_WRITE(mac, 0x50, 0x23); 581191762Simp 582191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) { 583191762Simp RF_WRITE(mac, 0x50, 0x20); 584191762Simp RF_WRITE(mac, 0x5a, 0x70); 585191762Simp } 586191762Simp 587191762Simp RF_WRITE(mac, 0x5b, 0x7b); 588191762Simp RF_WRITE(mac, 0x5c, 0xb0); 589191762Simp RF_SETBITS(mac, 0x7a, 0x7); 590191762Simp 591191762Simp bwi_rf_set_chan(mac, orig_chan, 0); 592191762Simp 593191762Simp PHY_WRITE(mac, 0x14, 0x80); 594191762Simp PHY_WRITE(mac, 0x32, 0xca); 595191762Simp PHY_WRITE(mac, 0x2a, 0x88a3); 596191762Simp 597191762Simp bwi_mac_set_tpctl_11bg(mac, NULL); 598191762Simp 599191762Simp if (rf->rf_type == BWI_RF_T_BCM2050) 600191762Simp RF_WRITE(mac, 0x5d, 0xd); 601191762Simp 602191762Simp CSR_FILT_SETBITS_2(sc, BWI_PHY_MAGIC_REG1, 0xffc0, 0x4); 603191762Simp} 604191762Simp 605191762Simpstatic void 606191762Simpbwi_phy_init_11b_rev6(struct bwi_mac *mac) 607191762Simp{ 608191762Simp struct bwi_softc *sc = mac->mac_sc; 609191762Simp struct bwi_rf *rf = &mac->mac_rf; 610191762Simp struct bwi_phy *phy = &mac->mac_phy; 611191762Simp uint16_t val, ofs; 612191762Simp u_int orig_chan; 613191762Simp 614191762Simp PHY_WRITE(mac, 0x3e, 0x817a); 615191762Simp RF_SETBITS(mac, 0x7a, 0x58); 616191762Simp 617191762Simp if (rf->rf_rev == 4 || rf->rf_rev == 5) { 618191762Simp RF_WRITE(mac, 0x51, 0x37); 619191762Simp RF_WRITE(mac, 0x52, 0x70); 620191762Simp RF_WRITE(mac, 0x53, 0xb3); 621191762Simp RF_WRITE(mac, 0x54, 0x9b); 622191762Simp RF_WRITE(mac, 0x5a, 0x88); 623191762Simp RF_WRITE(mac, 0x5b, 0x88); 624191762Simp RF_WRITE(mac, 0x5d, 0x88); 625191762Simp RF_WRITE(mac, 0x5e, 0x88); 626191762Simp RF_WRITE(mac, 0x7d, 0x88); 627191762Simp HFLAGS_SETBITS(mac, BWI_HFLAG_MAGIC1); 628191762Simp } else if (rf->rf_rev == 8) { 629191762Simp RF_WRITE(mac, 0x51, 0); 630191762Simp RF_WRITE(mac, 0x52, 0x40); 631191762Simp RF_WRITE(mac, 0x53, 0xb7); 632191762Simp RF_WRITE(mac, 0x54, 0x98); 633191762Simp RF_WRITE(mac, 0x5a, 0x88); 634191762Simp RF_WRITE(mac, 0x5b, 0x6b); 635191762Simp RF_WRITE(mac, 0x5c, 0xf); 636191762Simp if (sc->sc_card_flags & BWI_CARD_F_ALT_IQ) { 637191762Simp RF_WRITE(mac, 0x5d, 0xfa); 638191762Simp RF_WRITE(mac, 0x5e, 0xd8); 639191762Simp } else { 640191762Simp RF_WRITE(mac, 0x5d, 0xf5); 641191762Simp RF_WRITE(mac, 0x5e, 0xb8); 642191762Simp } 643191762Simp RF_WRITE(mac, 0x73, 0x3); 644191762Simp RF_WRITE(mac, 0x7d, 0xa8); 645191762Simp RF_WRITE(mac, 0x7c, 0x1); 646191762Simp RF_WRITE(mac, 0x7e, 0x8); 647191762Simp } 648191762Simp 649191762Simp val = 0x1e1f; 650191762Simp for (ofs = 0x88; ofs < 0x98; ++ofs) { 651191762Simp PHY_WRITE(mac, ofs, val); 652191762Simp val -= 0x202; 653191762Simp } 654191762Simp 655191762Simp val = 0x3e3f; 656191762Simp for (ofs = 0x98; ofs < 0xa8; ++ofs) { 657191762Simp PHY_WRITE(mac, ofs, val); 658191762Simp val -= 0x202; 659191762Simp } 660191762Simp 661191762Simp val = 0x2120; 662191762Simp for (ofs = 0xa8; ofs < 0xc8; ++ofs) { 663191762Simp PHY_WRITE(mac, ofs, (val & 0x3f3f)); 664191762Simp val += 0x202; 665192046Snwhitehorn 666192046Snwhitehorn /* XXX: delay 10 us to avoid PCI parity errors with BCM4318 */ 667192042Snwhitehorn DELAY(10); 668191762Simp } 669191762Simp 670191762Simp if (phy->phy_mode == IEEE80211_MODE_11G) { 671191762Simp RF_SETBITS(mac, 0x7a, 0x20); 672191762Simp RF_SETBITS(mac, 0x51, 0x4); 673191762Simp PHY_SETBITS(mac, 0x802, 0x100); 674191762Simp PHY_SETBITS(mac, 0x42b, 0x2000); 675191762Simp PHY_WRITE(mac, 0x5b, 0); 676191762Simp PHY_WRITE(mac, 0x5c, 0); 677191762Simp } 678191762Simp 679191762Simp /* Force to channel 7 */ 680191762Simp orig_chan = rf->rf_curchan; 681191762Simp if (orig_chan >= 8) 682191762Simp bwi_rf_set_chan(mac, 1, 0); 683191762Simp else 684191762Simp bwi_rf_set_chan(mac, 13, 0); 685191762Simp 686191762Simp RF_WRITE(mac, 0x50, 0x20); 687191762Simp RF_WRITE(mac, 0x50, 0x23); 688191762Simp 689191762Simp DELAY(40); 690191762Simp 691191762Simp if (rf->rf_rev < 6 || rf->rf_rev == 8) { 692191762Simp RF_SETBITS(mac, 0x7c, 0x2); 693191762Simp RF_WRITE(mac, 0x50, 0x20); 694191762Simp } 695191762Simp if (rf->rf_rev <= 2) { 696191762Simp RF_WRITE(mac, 0x7c, 0x20); 697191762Simp RF_WRITE(mac, 0x5a, 0x70); 698191762Simp RF_WRITE(mac, 0x5b, 0x7b); 699191762Simp RF_WRITE(mac, 0x5c, 0xb0); 700191762Simp } 701191762Simp 702191762Simp RF_FILT_SETBITS(mac, 0x7a, 0xf8, 0x7); 703191762Simp 704191762Simp bwi_rf_set_chan(mac, orig_chan, 0); 705191762Simp 706191762Simp PHY_WRITE(mac, 0x14, 0x200); 707191762Simp if (rf->rf_rev >= 6) 708191762Simp PHY_WRITE(mac, 0x2a, 0x88c2); 709191762Simp else 710191762Simp PHY_WRITE(mac, 0x2a, 0x8ac0); 711191762Simp PHY_WRITE(mac, 0x38, 0x668); 712191762Simp 713191762Simp bwi_mac_set_tpctl_11bg(mac, NULL); 714191762Simp 715191762Simp if (rf->rf_rev <= 5) { 716191762Simp PHY_FILT_SETBITS(mac, 0x5d, 0xff80, 0x3); 717191762Simp if (rf->rf_rev <= 2) 718191762Simp RF_WRITE(mac, 0x5d, 0xd); 719191762Simp } 720191762Simp 721191762Simp if (phy->phy_version == 4) { 722191762Simp CSR_WRITE_2(sc, BWI_PHY_MAGIC_REG1, BWI_PHY_MAGIC_REG1_VAL2); 723191762Simp PHY_CLRBITS(mac, 0x61, 0xf000); 724191762Simp } else { 725191762Simp PHY_FILT_SETBITS(mac, 0x2, 0xffc0, 0x4); 726191762Simp } 727191762Simp 728191762Simp if (phy->phy_mode == IEEE80211_MODE_11B) { 729191762Simp CSR_WRITE_2(sc, BWI_BBP_ATTEN, BWI_BBP_ATTEN_MAGIC2); 730191762Simp PHY_WRITE(mac, 0x16, 0x410); 731191762Simp PHY_WRITE(mac, 0x17, 0x820); 732191762Simp PHY_WRITE(mac, 0x62, 0x7); 733191762Simp 734191762Simp bwi_rf_init_bcm2050(mac); 735191762Simp bwi_rf_lo_update(mac); 736191762Simp if (sc->sc_card_flags & BWI_CARD_F_SW_NRSSI) { 737191762Simp bwi_rf_calc_nrssi_slope(mac); 738191762Simp bwi_rf_set_nrssi_thr(mac); 739191762Simp } 740191762Simp bwi_mac_init_tpctl_11bg(mac); 741191762Simp } else { 742191762Simp CSR_WRITE_2(sc, BWI_BBP_ATTEN, 0); 743191762Simp } 744191762Simp} 745191762Simp 746191762Simp#define N(arr) (int)(sizeof(arr) / sizeof(arr[0])) 747191762Simp 748191762Simpstatic void 749191762Simpbwi_phy_config_11g(struct bwi_mac *mac) 750191762Simp{ 751191762Simp struct bwi_softc *sc = mac->mac_sc; 752191762Simp struct bwi_phy *phy = &mac->mac_phy; 753191762Simp const uint16_t *tbl; 754191762Simp uint16_t wrd_ofs1, wrd_ofs2; 755191762Simp int i, n; 756191762Simp 757191762Simp if (phy->phy_rev == 1) { 758191762Simp PHY_WRITE(mac, 0x406, 0x4f19); 759191762Simp PHY_FILT_SETBITS(mac, 0x429, 0xfc3f, 0x340); 760191762Simp PHY_WRITE(mac, 0x42c, 0x5a); 761191762Simp PHY_WRITE(mac, 0x427, 0x1a); 762191762Simp 763191762Simp /* Fill frequency table */ 764191762Simp for (i = 0; i < N(bwi_phy_freq_11g_rev1); ++i) { 765191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_FREQ + i, 766191762Simp bwi_phy_freq_11g_rev1[i]); 767191762Simp } 768191762Simp 769191762Simp /* Fill noise table */ 770191762Simp for (i = 0; i < N(bwi_phy_noise_11g_rev1); ++i) { 771191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE + i, 772191762Simp bwi_phy_noise_11g_rev1[i]); 773191762Simp } 774191762Simp 775191762Simp /* Fill rotor table */ 776191762Simp for (i = 0; i < N(bwi_phy_rotor_11g_rev1); ++i) { 777191762Simp /* NB: data length is 4 bytes */ 778191762Simp bwi_tbl_write_4(mac, BWI_PHYTBL_ROTOR + i, 779191762Simp bwi_phy_rotor_11g_rev1[i]); 780191762Simp } 781191762Simp } else { 782191762Simp bwi_nrssi_write(mac, 0xba98, (int16_t)0x7654); /* XXX */ 783191762Simp 784191762Simp if (phy->phy_rev == 2) { 785191762Simp PHY_WRITE(mac, 0x4c0, 0x1861); 786191762Simp PHY_WRITE(mac, 0x4c1, 0x271); 787191762Simp } else if (phy->phy_rev > 2) { 788191762Simp PHY_WRITE(mac, 0x4c0, 0x98); 789191762Simp PHY_WRITE(mac, 0x4c1, 0x70); 790191762Simp PHY_WRITE(mac, 0x4c9, 0x80); 791191762Simp } 792191762Simp PHY_SETBITS(mac, 0x42b, 0x800); 793191762Simp 794191762Simp /* Fill RSSI table */ 795191762Simp for (i = 0; i < 64; ++i) 796191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_RSSI + i, i); 797191762Simp 798191762Simp /* Fill noise table */ 799234753Sdim for (i = 0; i < N(bwi_phy_noise_11g); ++i) { 800191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE + i, 801191762Simp bwi_phy_noise_11g[i]); 802191762Simp } 803191762Simp } 804191762Simp 805191762Simp /* 806191762Simp * Fill noise scale table 807191762Simp */ 808191762Simp if (phy->phy_rev <= 2) { 809191762Simp tbl = bwi_phy_noise_scale_11g_rev2; 810191762Simp n = N(bwi_phy_noise_scale_11g_rev2); 811191762Simp } else if (phy->phy_rev >= 7 && (PHY_READ(mac, 0x449) & 0x200)) { 812191762Simp tbl = bwi_phy_noise_scale_11g_rev7; 813191762Simp n = N(bwi_phy_noise_scale_11g_rev7); 814191762Simp } else { 815191762Simp tbl = bwi_phy_noise_scale_11g; 816191762Simp n = N(bwi_phy_noise_scale_11g); 817191762Simp } 818191762Simp for (i = 0; i < n; ++i) 819191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_NOISE_SCALE + i, tbl[i]); 820191762Simp 821191762Simp /* 822191762Simp * Fill sigma square table 823191762Simp */ 824191762Simp if (phy->phy_rev == 2) { 825191762Simp tbl = bwi_phy_sigma_sq_11g_rev2; 826191762Simp n = N(bwi_phy_sigma_sq_11g_rev2); 827191762Simp } else if (phy->phy_rev > 2 && phy->phy_rev <= 8) { 828191762Simp tbl = bwi_phy_sigma_sq_11g_rev7; 829191762Simp n = N(bwi_phy_sigma_sq_11g_rev7); 830191762Simp } else { 831191762Simp tbl = NULL; 832191762Simp n = 0; 833191762Simp } 834191762Simp for (i = 0; i < n; ++i) 835191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_SIGMA_SQ + i, tbl[i]); 836191762Simp 837191762Simp if (phy->phy_rev == 1) { 838191762Simp /* Fill delay table */ 839191762Simp for (i = 0; i < N(bwi_phy_delay_11g_rev1); ++i) { 840191762Simp bwi_tbl_write_4(mac, BWI_PHYTBL_DELAY + i, 841191762Simp bwi_phy_delay_11g_rev1[i]); 842191762Simp } 843191762Simp 844191762Simp /* Fill WRSSI (Wide-Band RSSI) table */ 845191762Simp for (i = 4; i < 20; ++i) 846191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_WRSSI_REV1 + i, 0x20); 847191762Simp 848191762Simp bwi_phy_config_agc(mac); 849191762Simp 850191762Simp wrd_ofs1 = 0x5001; 851191762Simp wrd_ofs2 = 0x5002; 852191762Simp } else { 853191762Simp /* Fill WRSSI (Wide-Band RSSI) table */ 854191762Simp for (i = 0; i < 0x20; ++i) 855191762Simp bwi_tbl_write_2(mac, BWI_PHYTBL_WRSSI + i, 0x820); 856191762Simp 857191762Simp bwi_phy_config_agc(mac); 858191762Simp 859191762Simp PHY_READ(mac, 0x400); /* Dummy read */ 860191762Simp PHY_WRITE(mac, 0x403, 0x1000); 861191762Simp bwi_tbl_write_2(mac, 0x3c02, 0xf); 862191762Simp bwi_tbl_write_2(mac, 0x3c03, 0x14); 863191762Simp 864191762Simp wrd_ofs1 = 0x401; 865191762Simp wrd_ofs2 = 0x402; 866191762Simp } 867191762Simp 868191762Simp if (!(BWI_IS_BRCM_BU4306(sc) && sc->sc_pci_revid == 0x17)) { 869191762Simp bwi_tbl_write_2(mac, wrd_ofs1, 0x2); 870191762Simp bwi_tbl_write_2(mac, wrd_ofs2, 0x1); 871191762Simp } 872191762Simp 873191762Simp /* phy->phy_flags & BWI_PHY_F_LINKED ? */ 874191762Simp if (sc->sc_card_flags & BWI_CARD_F_PA_GPIO9) 875191762Simp PHY_WRITE(mac, 0x46e, 0x3cf); 876191762Simp} 877191762Simp 878191762Simp#undef N 879191762Simp 880191762Simp/* 881191762Simp * Configure Automatic Gain Controller 882191762Simp */ 883191762Simpstatic void 884191762Simpbwi_phy_config_agc(struct bwi_mac *mac) 885191762Simp{ 886191762Simp struct bwi_phy *phy = &mac->mac_phy; 887191762Simp uint16_t ofs; 888191762Simp 889191762Simp ofs = phy->phy_rev == 1 ? 0x4c00 : 0; 890191762Simp 891191762Simp bwi_tbl_write_2(mac, ofs, 0xfe); 892191762Simp bwi_tbl_write_2(mac, ofs + 1, 0xd); 893191762Simp bwi_tbl_write_2(mac, ofs + 2, 0x13); 894191762Simp bwi_tbl_write_2(mac, ofs + 3, 0x19); 895191762Simp 896191762Simp if (phy->phy_rev == 1) { 897191762Simp bwi_tbl_write_2(mac, 0x1800, 0x2710); 898191762Simp bwi_tbl_write_2(mac, 0x1801, 0x9b83); 899191762Simp bwi_tbl_write_2(mac, 0x1802, 0x9b83); 900191762Simp bwi_tbl_write_2(mac, 0x1803, 0xf8d); 901191762Simp PHY_WRITE(mac, 0x455, 0x4); 902191762Simp } 903191762Simp 904191762Simp PHY_FILT_SETBITS(mac, 0x4a5, 0xff, 0x5700); 905191762Simp PHY_FILT_SETBITS(mac, 0x41a, 0xff80, 0xf); 906191762Simp PHY_FILT_SETBITS(mac, 0x41a, 0xc07f, 0x2b80); 907191762Simp PHY_FILT_SETBITS(mac, 0x48c, 0xf0ff, 0x300); 908191762Simp 909191762Simp RF_SETBITS(mac, 0x7a, 0x8); 910191762Simp 911191762Simp PHY_FILT_SETBITS(mac, 0x4a0, 0xfff0, 0x8); 912191762Simp PHY_FILT_SETBITS(mac, 0x4a1, 0xf0ff, 0x600); 913191762Simp PHY_FILT_SETBITS(mac, 0x4a2, 0xf0ff, 0x700); 914191762Simp PHY_FILT_SETBITS(mac, 0x4a0, 0xf0ff, 0x100); 915191762Simp 916191762Simp if (phy->phy_rev == 1) 917191762Simp PHY_FILT_SETBITS(mac, 0x4a2, 0xfff0, 0x7); 918191762Simp 919191762Simp PHY_FILT_SETBITS(mac, 0x488, 0xff00, 0x1c); 920191762Simp PHY_FILT_SETBITS(mac, 0x488, 0xc0ff, 0x200); 921191762Simp PHY_FILT_SETBITS(mac, 0x496, 0xff00, 0x1c); 922191762Simp PHY_FILT_SETBITS(mac, 0x489, 0xff00, 0x20); 923191762Simp PHY_FILT_SETBITS(mac, 0x489, 0xc0ff, 0x200); 924191762Simp PHY_FILT_SETBITS(mac, 0x482, 0xff00, 0x2e); 925191762Simp PHY_FILT_SETBITS(mac, 0x496, 0xff, 0x1a00); 926191762Simp PHY_FILT_SETBITS(mac, 0x481, 0xff00, 0x28); 927191762Simp PHY_FILT_SETBITS(mac, 0x481, 0xff, 0x2c00); 928191762Simp 929191762Simp if (phy->phy_rev == 1) { 930191762Simp PHY_WRITE(mac, 0x430, 0x92b); 931191762Simp PHY_FILT_SETBITS(mac, 0x41b, 0xffe1, 0x2); 932191762Simp } else { 933191762Simp PHY_CLRBITS(mac, 0x41b, 0x1e); 934191762Simp PHY_WRITE(mac, 0x41f, 0x287a); 935191762Simp PHY_FILT_SETBITS(mac, 0x420, 0xfff0, 0x4); 936191762Simp 937191762Simp if (phy->phy_rev >= 6) { 938191762Simp PHY_WRITE(mac, 0x422, 0x287a); 939191762Simp PHY_FILT_SETBITS(mac, 0x420, 0xfff, 0x3000); 940191762Simp } 941191762Simp } 942191762Simp 943191762Simp PHY_FILT_SETBITS(mac, 0x4a8, 0x8080, 0x7874); 944191762Simp PHY_WRITE(mac, 0x48e, 0x1c00); 945191762Simp 946191762Simp if (phy->phy_rev == 1) { 947191762Simp PHY_FILT_SETBITS(mac, 0x4ab, 0xf0ff, 0x600); 948191762Simp PHY_WRITE(mac, 0x48b, 0x5e); 949191762Simp PHY_FILT_SETBITS(mac, 0x48c, 0xff00, 0x1e); 950191762Simp PHY_WRITE(mac, 0x48d, 0x2); 951191762Simp } 952191762Simp 953191762Simp bwi_tbl_write_2(mac, ofs + 0x800, 0); 954191762Simp bwi_tbl_write_2(mac, ofs + 0x801, 7); 955191762Simp bwi_tbl_write_2(mac, ofs + 0x802, 16); 956191762Simp bwi_tbl_write_2(mac, ofs + 0x803, 28); 957191762Simp 958191762Simp if (phy->phy_rev >= 6) { 959191762Simp PHY_CLRBITS(mac, 0x426, 0x3); 960191762Simp PHY_CLRBITS(mac, 0x426, 0x1000); 961191762Simp } 962191762Simp} 963191762Simp 964191762Simpvoid 965191762Simpbwi_set_gains(struct bwi_mac *mac, const struct bwi_gains *gains) 966191762Simp{ 967191762Simp struct bwi_phy *phy = &mac->mac_phy; 968191762Simp uint16_t tbl_gain_ofs1, tbl_gain_ofs2, tbl_gain; 969191762Simp int i; 970191762Simp 971191762Simp if (phy->phy_rev <= 1) { 972191762Simp tbl_gain_ofs1 = 0x5000; 973191762Simp tbl_gain_ofs2 = tbl_gain_ofs1 + 16; 974191762Simp } else { 975191762Simp tbl_gain_ofs1 = 0x400; 976191762Simp tbl_gain_ofs2 = tbl_gain_ofs1 + 8; 977191762Simp } 978191762Simp 979191762Simp for (i = 0; i < 4; ++i) { 980191762Simp if (gains != NULL) { 981191762Simp tbl_gain = gains->tbl_gain1; 982191762Simp } else { 983191762Simp /* Bit swap */ 984191762Simp tbl_gain = (i & 0x1) << 1; 985191762Simp tbl_gain |= (i & 0x2) >> 1; 986191762Simp } 987191762Simp bwi_tbl_write_2(mac, tbl_gain_ofs1 + i, tbl_gain); 988191762Simp } 989191762Simp 990191762Simp for (i = 0; i < 16; ++i) { 991191762Simp if (gains != NULL) 992191762Simp tbl_gain = gains->tbl_gain2; 993191762Simp else 994191762Simp tbl_gain = i; 995191762Simp bwi_tbl_write_2(mac, tbl_gain_ofs2 + i, tbl_gain); 996191762Simp } 997191762Simp 998191762Simp if (gains == NULL || (gains != NULL && gains->phy_gain != -1)) { 999191762Simp uint16_t phy_gain1, phy_gain2; 1000191762Simp 1001191762Simp if (gains != NULL) { 1002191762Simp phy_gain1 = 1003191762Simp ((uint16_t)gains->phy_gain << 14) | 1004191762Simp ((uint16_t)gains->phy_gain << 6); 1005191762Simp phy_gain2 = phy_gain1; 1006191762Simp } else { 1007191762Simp phy_gain1 = 0x4040; 1008191762Simp phy_gain2 = 0x4000; 1009191762Simp } 1010191762Simp PHY_FILT_SETBITS(mac, 0x4a0, 0xbfbf, phy_gain1); 1011191762Simp PHY_FILT_SETBITS(mac, 0x4a1, 0xbfbf, phy_gain1); 1012191762Simp PHY_FILT_SETBITS(mac, 0x4a2, 0xbfbf, phy_gain2); 1013191762Simp } 1014191762Simp bwi_mac_dummy_xmit(mac); 1015191762Simp} 1016191762Simp 1017191762Simpvoid 1018191762Simpbwi_phy_clear_state(struct bwi_phy *phy) 1019191762Simp{ 1020191762Simp phy->phy_flags &= ~BWI_CLEAR_PHY_FLAGS; 1021191762Simp} 1022