x86emu_regs.h revision 225736
1104964Sjeff/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */ 2104964Sjeff/* $OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */ 3104964Sjeff 4104964Sjeff/**************************************************************************** 5104964Sjeff* 6104964Sjeff* Realmode X86 Emulator Library 7104964Sjeff* 8104964Sjeff* Copyright (C) 1996-1999 SciTech Software, Inc. 9104964Sjeff* Copyright (C) David Mosberger-Tang 10104964Sjeff* Copyright (C) 1999 Egbert Eich 11104964Sjeff* Copyright (C) 2007 Joerg Sonnenberger 12104964Sjeff* 13104964Sjeff* ======================================================================== 14104964Sjeff* 15104964Sjeff* Permission to use, copy, modify, distribute, and sell this software and 16104964Sjeff* its documentation for any purpose is hereby granted without fee, 17104964Sjeff* provided that the above copyright notice appear in all copies and that 18104964Sjeff* both that copyright notice and this permission notice appear in 19104964Sjeff* supporting documentation, and that the name of the authors not be used 20104964Sjeff* in advertising or publicity pertaining to distribution of the software 21104964Sjeff* without specific, written prior permission. The authors makes no 22104964Sjeff* representations about the suitability of this software for any purpose. 23104964Sjeff* It is provided "as is" without express or implied warranty. 24104964Sjeff* 25104964Sjeff* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 26104964Sjeff* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 27104964Sjeff* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 28104964Sjeff* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 29104964Sjeff* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 30104964Sjeff* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 31104964Sjeff* PERFORMANCE OF THIS SOFTWARE. 32104964Sjeff* 33104964Sjeff****************************************************************************/ 34104964Sjeff 35116182Sobrien#ifndef __X86EMU_REGS_H 36116182Sobrien#define __X86EMU_REGS_H 37116182Sobrien 38147565Speter/*---------------------- Macros and type definitions ----------------------*/ 39177418Sjeff 40179297Sjb/* 8 bit registers */ 41147565Speter#define R_AH register_a.I8_reg.h_reg 42104964Sjeff#define R_AL register_a.I8_reg.l_reg 43104964Sjeff#define R_BH register_b.I8_reg.h_reg 44176750Smarcel#define R_BL register_b.I8_reg.l_reg 45104964Sjeff#define R_CH register_c.I8_reg.h_reg 46104964Sjeff#define R_CL register_c.I8_reg.l_reg 47104964Sjeff#define R_DH register_d.I8_reg.h_reg 48123871Sjhb#define R_DL register_d.I8_reg.l_reg 49104964Sjeff 50104964Sjeff/* 16 bit registers */ 51104964Sjeff#define R_AX register_a.I16_reg.x_reg 52104964Sjeff#define R_BX register_b.I16_reg.x_reg 53235459Srstone#define R_CX register_c.I16_reg.x_reg 54104964Sjeff#define R_DX register_d.I16_reg.x_reg 55104964Sjeff 56104964Sjeff/* 32 bit extended registers */ 57139453Sjhb#define R_EAX register_a.I32_reg.e_reg 58161599Sdavidxu#define R_EBX register_b.I32_reg.e_reg 59160039Sobrien#define R_ECX register_c.I32_reg.e_reg 60134689Sjulian#define R_EDX register_d.I32_reg.e_reg 61104964Sjeff 62145256Sjkoshy/* special registers */ 63145256Sjkoshy#define R_SP register_sp.I16_reg.x_reg 64145256Sjkoshy#define R_BP register_bp.I16_reg.x_reg 65145256Sjkoshy#define R_SI register_si.I16_reg.x_reg 66179297Sjb#define R_DI register_di.I16_reg.x_reg 67179297Sjb#define R_IP register_ip.I16_reg.x_reg 68179297Sjb#define R_FLG register_flags 69179297Sjb 70179297Sjb/* special registers */ 71179297Sjb#define R_ESP register_sp.I32_reg.e_reg 72107135Sjeff#define R_EBP register_bp.I32_reg.e_reg 73107135Sjeff#define R_ESI register_si.I32_reg.e_reg 74107135Sjeff#define R_EDI register_di.I32_reg.e_reg 75107135Sjeff#define R_EIP register_ip.I32_reg.e_reg 76107135Sjeff#define R_EFLG register_flags 77107135Sjeff 78107135Sjeff/* segment registers */ 79122355Sbde#define R_CS register_cs 80122355Sbde#define R_DS register_ds 81122355Sbde#define R_SS register_ss 82107135Sjeff#define R_ES register_es 83122355Sbde#define R_FS register_fs 84107135Sjeff#define R_GS register_gs 85107135Sjeff 86187679Sjeff/* flag conditions */ 87187357Sjeff#define FB_CF 0x0001 /* CARRY flag */ 88134791Sjulian#define FB_PF 0x0004 /* PARITY flag */ 89163709Sjb#define FB_AF 0x0010 /* AUX flag */ 90164936Sjulian#define FB_ZF 0x0040 /* ZERO flag */ 91164936Sjulian#define FB_SF 0x0080 /* SIGN flag */ 92163709Sjb#define FB_TF 0x0100 /* TRAP flag */ 93164936Sjulian#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ 94164936Sjulian#define FB_DF 0x0400 /* DIR flag */ 95164936Sjulian#define FB_OF 0x0800 /* OVERFLOW flag */ 96172264Sjeff 97239153Smav/* 80286 and above always have bit#1 set */ 98180923Sjhb#define F_ALWAYS_ON (0x0002) /* flag bits always on */ 99164936Sjulian 100187357Sjeff/* 101187357Sjeff * Define a mask for only those flag bits we will ever pass back 102187357Sjeff * (via PUSHF) 103109145Sjeff */ 104109145Sjeff#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) 105134791Sjulian 106164936Sjulian/* following bits masked in to a 16bit quantity */ 107177435Sjeff 108239157Smav#define F_CF 0x0001 /* CARRY flag */ 109134791Sjulian#define F_PF 0x0004 /* PARITY flag */ 110180923Sjhb#define F_AF 0x0010 /* AUX flag */ 111180923Sjhb#define F_ZF 0x0040 /* ZERO flag */ 112180923Sjhb#define F_SF 0x0080 /* SIGN flag */ 113164936Sjulian#define F_TF 0x0100 /* TRAP flag */ 114164936Sjulian#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ 115124955Sjeff#define F_DF 0x0400 /* DIR flag */ 116180923Sjhb#define F_OF 0x0800 /* OVERFLOW flag */ 117180923Sjhb 118180923Sjhb#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag)) 119164936Sjulian#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag)) 120171488Sjeff#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag)) 121134791Sjulian#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0) 122239185Smav 123125288Sjeff#define CONDITIONAL_SET_FLAG(COND,FLAG) \ 124239185Smav if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) 125104964Sjeff 126124955Sjeff#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ 127123871Sjhb#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ 128124955Sjeff#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ 129139453Sjhb 130104964Sjeff#define F_ALL_CALC 0xff0000 /* All have been calced */ 131104964Sjeff 132163709Sjb/* 133163709Sjb * Emulator machine state. 134163709Sjb * Segment usage control. 135134694Sjulian */ 136180923Sjhb#define SYSMODE_SEG_DS_SS 0x00000001 137180879Sjhb#define SYSMODE_SEGOVR_CS 0x00000002 138180879Sjhb#define SYSMODE_SEGOVR_DS 0x00000004 139134694Sjulian#define SYSMODE_SEGOVR_ES 0x00000008 140104964Sjeff#define SYSMODE_SEGOVR_FS 0x00000010 141124955Sjeff#define SYSMODE_SEGOVR_GS 0x00000020 142124955Sjeff#define SYSMODE_SEGOVR_SS 0x00000040 143124955Sjeff#define SYSMODE_PREFIX_REPE 0x00000080 144124955Sjeff#define SYSMODE_PREFIX_REPNE 0x00000100 145124955Sjeff#define SYSMODE_PREFIX_DATA 0x00000200 146253604Savg#define SYSMODE_PREFIX_ADDR 0x00000400 147177253Srwatson#define SYSMODE_INTR_PENDING 0x10000000 148177253Srwatson#define SYSMODE_EXTRN_INTR 0x20000000 149104964Sjeff#define SYSMODE_HALTED 0x40000000 150239153Smav 151239153Smav#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ 152239153Smav SYSMODE_SEGOVR_CS | \ 153239153Smav SYSMODE_SEGOVR_DS | \ 154104964Sjeff SYSMODE_SEGOVR_ES | \ 155104964Sjeff SYSMODE_SEGOVR_FS | \ 156104964Sjeff SYSMODE_SEGOVR_GS | \ 157104964Sjeff SYSMODE_SEGOVR_SS) 158104964Sjeff#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ 159124955Sjeff SYSMODE_SEGOVR_CS | \ 160124955Sjeff SYSMODE_SEGOVR_DS | \ 161124955Sjeff SYSMODE_SEGOVR_ES | \ 162124955Sjeff SYSMODE_SEGOVR_FS | \ 163124955Sjeff SYSMODE_SEGOVR_GS | \ 164180923Sjhb SYSMODE_SEGOVR_SS | \ 165222001Sattilio SYSMODE_PREFIX_DATA | \ 166222813Sattilio SYSMODE_PREFIX_ADDR) 167124955Sjeff 168124955Sjeff#define INTR_SYNCH 0x1 169212455Smav 170212455Smav#endif /* __X86EMU_REGS_H */ 171212455Smav