1/* $NetBSD: x86emu_regs.h,v 1.1 2007/12/01 20:14:10 joerg Exp $ */ 2/* $OpenBSD: x86emu_regs.h,v 1.2 2009/06/06 03:45:05 matthieu Exp $ */ 3 4/**************************************************************************** 5* 6* Realmode X86 Emulator Library 7* 8* Copyright (C) 1996-1999 SciTech Software, Inc. 9* Copyright (C) David Mosberger-Tang 10* Copyright (C) 1999 Egbert Eich 11* Copyright (C) 2007 Joerg Sonnenberger 12* 13* ======================================================================== 14* 15* Permission to use, copy, modify, distribute, and sell this software and 16* its documentation for any purpose is hereby granted without fee, 17* provided that the above copyright notice appear in all copies and that 18* both that copyright notice and this permission notice appear in 19* supporting documentation, and that the name of the authors not be used 20* in advertising or publicity pertaining to distribution of the software 21* without specific, written prior permission. The authors makes no 22* representations about the suitability of this software for any purpose. 23* It is provided "as is" without express or implied warranty. 24* 25* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 26* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 27* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 28* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF 29* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR 30* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR 31* PERFORMANCE OF THIS SOFTWARE. 32* 33****************************************************************************/ 34 35#ifndef __X86EMU_REGS_H 36#define __X86EMU_REGS_H 37 38/*---------------------- Macros and type definitions ----------------------*/ 39 40/* 8 bit registers */ 41#define R_AH register_a.I8_reg.h_reg 42#define R_AL register_a.I8_reg.l_reg 43#define R_BH register_b.I8_reg.h_reg 44#define R_BL register_b.I8_reg.l_reg 45#define R_CH register_c.I8_reg.h_reg 46#define R_CL register_c.I8_reg.l_reg 47#define R_DH register_d.I8_reg.h_reg 48#define R_DL register_d.I8_reg.l_reg 49 50/* 16 bit registers */ 51#define R_AX register_a.I16_reg.x_reg 52#define R_BX register_b.I16_reg.x_reg 53#define R_CX register_c.I16_reg.x_reg 54#define R_DX register_d.I16_reg.x_reg 55 56/* 32 bit extended registers */ 57#define R_EAX register_a.I32_reg.e_reg 58#define R_EBX register_b.I32_reg.e_reg 59#define R_ECX register_c.I32_reg.e_reg 60#define R_EDX register_d.I32_reg.e_reg 61 62/* special registers */ 63#define R_SP register_sp.I16_reg.x_reg 64#define R_BP register_bp.I16_reg.x_reg 65#define R_SI register_si.I16_reg.x_reg 66#define R_DI register_di.I16_reg.x_reg 67#define R_IP register_ip.I16_reg.x_reg 68#define R_FLG register_flags 69 70/* special registers */ 71#define R_ESP register_sp.I32_reg.e_reg 72#define R_EBP register_bp.I32_reg.e_reg 73#define R_ESI register_si.I32_reg.e_reg 74#define R_EDI register_di.I32_reg.e_reg 75#define R_EIP register_ip.I32_reg.e_reg 76#define R_EFLG register_flags 77 78/* segment registers */ 79#define R_CS register_cs 80#define R_DS register_ds 81#define R_SS register_ss 82#define R_ES register_es 83#define R_FS register_fs 84#define R_GS register_gs 85 86/* flag conditions */ 87#define FB_CF 0x0001 /* CARRY flag */ 88#define FB_PF 0x0004 /* PARITY flag */ 89#define FB_AF 0x0010 /* AUX flag */ 90#define FB_ZF 0x0040 /* ZERO flag */ 91#define FB_SF 0x0080 /* SIGN flag */ 92#define FB_TF 0x0100 /* TRAP flag */ 93#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */ 94#define FB_DF 0x0400 /* DIR flag */ 95#define FB_OF 0x0800 /* OVERFLOW flag */ 96 97/* 80286 and above always have bit#1 set */ 98#define F_ALWAYS_ON (0x0002) /* flag bits always on */ 99 100/* 101 * Define a mask for only those flag bits we will ever pass back 102 * (via PUSHF) 103 */ 104#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) 105 106/* following bits masked in to a 16bit quantity */ 107 108#define F_CF 0x0001 /* CARRY flag */ 109#define F_PF 0x0004 /* PARITY flag */ 110#define F_AF 0x0010 /* AUX flag */ 111#define F_ZF 0x0040 /* ZERO flag */ 112#define F_SF 0x0080 /* SIGN flag */ 113#define F_TF 0x0100 /* TRAP flag */ 114#define F_IF 0x0200 /* INTERRUPT ENABLE flag */ 115#define F_DF 0x0400 /* DIR flag */ 116#define F_OF 0x0800 /* OVERFLOW flag */ 117 118#define SET_FLAG(flag) (emu->x86.R_FLG |= (flag)) 119#define CLEAR_FLAG(flag) (emu->x86.R_FLG &= ~(flag)) 120#define ACCESS_FLAG(flag) (emu->x86.R_FLG & (flag)) 121#define CLEARALL_FLAG(m) (emu->x86.R_FLG = 0) 122 123#define CONDITIONAL_SET_FLAG(COND,FLAG) \ 124 if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG) 125 126#define F_PF_CALC 0x010000 /* PARITY flag has been calced */ 127#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */ 128#define F_SF_CALC 0x040000 /* SIGN flag has been calced */ 129 130#define F_ALL_CALC 0xff0000 /* All have been calced */ 131 132/* 133 * Emulator machine state. 134 * Segment usage control. 135 */ 136#define SYSMODE_SEG_DS_SS 0x00000001 137#define SYSMODE_SEGOVR_CS 0x00000002 138#define SYSMODE_SEGOVR_DS 0x00000004 139#define SYSMODE_SEGOVR_ES 0x00000008 140#define SYSMODE_SEGOVR_FS 0x00000010 141#define SYSMODE_SEGOVR_GS 0x00000020 142#define SYSMODE_SEGOVR_SS 0x00000040 143#define SYSMODE_PREFIX_REPE 0x00000080 144#define SYSMODE_PREFIX_REPNE 0x00000100 145#define SYSMODE_PREFIX_DATA 0x00000200 146#define SYSMODE_PREFIX_ADDR 0x00000400 147#define SYSMODE_INTR_PENDING 0x10000000 148#define SYSMODE_EXTRN_INTR 0x20000000 149#define SYSMODE_HALTED 0x40000000 150 151#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ 152 SYSMODE_SEGOVR_CS | \ 153 SYSMODE_SEGOVR_DS | \ 154 SYSMODE_SEGOVR_ES | \ 155 SYSMODE_SEGOVR_FS | \ 156 SYSMODE_SEGOVR_GS | \ 157 SYSMODE_SEGOVR_SS) 158#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ 159 SYSMODE_SEGOVR_CS | \ 160 SYSMODE_SEGOVR_DS | \ 161 SYSMODE_SEGOVR_ES | \ 162 SYSMODE_SEGOVR_FS | \ 163 SYSMODE_SEGOVR_GS | \ 164 SYSMODE_SEGOVR_SS | \ 165 SYSMODE_PREFIX_DATA | \ 166 SYSMODE_PREFIX_ADDR) 167 168#define INTR_SYNCH 0x1 169 170#endif /* __X86EMU_REGS_H */ 171