1/***********************license start*************** 2 * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights 3 * reserved. 4 * 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: 9 * 10 * * Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 13 * * Redistributions in binary form must reproduce the above 14 * copyright notice, this list of conditions and the following 15 * disclaimer in the documentation and/or other materials provided 16 * with the distribution. 17 18 * * Neither the name of Cavium Networks nor the names of 19 * its contributors may be used to endorse or promote products 20 * derived from this software without specific prior written 21 * permission. 22 23 * This Software, including technical data, may be subject to U.S. export control 24 * laws, including the U.S. Export Administration Act and its associated 25 * regulations, and may be subject to export or import regulations in other 26 * countries. 27 28 * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" 29 * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR 30 * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO 31 * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR 32 * DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM 33 * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, 34 * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF 35 * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR 36 * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR 37 * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. 38 ***********************license end**************************************/ 39 40 41 42 43 44 45 46/** 47 * @file 48 * 49 * Utility functions for working with the CSR database 50 * 51 * <hr>$Revision: 49507 $<hr> 52 */ 53#ifdef CVMX_BUILD_FOR_LINUX_KERNEL 54#define PRINTF printk 55#include <asm/octeon/cvmx.h> 56#include <asm/octeon/cvmx-csr-db.h> 57#else 58#define PRINTF printf 59#include "cvmx.h" 60#include "cvmx-csr-db.h" 61#endif 62 63/** 64 * Figure out which database to use for this chip. The passed 65 * identifier can be a processor ID or a PCI ID. 66 * 67 * @param identifier processor ID or a PCI ID 68 * 69 * @return index into the csr db 70 */ 71int cvmx_db_get_chipindex(int identifier) 72{ 73 /* First try and see if the identifier is a Processor ID */ 74 switch (identifier & 0xffff00) 75 { 76 case 0x000d0600: /* CN50XX */ 77 return 8; 78 case 0x000d0400: /* CN56XX */ 79 return 7; 80 case 0x000d0300: /* CN58XX */ 81 return 5; 82 case 0x000d0000: /* CN38XX */ 83 return 3; 84 case 0x000d0100: /* CN31XX */ 85 return 1; 86 case 0x000d0200: /* CN3010 */ 87 return 2; 88 case 0x000d0700: /* CN52XX */ 89 return 10; 90 case 0x000d9000: /* CN63XX */ 91 return 11; 92 } 93 94 /* Next try PCI device IDs */ 95 switch (identifier) 96 { 97 case 0x0003177d: /* CN38XX Pass 1 */ 98 return 0; 99 case 0x0004177d: /* CN38XX Pass 2 */ 100 return 0; 101 case 0x0005177d: /* CN38XX Pass 3 */ 102 return 3; 103 case 0x1001177d: /* Thunder */ 104 return 3; 105 case 0x0020177d: /* CN31XX Pass 1 */ 106 return 1; 107 case 0x0030177d: /* CN30XX Pass 1 */ 108 return 2; 109 case 0x0040177d: /* CN58XX Pass 2 */ 110 return 5; 111 case 0x0050177d: /* CN56XX Pass 2 */ 112 return 7; 113 case 0x0070177d: /* CN50XX Pass 1 */ 114 return 8; 115 case 0x0080177d: /* CN52XX Pass 2 */ 116 return 10; 117 case 0x0090177d: /* CN63XX Pass 1 */ 118 return 11; 119 } 120 121 /* Default to Pass 3 if we don't know */ 122 return 3; 123} 124 125 126#ifndef CVMX_BUILD_FOR_LINUX_KERNEL 127/** 128 * Get the CSR DB entry for the passed Octeon model and CSR name. The 129 * model can either be specified as a processor id or PCI id. 130 * 131 * @param identifier Identifer to choose the CSR DB with 132 * @param name CSR name to lookup 133 * 134 * @return CSR DB entry or NULL on failure 135 */ 136const CVMX_CSR_DB_ADDRESS_TYPE *cvmx_csr_db_get(int identifier, const char *name) 137{ 138 int chip = cvmx_db_get_chipindex(identifier); 139 int i=0; 140 if (strncasecmp(name, "CVMX_", 5) == 0) 141 name += 5; 142 while (cvmx_csr_db_addresses[chip][i].name) 143 { 144 if (strcasecmp(name, cvmx_csr_db_addresses[chip][i].name) == 0) 145 return &(cvmx_csr_db_addresses[chip][i]); 146 i++; 147 } 148 return NULL; 149} 150#endif 151 152static void __cvmx_csr_db_decode_csr(int chip, int index, uint64_t value) 153{ 154 int field; 155 int csr = cvmx_csr_db_addresses[chip][index].csroff; 156 PRINTF("%s(0x%016llx) = 0x%016llx\n", cvmx_csr_db_addresses[chip][index].name, (unsigned long long)cvmx_csr_db_addresses[chip][index].address, (unsigned long long)value); 157 for (field=cvmx_csr_db[chip][csr].fieldoff+cvmx_csr_db[chip][csr].numfields-1; field>=cvmx_csr_db[chip][csr].fieldoff; field--) 158 { 159 uint64_t v = (value >> cvmx_csr_db_fields[chip][field].startbit); 160 if(cvmx_csr_db_fields[chip][field].sizebits < 64) 161 v = v & ~((~0x0ull) << cvmx_csr_db_fields[chip][field].sizebits); 162 if (cvmx_csr_db_fields[chip][field].sizebits == 1) 163 PRINTF(" [ %2d] %-20s = %10llu (0x%llx)\n", 164 cvmx_csr_db_fields[chip][field].startbit, cvmx_csr_db_fields[chip][field].name, 165 (unsigned long long)v, (unsigned long long)v); 166 else 167 PRINTF(" [%2d:%2d] %-20s = %10llu (0x%llx)\n", 168 cvmx_csr_db_fields[chip][field].startbit + cvmx_csr_db_fields[chip][field].sizebits - 1, 169 cvmx_csr_db_fields[chip][field].startbit, 170 cvmx_csr_db_fields[chip][field].name, 171 (unsigned long long)v, (unsigned long long)v); 172 } 173} 174 175/** 176 * Decode a CSR value into named bitfields. The model can either 177 * be specified as a processor id or PCI id. 178 * 179 * @param identifier Identifer to choose the CSR DB with 180 * @param address CSR address being decoded 181 * @param value Value to decode 182 */ 183void cvmx_csr_db_decode(int identifier, uint64_t address, uint64_t value) 184{ 185 int chip = cvmx_db_get_chipindex(identifier); 186 int index=0; 187 /* Strip off the upper 8 bits since they are normally mips addressing 188 modes */ 189 address &= (1ull<<56)-1; 190 while (cvmx_csr_db_addresses[chip][index].name) 191 { 192 if (cvmx_csr_db_addresses[chip][index].address == address) 193 __cvmx_csr_db_decode_csr(chip, index, value); 194 index++; 195 } 196} 197 198/** 199 * Decode a CSR value into named bitfields. The model can either 200 * be specified as a processor id or PCI id. 201 * 202 * @param identifier Identifer to choose the CSR DB with 203 * @param name CSR name to decode 204 * @param value Value to decode 205 */ 206void cvmx_csr_db_decode_by_name(int identifier, const char *name, uint64_t value) 207{ 208 int chip = cvmx_db_get_chipindex(identifier); 209 int index=0; 210 while (cvmx_csr_db_addresses[chip][index].name) 211 { 212 if (strcasecmp(name, cvmx_csr_db_addresses[chip][index].name) == 0) 213 { 214 __cvmx_csr_db_decode_csr(chip, index, value); 215 break; 216 } 217 index++; 218 } 219} 220 221 222#ifndef CVMX_BUILD_FOR_LINUX_KERNEL 223/** 224 * Print a list of csrs begimning with a prefix. The 225 * model can either be specified as a processor id or PCI id. 226 * 227 * @param identifier Identifer to choose the CSR DB with 228 * @param prefix Beginning prefix to look for 229 */ 230void cvmx_csr_db_display_list(int identifier, const char *prefix) 231{ 232 int i, len; 233 int chip = cvmx_db_get_chipindex(identifier); 234 if (prefix == NULL) 235 prefix = ""; 236 if (strncasecmp(prefix, "CVMX_", 5) == 0) 237 prefix += 5; 238 len = strlen(prefix); 239 240 i=0; 241 while (cvmx_csr_db_addresses[chip][i].name) 242 { 243 if (strncasecmp(prefix, cvmx_csr_db_addresses[chip][i].name, len) == 0) 244 PRINTF("%s\n", cvmx_csr_db_addresses[chip][i].name); 245 i++; 246 } 247} 248#endif 249