1/* $NetBSD: s3c2xx0var.h,v 1.3 2003/08/05 11:26:54 bsh Exp $ */ 2 3/*- 4 * Copyright (c) 2002 Fujitsu Component Limited 5 * Copyright (c) 2002 Genetec Corporation 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of The Fujitsu Component Limited nor the name of 17 * Genetec corporation may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY FUJITSU COMPONENT LIMITED AND GENETEC 21 * CORPORATION ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, 22 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 23 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 24 * DISCLAIMED. IN NO EVENT SHALL FUJITSU COMPONENT LIMITED OR GENETEC 25 * CORPORATION BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF 28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 29 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * $FreeBSD$ 35 */ 36 37#ifndef _ARM_S3C2XX0VAR_H_ 38#define _ARM_S3C2XX0VAR_H_ 39 40#include <machine/bus.h> 41#include <sys/rman.h> 42 43typedef enum { 44 CPU_S3C2410, 45 CPU_S3C2440, 46} s3c2xx0_cpu; 47 48struct s3c2xx0_softc { 49 device_t sc_dev; 50 51 s3c2xx0_cpu sc_cpu; 52 53 bus_space_tag_t sc_iot; 54 55 bus_space_handle_t sc_intctl_ioh; 56 bus_space_handle_t sc_gpio_ioh; /* GPIO */ 57 bus_space_handle_t sc_clkman_ioh; /* Clock manager */ 58 bus_space_handle_t sc_wdt_ioh; /* Watchdog Timer */ 59 60 bus_dma_tag_t sc_dmat; 61 62 /* clock frequency */ 63 int sc_fclk; /* CPU clock */ 64 int sc_hclk; /* AHB bus clock */ 65 int sc_pclk; /* peripheral clock */ 66 67 struct rman s3c2xx0_irq_rman; 68 struct rman s3c2xx0_mem_rman; 69}; 70 71struct s3c2xx0_ivar { 72 struct resource_list resources; 73}; 74 75typedef void *s3c2xx0_chipset_tag_t; 76 77extern struct bus_space s3c2xx0_bs_tag; 78extern struct s3c2xx0_softc *s3c2xx0_softc; 79extern struct arm32_bus_dma_tag s3c2xx0_bus_dma; 80 81/* Platform needs to provide this */ 82bus_dma_tag_t s3c2xx0_bus_dma_init(struct arm32_bus_dma_tag *); 83 84#endif /* _ARM_S3C2XX0VAR_H_ */ 85