fpu.h revision 114859
14Srgrimes/*- 24Srgrimes * Copyright (c) 1990 The Regents of the University of California. 34Srgrimes * All rights reserved. 44Srgrimes * 54Srgrimes * This code is derived from software contributed to Berkeley by 64Srgrimes * William Jolitz. 74Srgrimes * 84Srgrimes * Redistribution and use in source and binary forms, with or without 94Srgrimes * modification, are permitted provided that the following conditions 104Srgrimes * are met: 114Srgrimes * 1. Redistributions of source code must retain the above copyright 124Srgrimes * notice, this list of conditions and the following disclaimer. 134Srgrimes * 2. Redistributions in binary form must reproduce the above copyright 144Srgrimes * notice, this list of conditions and the following disclaimer in the 154Srgrimes * documentation and/or other materials provided with the distribution. 164Srgrimes * 3. All advertising materials mentioning features or use of this software 174Srgrimes * must display the following acknowledgement: 184Srgrimes * This product includes software developed by the University of 194Srgrimes * California, Berkeley and its contributors. 204Srgrimes * 4. Neither the name of the University nor the names of its contributors 214Srgrimes * may be used to endorse or promote products derived from this software 224Srgrimes * without specific prior written permission. 234Srgrimes * 244Srgrimes * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 254Srgrimes * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 264Srgrimes * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 274Srgrimes * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 284Srgrimes * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 294Srgrimes * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 304Srgrimes * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 314Srgrimes * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 324Srgrimes * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 334Srgrimes * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 344Srgrimes * SUCH DAMAGE. 354Srgrimes * 36621Srgrimes * from: @(#)npx.h 5.3 (Berkeley) 1/18/91 3750477Speter * $FreeBSD: head/sys/amd64/include/fpu.h 114859 2003-05-09 18:28:05Z peter $ 384Srgrimes */ 394Srgrimes 404Srgrimes/* 414Srgrimes * 287/387 NPX Coprocessor Data Structures and Constants 424Srgrimes * W. Jolitz 1/90 434Srgrimes */ 444Srgrimes 454175Sbde#ifndef _MACHINE_NPX_H_ 464175Sbde#define _MACHINE_NPX_H_ 474Srgrimes 48114349Speter/* Contents of each x87 floating point accumulator */ 4983047Sobrienstruct fpacc87 { 504Srgrimes u_char fp_bytes[10]; 514Srgrimes}; 524Srgrimes 53114349Speter/* Contents of each SSE extended accumulator */ 54114349Speterstruct xmmacc { 55114349Speter u_char xmm_bytes[16]; 564Srgrimes}; 574Srgrimes 5879609Speterstruct envxmm { 5979609Speter u_int16_t en_cw; /* control word (16bits) */ 6079609Speter u_int16_t en_sw; /* status word (16bits) */ 61114349Speter u_int8_t en_tw; /* tag word (8bits) */ 62114349Speter u_int8_t en_zero; 6379609Speter u_int16_t en_opcode; /* opcode last executed (11 bits ) */ 64114349Speter u_int64_t en_rip; /* floating point instruction pointer */ 65114349Speter u_int64_t en_rdp; /* floating operand pointer */ 6679609Speter u_int32_t en_mxcsr; /* SSE sontorol/status register */ 67114349Speter u_int32_t en_mxcsr_mask; /* valid bits in mxcsr */ 6879609Speter}; 6979609Speter 70114349Speterstruct savefpu { 7179609Speter struct envxmm sv_env; 7279609Speter struct { 7379609Speter struct fpacc87 fp_acc; 7479609Speter u_char fp_pad[6]; /* padding */ 7579609Speter } sv_fp[8]; 76114349Speter struct xmmacc sv_xmm[16]; 77114349Speter u_char sv_pad[96]; 78103834Speter} __aligned(16); 7979609Speter 804Srgrimes/* 8157890Scracauer * The hardware default control word for i387's and later coprocessors is 8257890Scracauer * 0x37F, giving: 834Srgrimes * 844Srgrimes * round to nearest 854Srgrimes * 64-bit precision 864Srgrimes * all exceptions masked. 874Srgrimes * 8857890Scracauer * We modify the affine mode bit and precision bits in this to give: 894Srgrimes * 904Srgrimes * affine mode for 287's (if they work at all) (1 in bitfield 1<<12) 914Srgrimes * 53-bit precision (2 in bitfield 3<<8) 924Srgrimes * 934Srgrimes * 64-bit precision often gives bad results with high level languages 944Srgrimes * because it makes the results of calculations depend on whether 954Srgrimes * intermediate values are stored in memory or in FPU registers. 964Srgrimes */ 9757890Scracauer#define __INITIAL_NPXCW__ 0x127F 98114859Speter#define __INITIAL_MXCSR__ 0x1F80 99114859Speter#define __INITIAL_MXCSR_MASK__ 0xFFBF 1004Srgrimes 10155205Speter#ifdef _KERNEL 10292761Salfredint npxdna(void); 103103408Sminivoid npxdrop(void); 10492761Salfredvoid npxexit(struct thread *td); 105103408Sminiint npxformat(void); 106114349Speterint npxgetregs(struct thread *td, struct savefpu *addr); 107103408Sminivoid npxinit(u_short control); 108114349Spetervoid npxsave(struct savefpu *addr); 109114349Spetervoid npxsetregs(struct thread *td, struct savefpu *addr); 11092761Salfredint npxtrap(void); 1114175Sbde#endif 1124175Sbde 1134175Sbde#endif /* !_MACHINE_NPX_H_ */ 114