1//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This class wraps target description classes used by the various code 11// generation TableGen backends. This makes it easier to access the data and 12// provides a single place that needs to check it for validity. All of these 13// classes abort on error conditions. 14// 15//===----------------------------------------------------------------------===// 16 17#include "CodeGenTarget.h" 18#include "CodeGenIntrinsics.h" 19#include "CodeGenSchedule.h" 20#include "llvm/ADT/STLExtras.h" 21#include "llvm/ADT/StringExtras.h" 22#include "llvm/Support/CommandLine.h" 23#include "llvm/TableGen/Error.h" 24#include "llvm/TableGen/Record.h" 25#include <algorithm> 26using namespace llvm; 27 28static cl::opt<unsigned> 29AsmParserNum("asmparsernum", cl::init(0), 30 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 31 32static cl::opt<unsigned> 33AsmWriterNum("asmwriternum", cl::init(0), 34 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 35 36/// getValueType - Return the MVT::SimpleValueType that the specified TableGen 37/// record corresponds to. 38MVT::SimpleValueType llvm::getValueType(Record *Rec) { 39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 40} 41 42std::string llvm::getName(MVT::SimpleValueType T) { 43 switch (T) { 44 case MVT::Other: return "UNKNOWN"; 45 case MVT::iPTR: return "TLI.getPointerTy()"; 46 case MVT::iPTRAny: return "TLI.getPointerTy()"; 47 default: return getEnumName(T); 48 } 49} 50 51std::string llvm::getEnumName(MVT::SimpleValueType T) { 52 switch (T) { 53 case MVT::Other: return "MVT::Other"; 54 case MVT::i1: return "MVT::i1"; 55 case MVT::i8: return "MVT::i8"; 56 case MVT::i16: return "MVT::i16"; 57 case MVT::i32: return "MVT::i32"; 58 case MVT::i64: return "MVT::i64"; 59 case MVT::i128: return "MVT::i128"; 60 case MVT::iAny: return "MVT::iAny"; 61 case MVT::fAny: return "MVT::fAny"; 62 case MVT::vAny: return "MVT::vAny"; 63 case MVT::f16: return "MVT::f16"; 64 case MVT::f32: return "MVT::f32"; 65 case MVT::f64: return "MVT::f64"; 66 case MVT::f80: return "MVT::f80"; 67 case MVT::f128: return "MVT::f128"; 68 case MVT::ppcf128: return "MVT::ppcf128"; 69 case MVT::x86mmx: return "MVT::x86mmx"; 70 case MVT::Glue: return "MVT::Glue"; 71 case MVT::isVoid: return "MVT::isVoid"; 72 case MVT::v2i1: return "MVT::v2i1"; 73 case MVT::v4i1: return "MVT::v4i1"; 74 case MVT::v8i1: return "MVT::v8i1"; 75 case MVT::v16i1: return "MVT::v16i1"; 76 case MVT::v32i1: return "MVT::v32i1"; 77 case MVT::v64i1: return "MVT::v64i1"; 78 case MVT::v1i8: return "MVT::v1i8"; 79 case MVT::v2i8: return "MVT::v2i8"; 80 case MVT::v4i8: return "MVT::v4i8"; 81 case MVT::v8i8: return "MVT::v8i8"; 82 case MVT::v16i8: return "MVT::v16i8"; 83 case MVT::v32i8: return "MVT::v32i8"; 84 case MVT::v64i8: return "MVT::v64i8"; 85 case MVT::v1i16: return "MVT::v1i16"; 86 case MVT::v2i16: return "MVT::v2i16"; 87 case MVT::v4i16: return "MVT::v4i16"; 88 case MVT::v8i16: return "MVT::v8i16"; 89 case MVT::v16i16: return "MVT::v16i16"; 90 case MVT::v32i16: return "MVT::v32i16"; 91 case MVT::v1i32: return "MVT::v1i32"; 92 case MVT::v2i32: return "MVT::v2i32"; 93 case MVT::v4i32: return "MVT::v4i32"; 94 case MVT::v8i32: return "MVT::v8i32"; 95 case MVT::v16i32: return "MVT::v16i32"; 96 case MVT::v1i64: return "MVT::v1i64"; 97 case MVT::v2i64: return "MVT::v2i64"; 98 case MVT::v4i64: return "MVT::v4i64"; 99 case MVT::v8i64: return "MVT::v8i64"; 100 case MVT::v16i64: return "MVT::v16i64"; 101 case MVT::v2f16: return "MVT::v2f16"; 102 case MVT::v4f16: return "MVT::v4f16"; 103 case MVT::v8f16: return "MVT::v8f16"; 104 case MVT::v1f32: return "MVT::v1f32"; 105 case MVT::v2f32: return "MVT::v2f32"; 106 case MVT::v4f32: return "MVT::v4f32"; 107 case MVT::v8f32: return "MVT::v8f32"; 108 case MVT::v16f32: return "MVT::v16f32"; 109 case MVT::v1f64: return "MVT::v1f64"; 110 case MVT::v2f64: return "MVT::v2f64"; 111 case MVT::v4f64: return "MVT::v4f64"; 112 case MVT::v8f64: return "MVT::v8f64"; 113 case MVT::Metadata: return "MVT::Metadata"; 114 case MVT::iPTR: return "MVT::iPTR"; 115 case MVT::iPTRAny: return "MVT::iPTRAny"; 116 case MVT::Untyped: return "MVT::Untyped"; 117 default: llvm_unreachable("ILLEGAL VALUE TYPE!"); 118 } 119} 120 121/// getQualifiedName - Return the name of the specified record, with a 122/// namespace qualifier if the record contains one. 123/// 124std::string llvm::getQualifiedName(const Record *R) { 125 std::string Namespace; 126 if (R->getValue("Namespace")) 127 Namespace = R->getValueAsString("Namespace"); 128 if (Namespace.empty()) return R->getName(); 129 return Namespace + "::" + R->getName(); 130} 131 132 133/// getTarget - Return the current instance of the Target class. 134/// 135CodeGenTarget::CodeGenTarget(RecordKeeper &records) 136 : Records(records), RegBank(0), SchedModels(0) { 137 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 138 if (Targets.size() == 0) 139 PrintFatalError("ERROR: No 'Target' subclasses defined!"); 140 if (Targets.size() != 1) 141 PrintFatalError("ERROR: Multiple subclasses of Target defined!"); 142 TargetRec = Targets[0]; 143} 144 145CodeGenTarget::~CodeGenTarget() { 146 delete RegBank; 147 delete SchedModels; 148} 149 150const std::string &CodeGenTarget::getName() const { 151 return TargetRec->getName(); 152} 153 154std::string CodeGenTarget::getInstNamespace() const { 155 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 156 // Make sure not to pick up "TargetOpcode" by accidentally getting 157 // the namespace off the PHI instruction or something. 158 if ((*i)->Namespace != "TargetOpcode") 159 return (*i)->Namespace; 160 } 161 162 return ""; 163} 164 165Record *CodeGenTarget::getInstructionSet() const { 166 return TargetRec->getValueAsDef("InstructionSet"); 167} 168 169 170/// getAsmParser - Return the AssemblyParser definition for this target. 171/// 172Record *CodeGenTarget::getAsmParser() const { 173 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 174 if (AsmParserNum >= LI.size()) 175 PrintFatalError("Target does not have an AsmParser #" + utostr(AsmParserNum) + "!"); 176 return LI[AsmParserNum]; 177} 178 179/// getAsmParserVariant - Return the AssmblyParserVariant definition for 180/// this target. 181/// 182Record *CodeGenTarget::getAsmParserVariant(unsigned i) const { 183 std::vector<Record*> LI = 184 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 185 if (i >= LI.size()) 186 PrintFatalError("Target does not have an AsmParserVariant #" + utostr(i) + "!"); 187 return LI[i]; 188} 189 190/// getAsmParserVariantCount - Return the AssmblyParserVariant definition 191/// available for this target. 192/// 193unsigned CodeGenTarget::getAsmParserVariantCount() const { 194 std::vector<Record*> LI = 195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 196 return LI.size(); 197} 198 199/// getAsmWriter - Return the AssemblyWriter definition for this target. 200/// 201Record *CodeGenTarget::getAsmWriter() const { 202 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 203 if (AsmWriterNum >= LI.size()) 204 PrintFatalError("Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"); 205 return LI[AsmWriterNum]; 206} 207 208CodeGenRegBank &CodeGenTarget::getRegBank() const { 209 if (!RegBank) 210 RegBank = new CodeGenRegBank(Records); 211 return *RegBank; 212} 213 214void CodeGenTarget::ReadRegAltNameIndices() const { 215 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); 216 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); 217} 218 219/// getRegisterByName - If there is a register with the specific AsmName, 220/// return it. 221const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 222 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 223 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 224 if (I == Regs.end()) 225 return 0; 226 return I->second; 227} 228 229std::vector<MVT::SimpleValueType> CodeGenTarget:: 230getRegisterVTs(Record *R) const { 231 const CodeGenRegister *Reg = getRegBank().getReg(R); 232 std::vector<MVT::SimpleValueType> Result; 233 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 234 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 235 const CodeGenRegisterClass &RC = *RCs[i]; 236 if (RC.contains(Reg)) { 237 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes(); 238 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 239 } 240 } 241 242 // Remove duplicates. 243 array_pod_sort(Result.begin(), Result.end()); 244 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 245 return Result; 246} 247 248 249void CodeGenTarget::ReadLegalValueTypes() const { 250 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 251 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 252 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri) 253 LegalValueTypes.push_back(RCs[i]->VTs[ri]); 254 255 // Remove duplicates. 256 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 257 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 258 LegalValueTypes.end()), 259 LegalValueTypes.end()); 260} 261 262CodeGenSchedModels &CodeGenTarget::getSchedModels() const { 263 if (!SchedModels) 264 SchedModels = new CodeGenSchedModels(Records, *this); 265 return *SchedModels; 266} 267 268void CodeGenTarget::ReadInstructions() const { 269 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 270 if (Insts.size() <= 2) 271 PrintFatalError("No 'Instruction' subclasses defined!"); 272 273 // Parse the instructions defined in the .td file. 274 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 275 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]); 276} 277 278static const CodeGenInstruction * 279GetInstByName(const char *Name, 280 const DenseMap<const Record*, CodeGenInstruction*> &Insts, 281 RecordKeeper &Records) { 282 const Record *Rec = Records.getDef(Name); 283 284 DenseMap<const Record*, CodeGenInstruction*>::const_iterator 285 I = Insts.find(Rec); 286 if (Rec == 0 || I == Insts.end()) 287 PrintFatalError(std::string("Could not find '") + Name + "' instruction!"); 288 return I->second; 289} 290 291namespace { 292/// SortInstByName - Sorting predicate to sort instructions by name. 293/// 294struct SortInstByName { 295 bool operator()(const CodeGenInstruction *Rec1, 296 const CodeGenInstruction *Rec2) const { 297 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 298 } 299}; 300} 301 302/// getInstructionsByEnumValue - Return all of the instructions defined by the 303/// target, ordered by their enum value. 304void CodeGenTarget::ComputeInstrsByEnum() const { 305 // The ordering here must match the ordering in TargetOpcodes.h. 306 static const char *const FixedInstrs[] = { 307 "PHI", 308 "INLINEASM", 309 "PROLOG_LABEL", 310 "EH_LABEL", 311 "GC_LABEL", 312 "KILL", 313 "EXTRACT_SUBREG", 314 "INSERT_SUBREG", 315 "IMPLICIT_DEF", 316 "SUBREG_TO_REG", 317 "COPY_TO_REGCLASS", 318 "DBG_VALUE", 319 "REG_SEQUENCE", 320 "COPY", 321 "BUNDLE", 322 "LIFETIME_START", 323 "LIFETIME_END", 324 "STACKMAP", 325 "PATCHPOINT", 326 0 327 }; 328 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions(); 329 for (const char *const *p = FixedInstrs; *p; ++p) { 330 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 331 assert(Instr && "Missing target independent instruction"); 332 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 333 InstrsByEnum.push_back(Instr); 334 } 335 unsigned EndOfPredefines = InstrsByEnum.size(); 336 337 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator 338 I = Insts.begin(), E = Insts.end(); I != E; ++I) { 339 const CodeGenInstruction *CGI = I->second; 340 if (CGI->Namespace != "TargetOpcode") 341 InstrsByEnum.push_back(CGI); 342 } 343 344 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 345 346 // All of the instructions are now in random order based on the map iteration. 347 // Sort them by name. 348 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(), 349 SortInstByName()); 350} 351 352 353/// isLittleEndianEncoding - Return whether this target encodes its instruction 354/// in little-endian format, i.e. bits laid out in the order [0..n] 355/// 356bool CodeGenTarget::isLittleEndianEncoding() const { 357 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 358} 359 360/// guessInstructionProperties - Return true if it's OK to guess instruction 361/// properties instead of raising an error. 362/// 363/// This is configurable as a temporary migration aid. It will eventually be 364/// permanently false. 365bool CodeGenTarget::guessInstructionProperties() const { 366 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); 367} 368 369//===----------------------------------------------------------------------===// 370// ComplexPattern implementation 371// 372ComplexPattern::ComplexPattern(Record *R) { 373 Ty = ::getValueType(R->getValueAsDef("Ty")); 374 NumOperands = R->getValueAsInt("NumOperands"); 375 SelectFunc = R->getValueAsString("SelectFunc"); 376 RootNodes = R->getValueAsListOfDefs("RootNodes"); 377 378 // Parse the properties. 379 Properties = 0; 380 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 381 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 382 if (PropList[i]->getName() == "SDNPHasChain") { 383 Properties |= 1 << SDNPHasChain; 384 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 385 Properties |= 1 << SDNPOptInGlue; 386 } else if (PropList[i]->getName() == "SDNPMayStore") { 387 Properties |= 1 << SDNPMayStore; 388 } else if (PropList[i]->getName() == "SDNPMayLoad") { 389 Properties |= 1 << SDNPMayLoad; 390 } else if (PropList[i]->getName() == "SDNPSideEffect") { 391 Properties |= 1 << SDNPSideEffect; 392 } else if (PropList[i]->getName() == "SDNPMemOperand") { 393 Properties |= 1 << SDNPMemOperand; 394 } else if (PropList[i]->getName() == "SDNPVariadic") { 395 Properties |= 1 << SDNPVariadic; 396 } else if (PropList[i]->getName() == "SDNPWantRoot") { 397 Properties |= 1 << SDNPWantRoot; 398 } else if (PropList[i]->getName() == "SDNPWantParent") { 399 Properties |= 1 << SDNPWantParent; 400 } else { 401 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 402 << "' on ComplexPattern '" << R->getName() << "'!\n"; 403 exit(1); 404 } 405} 406 407//===----------------------------------------------------------------------===// 408// CodeGenIntrinsic Implementation 409//===----------------------------------------------------------------------===// 410 411std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 412 bool TargetOnly) { 413 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 414 415 std::vector<CodeGenIntrinsic> Result; 416 417 for (unsigned i = 0, e = I.size(); i != e; ++i) { 418 bool isTarget = I[i]->getValueAsBit("isTarget"); 419 if (isTarget == TargetOnly) 420 Result.push_back(CodeGenIntrinsic(I[i])); 421 } 422 return Result; 423} 424 425CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 426 TheDef = R; 427 std::string DefName = R->getName(); 428 ModRef = ReadWriteMem; 429 isOverloaded = false; 430 isCommutative = false; 431 canThrow = false; 432 isNoReturn = false; 433 434 if (DefName.size() <= 4 || 435 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 436 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!"); 437 438 EnumName = std::string(DefName.begin()+4, DefName.end()); 439 440 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 441 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 442 443 TargetPrefix = R->getValueAsString("TargetPrefix"); 444 Name = R->getValueAsString("LLVMName"); 445 446 if (Name == "") { 447 // If an explicit name isn't specified, derive one from the DefName. 448 Name = "llvm."; 449 450 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 451 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 452 } else { 453 // Verify it starts with "llvm.". 454 if (Name.size() <= 5 || 455 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 456 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"); 457 } 458 459 // If TargetPrefix is specified, make sure that Name starts with 460 // "llvm.<targetprefix>.". 461 if (!TargetPrefix.empty()) { 462 if (Name.size() < 6+TargetPrefix.size() || 463 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 464 != (TargetPrefix + ".")) 465 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." + 466 TargetPrefix + ".'!"); 467 } 468 469 // Parse the list of return types. 470 std::vector<MVT::SimpleValueType> OverloadedVTs; 471 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 472 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 473 Record *TyEl = TypeList->getElementAsRecord(i); 474 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 475 MVT::SimpleValueType VT; 476 if (TyEl->isSubClassOf("LLVMMatchType")) { 477 unsigned MatchTy = TyEl->getValueAsInt("Number"); 478 assert(MatchTy < OverloadedVTs.size() && 479 "Invalid matching number!"); 480 VT = OverloadedVTs[MatchTy]; 481 // It only makes sense to use the extended and truncated vector element 482 // variants with iAny types; otherwise, if the intrinsic is not 483 // overloaded, all the types can be specified directly. 484 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 485 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 486 VT == MVT::iAny || VT == MVT::vAny) && 487 "Expected iAny or vAny type"); 488 } else { 489 VT = getValueType(TyEl->getValueAsDef("VT")); 490 } 491 if (EVT(VT).isOverloaded()) { 492 OverloadedVTs.push_back(VT); 493 isOverloaded = true; 494 } 495 496 // Reject invalid types. 497 if (VT == MVT::isVoid) 498 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 499 500 IS.RetVTs.push_back(VT); 501 IS.RetTypeDefs.push_back(TyEl); 502 } 503 504 // Parse the list of parameter types. 505 TypeList = R->getValueAsListInit("ParamTypes"); 506 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 507 Record *TyEl = TypeList->getElementAsRecord(i); 508 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 509 MVT::SimpleValueType VT; 510 if (TyEl->isSubClassOf("LLVMMatchType")) { 511 unsigned MatchTy = TyEl->getValueAsInt("Number"); 512 assert(MatchTy < OverloadedVTs.size() && 513 "Invalid matching number!"); 514 VT = OverloadedVTs[MatchTy]; 515 // It only makes sense to use the extended and truncated vector element 516 // variants with iAny types; otherwise, if the intrinsic is not 517 // overloaded, all the types can be specified directly. 518 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 519 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 520 VT == MVT::iAny || VT == MVT::vAny) && 521 "Expected iAny or vAny type"); 522 } else 523 VT = getValueType(TyEl->getValueAsDef("VT")); 524 525 if (EVT(VT).isOverloaded()) { 526 OverloadedVTs.push_back(VT); 527 isOverloaded = true; 528 } 529 530 // Reject invalid types. 531 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 532 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 533 534 IS.ParamVTs.push_back(VT); 535 IS.ParamTypeDefs.push_back(TyEl); 536 } 537 538 // Parse the intrinsic properties. 539 ListInit *PropList = R->getValueAsListInit("Properties"); 540 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 541 Record *Property = PropList->getElementAsRecord(i); 542 assert(Property->isSubClassOf("IntrinsicProperty") && 543 "Expected a property!"); 544 545 if (Property->getName() == "IntrNoMem") 546 ModRef = NoMem; 547 else if (Property->getName() == "IntrReadArgMem") 548 ModRef = ReadArgMem; 549 else if (Property->getName() == "IntrReadMem") 550 ModRef = ReadMem; 551 else if (Property->getName() == "IntrReadWriteArgMem") 552 ModRef = ReadWriteArgMem; 553 else if (Property->getName() == "Commutative") 554 isCommutative = true; 555 else if (Property->getName() == "Throws") 556 canThrow = true; 557 else if (Property->getName() == "IntrNoReturn") 558 isNoReturn = true; 559 else if (Property->isSubClassOf("NoCapture")) { 560 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 561 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 562 } else if (Property->isSubClassOf("ReadOnly")) { 563 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 564 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly)); 565 } else if (Property->isSubClassOf("ReadNone")) { 566 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 567 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone)); 568 } else 569 llvm_unreachable("Unknown property!"); 570 } 571 572 // Sort the argument attributes for later benefit. 573 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end()); 574} 575