1Pull in r200130 from upstream llvm trunk (by Jakob Stoklund Olesen):
2
3  Fix swapped CASA operands.
4
5  Found by SingleSource/UnitTests/AtomicOps.c
6
7Introduced here: http://svn.freebsd.org/changeset/base/262261
8
9Index: lib/Target/Sparc/SparcISelLowering.cpp
10===================================================================
11--- lib/Target/Sparc/SparcISelLowering.cpp
12+++ lib/Target/Sparc/SparcISelLowering.cpp
13@@ -2972,7 +2972,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr
14   // loop:
15   //   %val = phi %val0, %dest
16   //   %upd = op %val, %rs2
17-  //   %dest = cas %addr, %upd, %val
18+  //   %dest = cas %addr, %val, %upd
19   //   cmp %val, %dest
20   //   bne loop
21   // done:
22@@ -3031,7 +3031,7 @@ SparcTargetLowering::expandAtomicRMW(MachineInstr
23   }
24 
25   BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::CASXrr : SP::CASrr), DestReg)
26-    .addReg(AddrReg).addReg(UpdReg).addReg(ValReg)
27+    .addReg(AddrReg).addReg(ValReg).addReg(UpdReg)
28     .setMemRefs(MI->memoperands_begin(), MI->memoperands_end());
29   BuildMI(LoopMBB, DL, TII.get(SP::CMPrr)).addReg(ValReg).addReg(DestReg);
30   BuildMI(LoopMBB, DL, TII.get(is64Bit ? SP::BPXCC : SP::BCOND))
31Index: test/CodeGen/SPARC/atomics.ll
32===================================================================
33--- test/CodeGen/SPARC/atomics.ll
34+++ test/CodeGen/SPARC/atomics.ll
35@@ -64,8 +64,8 @@ entry:
36 
37 ; CHECK-LABEL: test_load_add_32
38 ; CHECK: membar
39-; CHECK: add
40-; CHECK: cas [%o0]
41+; CHECK: add [[V:%[gilo][0-7]]], %o1, [[U:%[gilo][0-7]]]
42+; CHECK: cas [%o0], [[V]], [[U]]
43 ; CHECK: membar
44 define zeroext i32 @test_load_add_32(i32* %p, i32 zeroext %v) {
45 entry:
46