PPCTargetMachine.cpp revision 194612
1//===-- PPCTargetMachine.cpp - Define TargetMachine for PowerPC -----------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Top-level implementation for the PowerPC target. 11// 12//===----------------------------------------------------------------------===// 13 14#include "PPC.h" 15#include "PPCTargetAsmInfo.h" 16#include "PPCTargetMachine.h" 17#include "llvm/Module.h" 18#include "llvm/PassManager.h" 19#include "llvm/Target/TargetMachineRegistry.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Support/raw_ostream.h" 22using namespace llvm; 23 24/// PowerPCTargetMachineModule - Note that this is used on hosts that 25/// cannot link in a library unless there are references into the 26/// library. In particular, it seems that it is not possible to get 27/// things to work on Win32 without this. Though it is unused, do not 28/// remove it. 29extern "C" int PowerPCTargetMachineModule; 30int PowerPCTargetMachineModule = 0; 31 32// Register the targets 33static RegisterTarget<PPC32TargetMachine> 34X("ppc32", "PowerPC 32"); 35static RegisterTarget<PPC64TargetMachine> 36Y("ppc64", "PowerPC 64"); 37 38// Force static initialization when called from llvm/InitializeAllTargets.h 39namespace llvm { 40 void InitializePowerPCTarget() { } 41} 42 43// No assembler printer by default 44PPCTargetMachine::AsmPrinterCtorFn PPCTargetMachine::AsmPrinterCtor = 0; 45 46const TargetAsmInfo *PPCTargetMachine::createTargetAsmInfo() const { 47 if (Subtarget.isDarwin()) 48 return new PPCDarwinTargetAsmInfo(*this); 49 else 50 return new PPCLinuxTargetAsmInfo(*this); 51} 52 53unsigned PPC32TargetMachine::getJITMatchQuality() { 54#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__) 55 if (sizeof(void*) == 4) 56 return 10; 57#endif 58 return 0; 59} 60unsigned PPC64TargetMachine::getJITMatchQuality() { 61#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER) || defined(__PPC__) 62 if (sizeof(void*) == 8) 63 return 10; 64#endif 65 return 0; 66} 67 68unsigned PPC32TargetMachine::getModuleMatchQuality(const Module &M) { 69 // We strongly match "powerpc-*". 70 std::string TT = M.getTargetTriple(); 71 if (TT.size() >= 8 && std::string(TT.begin(), TT.begin()+8) == "powerpc-") 72 return 20; 73 74 // If the target triple is something non-powerpc, we don't match. 75 if (!TT.empty()) return 0; 76 77 if (M.getEndianness() == Module::BigEndian && 78 M.getPointerSize() == Module::Pointer32) 79 return 10; // Weak match 80 else if (M.getEndianness() != Module::AnyEndianness || 81 M.getPointerSize() != Module::AnyPointerSize) 82 return 0; // Match for some other target 83 84 return getJITMatchQuality()/2; 85} 86 87unsigned PPC64TargetMachine::getModuleMatchQuality(const Module &M) { 88 // We strongly match "powerpc64-*". 89 std::string TT = M.getTargetTriple(); 90 if (TT.size() >= 10 && std::string(TT.begin(), TT.begin()+10) == "powerpc64-") 91 return 20; 92 93 if (M.getEndianness() == Module::BigEndian && 94 M.getPointerSize() == Module::Pointer64) 95 return 10; // Weak match 96 else if (M.getEndianness() != Module::AnyEndianness || 97 M.getPointerSize() != Module::AnyPointerSize) 98 return 0; // Match for some other target 99 100 return getJITMatchQuality()/2; 101} 102 103 104PPCTargetMachine::PPCTargetMachine(const Module &M, const std::string &FS, 105 bool is64Bit) 106 : Subtarget(*this, M, FS, is64Bit), 107 DataLayout(Subtarget.getTargetDataString()), InstrInfo(*this), 108 FrameInfo(*this, is64Bit), JITInfo(*this, is64Bit), TLInfo(*this), 109 InstrItins(Subtarget.getInstrItineraryData()), MachOWriterInfo(*this) { 110 111 if (getRelocationModel() == Reloc::Default) { 112 if (Subtarget.isDarwin()) 113 setRelocationModel(Reloc::DynamicNoPIC); 114 else 115 setRelocationModel(Reloc::Static); 116 } 117} 118 119/// Override this for PowerPC. Tail merging happily breaks up instruction issue 120/// groups, which typically degrades performance. 121bool PPCTargetMachine::getEnableTailMergeDefault() const { return false; } 122 123PPC32TargetMachine::PPC32TargetMachine(const Module &M, const std::string &FS) 124 : PPCTargetMachine(M, FS, false) { 125} 126 127 128PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS) 129 : PPCTargetMachine(M, FS, true) { 130} 131 132 133//===----------------------------------------------------------------------===// 134// Pass Pipeline Configuration 135//===----------------------------------------------------------------------===// 136 137bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, 138 CodeGenOpt::Level OptLevel) { 139 // Install an instruction selector. 140 PM.add(createPPCISelDag(*this)); 141 return false; 142} 143 144bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, 145 CodeGenOpt::Level OptLevel) { 146 // Must run branch selection immediately preceding the asm printer. 147 PM.add(createPPCBranchSelectionPass()); 148 return false; 149} 150 151bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, 152 CodeGenOpt::Level OptLevel, 153 bool Verbose, 154 raw_ostream &Out) { 155 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 156 if (AsmPrinterCtor) 157 PM.add(AsmPrinterCtor(Out, *this, OptLevel, Verbose)); 158 159 return false; 160} 161 162bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 163 CodeGenOpt::Level OptLevel, 164 bool DumpAsm, MachineCodeEmitter &MCE) { 165 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. 166 // FIXME: This should be moved to TargetJITInfo!! 167 if (Subtarget.isPPC64()) { 168 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many 169 // instructions to materialize arbitrary global variable + function + 170 // constant pool addresses. 171 setRelocationModel(Reloc::PIC_); 172 // Temporary workaround for the inability of PPC64 JIT to handle jump 173 // tables. 174 DisableJumpTables = true; 175 } else { 176 setRelocationModel(Reloc::Static); 177 } 178 179 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 180 // writing? 181 Subtarget.SetJITMode(); 182 183 // Machine code emitter pass for PowerPC. 184 PM.add(createPPCCodeEmitterPass(*this, MCE)); 185 if (DumpAsm) { 186 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 187 if (AsmPrinterCtor) 188 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 189 } 190 191 return false; 192} 193 194bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, 195 CodeGenOpt::Level OptLevel, 196 bool DumpAsm, JITCodeEmitter &JCE) { 197 // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64. 198 // FIXME: This should be moved to TargetJITInfo!! 199 if (Subtarget.isPPC64()) { 200 // We use PIC codegen in ppc64 mode, because otherwise we'd have to use many 201 // instructions to materialize arbitrary global variable + function + 202 // constant pool addresses. 203 setRelocationModel(Reloc::PIC_); 204 // Temporary workaround for the inability of PPC64 JIT to handle jump 205 // tables. 206 DisableJumpTables = true; 207 } else { 208 setRelocationModel(Reloc::Static); 209 } 210 211 // Inform the subtarget that we are in JIT mode. FIXME: does this break macho 212 // writing? 213 Subtarget.SetJITMode(); 214 215 // Machine code emitter pass for PowerPC. 216 PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 217 if (DumpAsm) { 218 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 219 if (AsmPrinterCtor) 220 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 221 } 222 223 return false; 224} 225 226bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 227 CodeGenOpt::Level OptLevel, 228 bool DumpAsm, 229 MachineCodeEmitter &MCE) { 230 // Machine code emitter pass for PowerPC. 231 PM.add(createPPCCodeEmitterPass(*this, MCE)); 232 if (DumpAsm) { 233 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 234 if (AsmPrinterCtor) 235 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 236 } 237 238 return false; 239} 240 241bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, 242 CodeGenOpt::Level OptLevel, 243 bool DumpAsm, 244 JITCodeEmitter &JCE) { 245 // Machine code emitter pass for PowerPC. 246 PM.add(createPPCJITCodeEmitterPass(*this, JCE)); 247 if (DumpAsm) { 248 assert(AsmPrinterCtor && "AsmPrinter was not linked in"); 249 if (AsmPrinterCtor) 250 PM.add(AsmPrinterCtor(errs(), *this, OptLevel, true)); 251 } 252 253 return false; 254} 255 256