1/* Definitions to target GDB to GNU/Linux on an ia64 architecture.
2   Copyright 1992, 1993, 2000 Free Software Foundation, Inc.
3
4   This file is part of GDB.
5
6   This program is free software; you can redistribute it and/or modify
7   it under the terms of the GNU General Public License as published by
8   the Free Software Foundation; either version 2 of the License, or
9   (at your option) any later version.
10
11   This program is distributed in the hope that it will be useful,
12   but WITHOUT ANY WARRANTY; without even the implied warranty of
13   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14   GNU General Public License for more details.
15
16   You should have received a copy of the GNU General Public License
17   along with this program; if not, write to the Free Software
18   Foundation, Inc., 59 Temple Place - Suite 330,
19   Boston, MA 02111-1307, USA.  */
20
21#ifndef TM_IA64_H
22#define TM_IA64_H
23
24#define GDB_MULTI_ARCH 1
25
26/* Register numbers of various important registers */
27
28/* General registers; there are 128 of these 64 bit wide registers.  The
29   first 32 are static and the last 96 are stacked. */
30#define IA64_GR0_REGNUM		0
31#define IA64_GR1_REGNUM		(IA64_GR0_REGNUM+1)
32#define IA64_GR2_REGNUM		(IA64_GR0_REGNUM+2)
33#define IA64_GR3_REGNUM		(IA64_GR0_REGNUM+3)
34#define IA64_GR4_REGNUM		(IA64_GR0_REGNUM+4)
35#define IA64_GR5_REGNUM		(IA64_GR0_REGNUM+5)
36#define IA64_GR6_REGNUM		(IA64_GR0_REGNUM+6)
37#define IA64_GR7_REGNUM		(IA64_GR0_REGNUM+7)
38#define IA64_GR8_REGNUM		(IA64_GR0_REGNUM+8)
39#define IA64_GR9_REGNUM		(IA64_GR0_REGNUM+9)
40#define IA64_GR10_REGNUM	(IA64_GR0_REGNUM+10)
41#define IA64_GR11_REGNUM	(IA64_GR0_REGNUM+11)
42#define IA64_GR12_REGNUM	(IA64_GR0_REGNUM+12)
43#define IA64_GR31_REGNUM	(IA64_GR0_REGNUM+31)
44#define IA64_GR32_REGNUM	(IA64_GR0_REGNUM+32)
45#define IA64_GR127_REGNUM	(IA64_GR0_REGNUM+127)
46
47/* Floating point registers; 128 82-bit wide registers */
48#define IA64_FR0_REGNUM		128
49#define IA64_FR1_REGNUM		(IA64_FR0_REGNUM+1)
50#define IA64_FR2_REGNUM		(IA64_FR0_REGNUM+2)
51#define IA64_FR8_REGNUM		(IA64_FR0_REGNUM+8)
52#define IA64_FR9_REGNUM		(IA64_FR0_REGNUM+9)
53#define IA64_FR10_REGNUM	(IA64_FR0_REGNUM+10)
54#define IA64_FR11_REGNUM	(IA64_FR0_REGNUM+11)
55#define IA64_FR12_REGNUM	(IA64_FR0_REGNUM+12)
56#define IA64_FR13_REGNUM	(IA64_FR0_REGNUM+13)
57#define IA64_FR14_REGNUM	(IA64_FR0_REGNUM+14)
58#define IA64_FR15_REGNUM	(IA64_FR0_REGNUM+15)
59#define IA64_FR16_REGNUM	(IA64_FR0_REGNUM+16)
60#define IA64_FR31_REGNUM	(IA64_FR0_REGNUM+31)
61#define IA64_FR32_REGNUM	(IA64_FR0_REGNUM+32)
62#define IA64_FR127_REGNUM	(IA64_FR0_REGNUM+127)
63
64/* Predicate registers; There are 64 of these one bit registers.
65   It'd be more convenient (implementation-wise) to use a single
66   64 bit word with all of these register in them.  Note that there's
67   also a IA64_PR_REGNUM below which contains all the bits and is used for
68   communicating the actual values to the target. */
69
70#define IA64_PR0_REGNUM		256
71#define IA64_PR1_REGNUM		(IA64_PR0_REGNUM+1)
72#define IA64_PR2_REGNUM		(IA64_PR0_REGNUM+2)
73#define IA64_PR3_REGNUM		(IA64_PR0_REGNUM+3)
74#define IA64_PR4_REGNUM		(IA64_PR0_REGNUM+4)
75#define IA64_PR5_REGNUM		(IA64_PR0_REGNUM+5)
76#define IA64_PR6_REGNUM		(IA64_PR0_REGNUM+6)
77#define IA64_PR7_REGNUM		(IA64_PR0_REGNUM+7)
78#define IA64_PR8_REGNUM		(IA64_PR0_REGNUM+8)
79#define IA64_PR9_REGNUM		(IA64_PR0_REGNUM+9)
80#define IA64_PR10_REGNUM	(IA64_PR0_REGNUM+10)
81#define IA64_PR11_REGNUM	(IA64_PR0_REGNUM+11)
82#define IA64_PR12_REGNUM	(IA64_PR0_REGNUM+12)
83#define IA64_PR13_REGNUM	(IA64_PR0_REGNUM+13)
84#define IA64_PR14_REGNUM	(IA64_PR0_REGNUM+14)
85#define IA64_PR15_REGNUM	(IA64_PR0_REGNUM+15)
86#define IA64_PR16_REGNUM	(IA64_PR0_REGNUM+16)
87#define IA64_PR17_REGNUM	(IA64_PR0_REGNUM+17)
88#define IA64_PR18_REGNUM	(IA64_PR0_REGNUM+18)
89#define IA64_PR19_REGNUM	(IA64_PR0_REGNUM+19)
90#define IA64_PR20_REGNUM	(IA64_PR0_REGNUM+20)
91#define IA64_PR21_REGNUM	(IA64_PR0_REGNUM+21)
92#define IA64_PR22_REGNUM	(IA64_PR0_REGNUM+22)
93#define IA64_PR23_REGNUM	(IA64_PR0_REGNUM+23)
94#define IA64_PR24_REGNUM	(IA64_PR0_REGNUM+24)
95#define IA64_PR25_REGNUM	(IA64_PR0_REGNUM+25)
96#define IA64_PR26_REGNUM	(IA64_PR0_REGNUM+26)
97#define IA64_PR27_REGNUM	(IA64_PR0_REGNUM+27)
98#define IA64_PR28_REGNUM	(IA64_PR0_REGNUM+28)
99#define IA64_PR29_REGNUM	(IA64_PR0_REGNUM+29)
100#define IA64_PR30_REGNUM	(IA64_PR0_REGNUM+30)
101#define IA64_PR31_REGNUM	(IA64_PR0_REGNUM+31)
102#define IA64_PR32_REGNUM	(IA64_PR0_REGNUM+32)
103#define IA64_PR33_REGNUM	(IA64_PR0_REGNUM+33)
104#define IA64_PR34_REGNUM	(IA64_PR0_REGNUM+34)
105#define IA64_PR35_REGNUM	(IA64_PR0_REGNUM+35)
106#define IA64_PR36_REGNUM	(IA64_PR0_REGNUM+36)
107#define IA64_PR37_REGNUM	(IA64_PR0_REGNUM+37)
108#define IA64_PR38_REGNUM	(IA64_PR0_REGNUM+38)
109#define IA64_PR39_REGNUM	(IA64_PR0_REGNUM+39)
110#define IA64_PR40_REGNUM	(IA64_PR0_REGNUM+40)
111#define IA64_PR41_REGNUM	(IA64_PR0_REGNUM+41)
112#define IA64_PR42_REGNUM	(IA64_PR0_REGNUM+42)
113#define IA64_PR43_REGNUM	(IA64_PR0_REGNUM+43)
114#define IA64_PR44_REGNUM	(IA64_PR0_REGNUM+44)
115#define IA64_PR45_REGNUM	(IA64_PR0_REGNUM+45)
116#define IA64_PR46_REGNUM	(IA64_PR0_REGNUM+46)
117#define IA64_PR47_REGNUM	(IA64_PR0_REGNUM+47)
118#define IA64_PR48_REGNUM	(IA64_PR0_REGNUM+48)
119#define IA64_PR49_REGNUM	(IA64_PR0_REGNUM+49)
120#define IA64_PR50_REGNUM	(IA64_PR0_REGNUM+50)
121#define IA64_PR51_REGNUM	(IA64_PR0_REGNUM+51)
122#define IA64_PR52_REGNUM	(IA64_PR0_REGNUM+52)
123#define IA64_PR53_REGNUM	(IA64_PR0_REGNUM+53)
124#define IA64_PR54_REGNUM	(IA64_PR0_REGNUM+54)
125#define IA64_PR55_REGNUM	(IA64_PR0_REGNUM+55)
126#define IA64_PR56_REGNUM	(IA64_PR0_REGNUM+56)
127#define IA64_PR57_REGNUM	(IA64_PR0_REGNUM+57)
128#define IA64_PR58_REGNUM	(IA64_PR0_REGNUM+58)
129#define IA64_PR59_REGNUM	(IA64_PR0_REGNUM+59)
130#define IA64_PR60_REGNUM	(IA64_PR0_REGNUM+60)
131#define IA64_PR61_REGNUM	(IA64_PR0_REGNUM+61)
132#define IA64_PR62_REGNUM	(IA64_PR0_REGNUM+62)
133#define IA64_PR63_REGNUM	(IA64_PR0_REGNUM+63)
134
135
136/* Branch registers: 8 64-bit registers for holding branch targets */
137#define IA64_BR0_REGNUM		320
138#define IA64_BR1_REGNUM		(IA64_BR0_REGNUM+1)
139#define IA64_BR2_REGNUM		(IA64_BR0_REGNUM+2)
140#define IA64_BR3_REGNUM		(IA64_BR0_REGNUM+3)
141#define IA64_BR4_REGNUM		(IA64_BR0_REGNUM+4)
142#define IA64_BR5_REGNUM		(IA64_BR0_REGNUM+5)
143#define IA64_BR6_REGNUM		(IA64_BR0_REGNUM+6)
144#define IA64_BR7_REGNUM		(IA64_BR0_REGNUM+7)
145
146/* Virtual frame pointer; this matches IA64_FRAME_POINTER_REGNUM in
147   gcc/config/ia64/ia64.h. */
148#define IA64_VFP_REGNUM		328
149
150/* Virtual return address pointer; this matches IA64_RETURN_ADDRESS_POINTER_REGNUM
151   in gcc/config/ia64/ia64.h. */
152#define IA64_VRAP_REGNUM	329
153
154/* Predicate registers: There are 64 of these 1-bit registers.  We
155   define a single register which is used to communicate these values
156   to/from the target.  We will somehow contrive to make it appear that
157   IA64_PR0_REGNUM thru IA64_PR63_REGNUM hold the actual values. */
158#define IA64_PR_REGNUM		330
159
160/* Instruction pointer: 64 bits wide */
161#define IA64_IP_REGNUM		331
162
163/* Process Status Register */
164#define IA64_PSR_REGNUM		332
165
166/* Current Frame Marker (Raw form may be the cr.ifs) */
167#define IA64_CFM_REGNUM		333
168
169/* Application registers; 128 64-bit wide registers possible, but some
170  of them are reserved */
171#define IA64_AR0_REGNUM		334
172#define IA64_KR0_REGNUM		(IA64_AR0_REGNUM+0)
173#define IA64_KR7_REGNUM		(IA64_KR0_REGNUM+7)
174
175#define IA64_RSC_REGNUM		(IA64_AR0_REGNUM+16)
176#define IA64_BSP_REGNUM		(IA64_AR0_REGNUM+17)
177#define IA64_BSPSTORE_REGNUM	(IA64_AR0_REGNUM+18)
178#define IA64_RNAT_REGNUM	(IA64_AR0_REGNUM+19)
179#define IA64_FCR_REGNUM		(IA64_AR0_REGNUM+21)
180#define IA64_EFLAG_REGNUM	(IA64_AR0_REGNUM+24)
181#define IA64_CSD_REGNUM		(IA64_AR0_REGNUM+25)
182#define IA64_SSD_REGNUM		(IA64_AR0_REGNUM+26)
183#define IA64_CFLG_REGNUM	(IA64_AR0_REGNUM+27)
184#define IA64_FSR_REGNUM		(IA64_AR0_REGNUM+28)
185#define IA64_FIR_REGNUM		(IA64_AR0_REGNUM+29)
186#define IA64_FDR_REGNUM		(IA64_AR0_REGNUM+30)
187#define IA64_CCV_REGNUM		(IA64_AR0_REGNUM+32)
188#define IA64_UNAT_REGNUM	(IA64_AR0_REGNUM+36)
189#define IA64_FPSR_REGNUM	(IA64_AR0_REGNUM+40)
190#define IA64_ITC_REGNUM		(IA64_AR0_REGNUM+44)
191#define IA64_PFS_REGNUM		(IA64_AR0_REGNUM+64)
192#define IA64_LC_REGNUM		(IA64_AR0_REGNUM+65)
193#define IA64_EC_REGNUM		(IA64_AR0_REGNUM+66)
194
195/* NAT (Not A Thing) Bits for the general registers; there are 128 of these */
196#define IA64_NAT0_REGNUM	462
197#define IA64_NAT31_REGNUM	(IA64_NAT0_REGNUM+31)
198#define IA64_NAT32_REGNUM	(IA64_NAT0_REGNUM+32)
199#define IA64_NAT127_REGNUM	(IA64_NAT0_REGNUM+127)
200
201#endif /* TM_IA64_H */
202