ChangeLog.gcc43 revision 260140
1259269Spfg2007-08-08 Andrew Haley <aph@redhat.com> (r128087) 2255252Spfg 3259269Spfg * config/arm/libunwind.S (UNWIND_WRAPPER _Unwind_Backtrace): New. 4259269Spfg * config/arm/unwind-arm.h (__gnu_Unwind_Backtrace): New. 5259269Spfg * config/arm/unwind-arm.c (__gnu_Unwind_Backtrace): New. 6259269Spfg 7259705Spfg2007-07-12 Geoffrey Keating <geoffk@apple.com> (r126588) 8259705Spfg 9259705Spfg * builtins.c (get_pointer_alignment): Honor DECL_ALIGN on a 10259705Spfg FUNCTION_DECL. 11259705Spfg * tree.c (build_decl_stat): Move code from here... 12259705Spfg (make_node_stat): ... to here. Don't uselessly clear DECL_USER_ALIGN. 13259705Spfg (expr_align): Honor DECL_ALIGN on a FUNCTION_DECL. Add comment 14259705Spfg about using DECL_ALIGN of LABEL_DECL and CONST_DECL. 15259705Spfg * tree.h (DECL_USER_ALIGN): Fix misplaced comment. 16259705Spfg * varasm.c (assemble_start_function): Use DECL_ALIGN instead of 17259705Spfg FUNCTION_BOUNDARY. 18259705Spfg 19259705Spfg2007-07-09 Geoffrey Keating <geoffk@apple.com> (r126529) 20259705Spfg 21259705Spfg PR 32617 22259705Spfg * c-common.c (c_alignof_expr): Look at DECL_ALIGN of 23259705Spfg FUNCTION_DECLs. 24259705Spfg (handle_aligned_attribute): Allow use on FUNCTION_DECLs. 25259705Spfg * varasm.c (assemble_start_function): Honor DECL_ALIGN 26259705Spfg for FUNCTION_DECLs. Don't use align_functions_log if 27259705Spfg DECL_USER_ALIGN. 28259705Spfg * print-tree.c (print_node): Print DECL_ALIGN and DECL_USER_ALIGN 29259705Spfg even for FUNCTION_DECLs. 30259705Spfg * c-decl.c (merge_decls): Propagate DECL_ALIGN even for 31259705Spfg FUNCTION_DECLs. 32259705Spfg * tree.h (DECL_ALIGN): Update for new location of 'align'. 33259705Spfg (DECL_FUNCTION_CODE): Update for new location and name of 34259705Spfg 'function_code'. 35259705Spfg (DECL_OFFSET_ALIGN): Update for new location of 'off_align'. 36259705Spfg (struct tree_decl_common): Move 'align' and 'off_align' out 37259705Spfg of union, ensure they're still on a 32-bit boundary. Remove 38259705Spfg other fields in union 'u1'. 39259705Spfg (struct tree_function_decl): Add field 'function_code' replacing 40259705Spfg 'u1.f' in tree_decl_common. 41259705Spfg * tree.c (build_decl_stat): Set initial value of DECL_ALIGN. 42259705Spfg * doc/extend.texi (Function Attributes): Add 'aligned' attribute. 43259705Spfg (Variable Attributes): Cross-reference 'aligned' attribute 44259705Spfg to Function Attributes. 45259705Spfg * flags.h (force_align_functions_log): Delete. 46259705Spfg * toplev.c (force_align_functions_log): Delete. 47259705Spfg 48260140Spfg2007-07-06 Josh Conner <jconner@apple.com> (r126422) 49260140Spfg 50260140Spfg PR middle-end/32602 51260140Spfg PR middle-end/32603 52260140Spfg * calls.c (store_one_arg): Handle arguments which are partially 53260140Spfg on the stack when detecting argument overlap. 54260140Spfg 55260140Spfg2007-07-03 Eric Christopher <echristo@apple.com> (r126278) 56260140Spfg 57260140Spfg * doc/cppopts.texi: Add conflicting option note to -dM. 58260140Spfg * doc/invoke.texi: Add note about possible conflicts with 59260140Spfg -E for -dCHARS and note that -dM will not produce 60260140Spfg any results if there is no machine dependent reorg. 61260140Spfg 62260075Spfg2007-06-28 Geoffrey Keating <geoffk@apple.com> (r126088) 63260075Spfg 64260075Spfg * doc/invoke.texi (C++ Dialect Options): Document 65260075Spfg fvisibility-ms-compat. 66260075Spfg * c.opt (fvisibility-ms-compat): New. 67260075Spfg 68259269Spfg2007-06-05 Joerg Wunsch <j.gnu@uriah.heep.sax.de> (r125346) 69259269Spfg 70255252Spfg PR preprocessor/23479 71255252Spfg * doc/extend.texi: Document the 0b-prefixed binary integer 72255252Spfg constant extension. 73255252Spfg 74259948Spfg2007-05-31 Daniel Berlin <dberlin@dberlin.org> (r125239) 75259948Spfg 76259948Spfg * c-typeck.c (build_indirect_ref): Include type in error message. 77259948Spfg (build_binary_op): Pass types to binary_op_error. 78259948Spfg * c-common.c (binary_op_error): Take two type arguments, print out 79259948Spfg types with error. 80259948Spfg * c-common.h (binary_op_error): Update prototype. 81259948Spfg 82259707Spfg2007-05-27 Eric Christopher <echristo@apple.com> (r125116) 83259707Spfg 84259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Update 85259707Spfg sp_offset depending on stack size. Save r12 depending 86259707Spfg on registers we're saving later. 87259707Spfg (rs6000_emit_epilogue): Update sp_offset depending only 88259707Spfg on stack size. 89259707Spfg 90259269Spfg2007-05-24 Richard Sandiford <rsandifo@nildram.co.uk> (r125037) 91259269Spfg 92259269Spfg * postreload-gcse.c (reg_changed_after_insn_p): New function. 93259269Spfg (oprs_unchanged_p): Use it to check all registers in a REG. 94259269Spfg (record_opr_changes): Look for clobbers in CALL_INSN_FUNCTION_USAGE. 95259269Spfg (reg_set_between_after_reload_p): Delete. 96259269Spfg (reg_used_between_after_reload_p): Likewise. 97259269Spfg (reg_set_or_used_since_bb_start): Likewise. 98259269Spfg (eliminate_partially_redundant_load): Use reg_changed_after_insn_p 99259269Spfg and reg_used_between_p instead of reg_set_or_used_since_bb_start. 100259269Spfg Use reg_set_between_p instead of reg_set_between_after_reload_p. 101259269Spfg * rtlanal.c (reg_set_p): Check whether REG overlaps 102259269Spfg regs_invalidated_by_call, rather than just checking the 103259269Spfg membership of REGNO (REG). 104259269Spfg 105259948Spfg2007-05-18 Geoffrey Keating <geoffk@apple.com> (r124839) 106259948Spfg 107259948Spfg * dwarf2out.c (print_die): Use '%ld' not '%lu' to print a 'long'. 108259948Spfg (output_die): Use 'unsigned long' with %x. 109259948Spfg * sched-vis.c (print_value): Use 'unsigned HOST_WIDE_INT' and 110259948Spfg HOST_WIDE_INT_PRINT_HEX to print HOST_WIDE_INT. 111259948Spfg * tree-dump.c (dump_pointer): Use 'unsigned long' for %lx. 112259948Spfg 113259707Spfg2007-05-16 Eric Christopher <echristo@apple.com> (r124763) 114259707Spfg 115259707Spfg * config/rs6000/rs6000.c (rs6000_emit_prologue): Move altivec register 116259707Spfg saving after stack push. Set sp_offset whenever we push. 117259707Spfg (rs6000_emit_epilogue): Move altivec register restore before stack push. 118259707Spfg 119259269Spfg2007-05-03 Ian Lance Taylor <iant@google.com> (r124381) 120259269Spfg 121259269Spfg * config/rs6000/rs6000.c (rs6000_override_options): Don't set 122259269Spfg MASK_PPC_GFXOPT for 8540 or 8548. 123259269Spfg 124252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124341) 125252080Spfg 126252080Spfg * doc/invoke.texi: Fix typo, 'AMD Family 10h core' instead of 127252080Spfg 'AMD Family 10 core'. 128252080Spfg 129221282Smm2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124339) 130221282Smm 131221282Smm * config/i386/i386.c (override_options): Accept k8-sse3, opteron-sse3 132221282Smm and athlon64-sse3 as improved versions of k8, opteron and athlon64 133221282Smm with SSE3 instruction set support. 134221282Smm * doc/invoke.texi: Likewise. 135221282Smm 136252080Spfg2007-05-01 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r124330) 137252080Spfg 138252080Spfg * config/i386/i386.c (override_options): Tuning 32-byte loop 139252080Spfg alignment for amdfam10 architecture. Increasing the max loop 140252080Spfg alignment to 24 bytes. 141252080Spfg 142259705Spfg2007-04-16 Lawrence Crowl <crowl@google.com> (r123909) 143259269Spfg 144259269Spfg * doc/invoke.texi (Debugging Options): Add documentation for the 145259269Spfg -femit-struct-debug options -femit-struct-debug-baseonly, 146259269Spfg -femit-struct-debug-reduced, and 147259269Spfg -femit-struct-debug-detailed[=...]. 148259269Spfg 149259269Spfg * c-opts.c (c_common_handle_option): Add 150259269Spfg OPT_femit_struct_debug_baseonly, OPT_femit_struct_debug_reduced, 151259269Spfg and OPT_femit_struct_debug_detailed_. 152259269Spfg * c.opt: Add specifications for 153259269Spfg -femit-struct-debug-baseonly, -femit-struct-debug-reduced, 154259269Spfg and -femit-struct-debug-detailed[=...]. 155259269Spfg * opts.c (set_struct_debug_option): Parse the 156259269Spfg -femit-struct-debug-... options. 157259269Spfg * opts.c (matches_main_base, main_input_basename, 158259269Spfg main_input_baselength, base_of_path, matches_main_base): Add 159259269Spfg variables and functions to compare header base name to compilation 160259269Spfg unit base name. 161259269Spfg * opts.c (should_emit_struct_debug): Add to determine to emit a 162259269Spfg structure based on the option. 163259269Spfg (dump_struct_debug) Also disabled function to debug this 164259269Spfg function. 165259269Spfg * opts.c (handle_options): Save the base name of the 166259269Spfg compilation unit. 167259269Spfg 168259269Spfg * langhooks-def.h (LANG_HOOKS_GENERIC_TYPE_P): Define. 169259269Spfg (LANG_HOOKS_FOR_TYPES_INITIALIZER): Add. 170259269Spfg This hook indicates if a type is generic. Set it by default 171259269Spfg to "never generic". 172259269Spfg * langhooks.h (struct lang_hooks_for_types): Add a new hook 173259269Spfg to determine if a struct type is generic or not. 174259269Spfg * cp/cp-tree.h (class_tmpl_impl_spec_p): Declare a C++ hook. 175259269Spfg * cp/tree.c (class_tmpl_impl_spec_p): Implement the C++ hook. 176259269Spfg * cp/cp-lang.c (LANG_HOOKS_GENERIC_TYPE_P): Override null C hook 177259269Spfg with live C++ hook. 178259269Spfg 179259269Spfg * flags.h (enum debug_info_usage): Add an enumeration to describe 180259269Spfg a program's use of a structure type. 181259269Spfg * dwarf2out.c (gen_struct_or_union_type_die): Add a new parameter 182259269Spfg to indicate the program's usage of the type. Filter structs based 183259269Spfg on the -femit-struct-debug-... specification. 184259269Spfg (gen_type_die): Split into two routines, gen_type_die and 185259269Spfg gen_type_die_with_usage. gen_type_die is now a wrapper 186259269Spfg that assumes direct usage. 187259269Spfg (gen_type_die_with_usage): Replace calls to gen_type_die 188259269Spfg with gen_type_die_with_usage adding the program usage of 189259269Spfg the referenced type. 190259269Spfg (dwarf2out_imported_module_or_decl): Suppress struct debug 191259269Spfg information using should_emit_struct_debug when appropriate. 192259269Spfg 193237678Spfg2007-04-12 Richard Guenther <rguenther@suse.de> (r123736) 194237678Spfg 195237678Spfg PR tree-optimization/24689 196237678Spfg PR tree-optimization/31307 197237678Spfg * fold-const.c (operand_equal_p): Compare INTEGER_CST array 198237678Spfg indices by value. 199237678Spfg * gimplify.c (canonicalize_addr_expr): To be consistent with 200237678Spfg gimplify_compound_lval only set operands two and three of 201237678Spfg ARRAY_REFs if they are not gimple_min_invariant. This makes 202237678Spfg it never at this place. 203237678Spfg * tree-ssa-ccp.c (maybe_fold_offset_to_array_ref): Likewise. 204237678Spfg 205221282Smm2007-04-07 H.J. Lu <hongjiu.lu@intel.com> (r123639) 206221282Smm 207221282Smm * config/i386/i386.c (ix86_handle_option): Handle SSSE3. 208221282Smm 209252080Spfg2007-03-28 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r123313) 210252080Spfg 211252080Spfg * config.gcc: Accept barcelona as a variant of amdfam10. 212252080Spfg * config/i386/i386.c (override_options): Likewise. 213252080Spfg * doc/invoke.texi: Likewise. 214252080Spfg 215259705Spfg2007-03-12 Seongbae Park <seongbae.park@gmail.com> (r122851) 216259269Spfg 217259269Spfg * c-decl.c (warn_variable_length_array): New function. 218259269Spfg Refactored from grokdeclarator to handle warn_vla 219259269Spfg and handle unnamed array case. 220259269Spfg (grokdeclarator): Refactored VLA warning case. 221259269Spfg * c.opt (Wvla): New flag. 222259269Spfg 223259269Spfg2007-03-11 Ian Lance Taylor <iant@google.com> (r122831 - partial) 224259269Spfg 225259269Spfg * tree-vrp.c (vrp_int_const_binop): Handle PLUS_EXPR and 226259269Spfg the *_DIV_EXPR codes correctly with overflow infinities. 227259269Spfg 228252080Spfg2007-02-09 Dwarakanath Rajagopal <dwarak.rajagopal@amd.com> (r121763) 229252080Spfg 230252080Spfg * config/i386/driver-i386.c: Turn on -mtune=native for AMDFAM10. 231252080Spfg (bit_SSE4a): New. 232252080Spfg 233221282Smm2007-02-08 Harsha Jagasia <harsha.jagasia@amd.com> (r121726) 234221282Smm 235221282Smm * config/i386/xmmintrin.h: Make inclusion of emmintrin.h 236221282Smm conditional to __SSE2__. 237221282Smm (Entries below should have been added to first ChangeLog 238221282Smm entry for amdfam10 dated 2007-02-05) 239221282Smm * config/i386/emmintrin.h: Generate #error if __SSE2__ is not 240221282Smm defined. 241221282Smm * config/i386/pmmintrin.h: Generate #error if __SSE3__ is not 242221282Smm defined. 243221282Smm * config/i386/tmmintrin.h: Generate #error if __SSSE3__ is not 244221282Smm defined. 245221282Smm 246221282Smm2007-02-07 Jakub Jelinek <jakub@redhat.com> (r121687) 247221282Smm 248221282Smm * config/i386/i386.c (override_options): Set PTA_SSSE3 for core2. 249221282Smm 250252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 251252080Spfg 252252080Spfg * config/i386/athlon.md (athlon_fldxf_k8, athlon_fld_k8, 253252080Spfg athlon_fstxf_k8, athlon_fst_k8, athlon_fist, athlon_fmov, 254252080Spfg athlon_fadd_load, athlon_fadd_load_k8, athlon_fadd, athlon_fmul, 255252080Spfg athlon_fmul_load, athlon_fmul_load_k8, athlon_fsgn, 256252080Spfg athlon_fdiv_load, athlon_fdiv_load_k8, athlon_fdiv_k8, 257252080Spfg athlon_fpspc_load, athlon_fpspc, athlon_fcmov_load, 258252080Spfg athlon_fcmov_load_k8, athlon_fcmov_k8, athlon_fcomi_load_k8, 259252080Spfg athlon_fcomi, athlon_fcom_load_k8, athlon_fcom): Added amdfam10. 260252080Spfg 261252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 262252080Spfg 263252080Spfg * config/i386/i386.md (x86_sahf_1, cmpfp_i_mixed, cmpfp_i_sse, 264252080Spfg cmpfp_i_i387, cmpfp_iu_mixed, cmpfp_iu_sse, cmpfp_iu_387, 265252080Spfg swapsi, swaphi_1, swapqi_1, swapdi_rex64, fix_truncsfdi_sse, 266252080Spfg fix_truncdfdi_sse, fix_truncsfsi_sse, fix_truncdfsi_sse, 267252080Spfg x86_fldcw_1, floatsisf2_mixed, floatsisf2_sse, floatdisf2_mixed, 268252080Spfg floatdisf2_sse, floatsidf2_mixed, floatsidf2_sse, 269252080Spfg floatdidf2_mixed, floatdidf2_sse, muldi3_1_rex64, mulsi3_1, 270252080Spfg mulsi3_1_zext, mulhi3_1, mulqi3_1, umulqihi3_1, mulqihi3_insn, 271252080Spfg umulditi3_insn, umulsidi3_insn, mulditi3_insn, mulsidi3_insn, 272252080Spfg umuldi3_highpart_rex64, umulsi3_highpart_insn, 273252080Spfg umulsi3_highpart_zext, smuldi3_highpart_rex64, 274252080Spfg smulsi3_highpart_insn, smulsi3_highpart_zext, x86_64_shld, 275252080Spfg x86_shld_1, x86_64_shrd, sqrtsf2_mixed, sqrtsf2_sse, 276252080Spfg sqrtsf2_i387, sqrtdf2_mixed, sqrtdf2_sse, sqrtdf2_i387, 277252080Spfg sqrtextendsfdf2_i387, sqrtxf2, sqrtextendsfxf2_i387, 278252080Spfg sqrtextenddfxf2_i387): Added amdfam10_decode. 279252080Spfg 280252080Spfg * config/i386/athlon.md (athlon_idirect_amdfam10, 281252080Spfg athlon_ivector_amdfam10, athlon_idirect_load_amdfam10, 282252080Spfg athlon_ivector_load_amdfam10, athlon_idirect_both_amdfam10, 283252080Spfg athlon_ivector_both_amdfam10, athlon_idirect_store_amdfam10, 284252080Spfg athlon_ivector_store_amdfam10): New define_insn_reservation. 285252080Spfg (athlon_idirect_loadmov, athlon_idirect_movstore): Added 286252080Spfg amdfam10. 287252080Spfg 288252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 289252080Spfg 290252080Spfg * config/i386/athlon.md (athlon_call_amdfam10, 291252080Spfg athlon_pop_amdfam10, athlon_lea_amdfam10): New 292252080Spfg define_insn_reservation. 293252080Spfg (athlon_branch, athlon_push, athlon_leave_k8, athlon_imul_k8, 294252080Spfg athlon_imul_k8_DI, athlon_imul_mem_k8, athlon_imul_mem_k8_DI, 295252080Spfg athlon_idiv, athlon_idiv_mem, athlon_str): Added amdfam10. 296252080Spfg 297252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 298252080Spfg 299252080Spfg * config/i386/athlon.md (athlon_sseld_amdfam10, 300252080Spfg athlon_mmxld_amdfam10, athlon_ssest_amdfam10, 301252080Spfg athlon_mmxssest_short_amdfam10): New define_insn_reservation. 302252080Spfg 303252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 304252080Spfg 305252080Spfg * config/i386/athlon.md (athlon_sseins_amdfam10): New 306252080Spfg define_insn_reservation. 307252080Spfg * config/i386/i386.md (sseins): Added sseins to define_attr type 308252080Spfg and define_attr unit. 309252080Spfg * config/i386/sse.md: Set type attribute to sseins for insertq 310252080Spfg and insertqi. 311252080Spfg 312252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 313252080Spfg 314252080Spfg * config/i386/athlon.md (sselog_load_amdfam10, sselog_amdfam10, 315252080Spfg ssecmpvector_load_amdfam10, ssecmpvector_amdfam10, 316252080Spfg ssecomi_load_amdfam10, ssecomi_amdfam10, 317252080Spfg sseaddvector_load_amdfam10, sseaddvector_amdfam10): New 318252080Spfg define_insn_reservation. 319252080Spfg (ssecmp_load_k8, ssecmp, sseadd_load_k8, seadd): Added amdfam10. 320252080Spfg 321252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 322252080Spfg 323252080Spfg * config/i386/athlon.md (cvtss2sd_load_amdfam10, 324252080Spfg cvtss2sd_amdfam10, cvtps2pd_load_amdfam10, cvtps2pd_amdfam10, 325252080Spfg cvtsi2sd_load_amdfam10, cvtsi2ss_load_amdfam10, 326252080Spfg cvtsi2sd_amdfam10, cvtsi2ss_amdfam10, cvtsd2ss_load_amdfam10, 327252080Spfg cvtsd2ss_amdfam10, cvtpd2ps_load_amdfam10, cvtpd2ps_amdfam10, 328252080Spfg cvtsX2si_load_amdfam10, cvtsX2si_amdfam10): New 329252080Spfg define_insn_reservation. 330252080Spfg 331252080Spfg * config/i386/sse.md (cvtsi2ss, cvtsi2ssq, cvtss2si, 332252080Spfg cvtss2siq, cvttss2si, cvttss2siq, cvtsi2sd, cvtsi2sdq, 333252080Spfg cvtsd2si, cvtsd2siq, cvttsd2si, cvttsd2siq, 334252080Spfg cvtpd2dq, cvttpd2dq, cvtsd2ss, cvtss2sd, 335252080Spfg cvtpd2ps, cvtps2pd): Added amdfam10_decode attribute. 336252080Spfg 337252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 338252080Spfg 339252080Spfg * config/i386/athlon.md (athlon_ssedivvector_amdfam10, 340252080Spfg athlon_ssedivvector_load_amdfam10, athlon_ssemulvector_amdfam10, 341252080Spfg athlon_ssemulvector_load_amdfam10): New define_insn_reservation. 342252080Spfg (athlon_ssediv, athlon_ssediv_load_k8, athlon_ssemul, 343252080Spfg athlon_ssemul_load_k8): Added amdfam10. 344252080Spfg 345252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 346252080Spfg 347252080Spfg * config/i386/i386.h (TARGET_SSE_UNALIGNED_MOVE_OPTIMAL): New macro. 348252080Spfg (x86_sse_unaligned_move_optimal): New variable. 349252080Spfg 350252080Spfg * config/i386/i386.c (x86_sse_unaligned_move_optimal): Enable for 351252080Spfg m_AMDFAM10. 352252080Spfg (ix86_expand_vector_move_misalign): Add code to generate movupd/movups 353252080Spfg for unaligned vector SSE double/single precision loads for AMDFAM10. 354252080Spfg 355252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 356252080Spfg 357252080Spfg * config/i386/i386.h (TARGET_AMDFAM10): New macro. 358252080Spfg (TARGET_CPU_CPP_BUILTINS): Add code for amdfam10. 359252080Spfg Define TARGET_CPU_DEFAULT_amdfam10. 360252080Spfg (TARGET_CPU_DEFAULT_NAMES): Add amdfam10. 361252080Spfg (processor_type): Add PROCESSOR_AMDFAM10. 362252080Spfg 363252080Spfg * config/i386/i386.md: Add amdfam10 as a new cpu attribute to match 364252080Spfg processor_type in config/i386/i386.h. 365252080Spfg Enable imul peepholes for TARGET_AMDFAM10. 366252080Spfg 367252080Spfg * config.gcc: Add support for --with-cpu option for amdfam10. 368252080Spfg 369252080Spfg * config/i386/i386.c (amdfam10_cost): New variable. 370252080Spfg (m_AMDFAM10): New macro. 371252080Spfg (m_ATHLON_K8_AMDFAM10): New macro. 372252080Spfg (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 373252080Spfg x86_cmove, x86_3dnow_a, x86_deep_branch, x86_use_simode_fiop, 374252080Spfg x86_promote_QImode, x86_integer_DFmode_moves, 375252080Spfg x86_partial_reg_dependency, x86_memory_mismatch_stall, 376252080Spfg x86_accumulate_outgoing_args, x86_arch_always_fancy_math_387, 377252080Spfg x86_sse_partial_reg_dependency, x86_sse_typeless_stores, 378252080Spfg x86_use_ffreep, x86_use_incdec, x86_four_jump_limit, 379252080Spfg x86_schedule, x86_use_bt, x86_cmpxchg16b, x86_pad_returns): 380252080Spfg Enable/disable for amdfam10. 381252080Spfg (override_options): Add amdfam10_cost to processor_target_table. 382252080Spfg Set up PROCESSOR_AMDFAM10 for amdfam10 entry in 383252080Spfg processor_alias_table. 384252080Spfg (ix86_issue_rate): Add PROCESSOR_AMDFAM10. 385252080Spfg (ix86_adjust_cost): Add code for amdfam10. 386252080Spfg 387252080Spfg2007-02-05 Harsha Jagasia <harsha.jagasia@amd.com> (r121625) 388252080Spfg 389252080Spfg * config/i386/i386.opt: Add new Advanced Bit Manipulation (-mabm) 390252080Spfg instruction set feature flag. Add new (-mpopcnt) flag for popcnt 391252080Spfg instruction. Add new SSE4A (-msse4a) instruction set feature flag. 392252080Spfg * config/i386/i386.h: Add builtin definition for SSE4A. 393252080Spfg * config/i386/i386.md: Add support for ABM instructions 394252080Spfg (popcnt and lzcnt). 395252080Spfg * config/i386/sse.md: Add support for SSE4A instructions 396252080Spfg (movntss, movntsd, extrq, insertq). 397252080Spfg * config/i386/i386.c: Add support for ABM and SSE4A builtins. 398252080Spfg Add -march=amdfam10 flag. 399252080Spfg * config/i386/ammintrin.h: Add support for SSE4A intrinsics. 400252080Spfg * doc/invoke.texi: Add documentation on flags for sse4a, abm, popcnt 401252080Spfg and amdfam10. 402252080Spfg * doc/extend.texi: Add documentation for SSE4A builtins. 403252080Spfg 404252080Spfg2007-01-24 Jakub Jelinek <jakub@redhat.com> (r121140) 405252080Spfg 406252080Spfg * config/i386/i386.h (x86_cmpxchg16b): Remove const. 407252080Spfg (TARGET_CMPXCHG16B): Define to x86_cmpxchg16b. 408252080Spfg * config/i386/i386.c (x86_cmpxchg16b): Remove const. 409252080Spfg (override_options): Add PTA_CX16 flag. Set x86_cmpxchg16b 410252080Spfg for CPUs that have PTA_CX16 set. 411252080Spfg 412260140Spfg2007-01-18 Josh Conner <jconner@apple.com> (r120902) 413260140Spfg 414260140Spfg PR target/30485 415260140Spfg * config/rs6000/rs6000.c (rs6000_emit_vector_compare): Add 416260140Spfg support for UNLE, UNLT, UNGE, and UNGT. 417260140Spfg 418221282Smm2007-01-17 Eric Christopher <echristo@apple.com> (r120846) 419221282Smm 420221282Smm * config.gcc: Support core2 processor. 421221282Smm 422259948Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 423259948Spfg 424259948Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 425259948Spfg always convertible if they have the same size, but not otherwise. 426259948Spfg 427260075Spfg2007-01-11 Joseph Myers <joseph@codesourcery.com> (r120688) 428260075Spfg 429260075Spfg * c-common.c (vector_types_convertible_p): Treat opaque types as 430260075Spfg always convertible if they have the same size, but not otherwise. 431260075Spfg 432259948Spfg2007-01-08 Geoffrey Keating <geoffk@apple.com> (r120611) 433259948Spfg 434259948Spfg * target.h (struct gcc_target): New field library_rtti_comdat. 435259948Spfg * target-def.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): New. 436259948Spfg (TARGET_CXX): Add TARGET_CXX_LIBRARY_RTTI_COMDAT. 437259948Spfg * doc/tm.texi (C++ ABI): Document TARGET_CXX_LIBRARY_RTTI_COMDAT. 438259948Spfg * config/darwin.h (TARGET_CXX_LIBRARY_RTTI_COMDAT): Define. 439259948Spfg 440260075Spfg2007-01-08 Mark Shinwell <shinwell@codesourcery.com> (r120572) 441260075Spfg 442260075Spfg * c.opt: Add -flax-vector-conversions. 443260075Spfg * c-typeck.c (convert_for_assignment): Pass flag to 444260075Spfg vector_types_convertible_p to allow emission of note. 445260075Spfg (digest_init): Likewise. 446260075Spfg * c-opts.c: Handle -flax-vector-conversions. 447260075Spfg * c-common.c (flag_lax_vector_conversions): New. 448260075Spfg (vector_types_convertible_p): Unless -flax-vector conversions 449260075Spfg has been passed, disallow conversions between vectors with 450260075Spfg differing numbers of subparts and/or element types. If such 451260075Spfg a conversion is disallowed, possibly emit a note on the first 452260075Spfg occasion only to inform the user of -flax-vector-conversions. 453260075Spfg The new last argument specifies this. 454260075Spfg * c-common.h (flag_lax_vector_conversions): New. 455260075Spfg (vector_types_convertible_p): Add extra argument. 456260075Spfg * config/i386/i386.c (ix86_init_mmx_sse_builtins): Use 457260075Spfg char_type_node for V*QI type vectors. 458260075Spfg * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): 459260075Spfg Update to satisfy new typechecking rules. 460260075Spfg * config/rs6000/altivec.h (vec_cmple): Use vec_cmpge, for both 461260075Spfg C and C++ variants. 462260075Spfg * doc/invoke.texi (C Dialect Options): Document 463260075Spfg -flax-vector-conversions. 464260075Spfg 465259705Spfg2007-01-05 Manuel Lopez-Ibanez <manu@gcc.gnu.org> (r120505) 466259585Spfg 467259585Spfg PR c/19978 468259585Spfg * tree.h (TREE_OVERFLOW_P): New. 469259585Spfg * c-typeck.c (parser_build_unary_op): Warn only if result 470259585Spfg overflowed and operands did not. 471259585Spfg (parser_build_binary_op): Likewise. 472259585Spfg (convert_for_assignment): Remove redundant overflow_warning. 473259585Spfg * c-common.c (overflow_warning): Don't check or set TREE_OVERFLOW. 474259585Spfg 475259269Spfg2006-12-13 Ian Lance Taylor <iant@google.com> (r119855) 476259269Spfg 477259269Spfg PR c++/19564 478259269Spfg PR c++/19756 479259269Spfg * c-typeck.c (parser_build_binary_op): Move parentheses warnings 480259269Spfg to warn_about_parentheses in c-common.c. 481259269Spfg * c-common.c (warn_about_parentheses): New function. 482259269Spfg * c-common.h (warn_about_parentheses): Declare. 483259269Spfg * doc/invoke.texi (Warning Options): Update -Wparentheses 484259269Spfg description. 485259269Spfg 486221282Smm2006-12-02 H.J. Lu <hongjiu.lu@intel.com> (r119454 - partial) 487221282Smm 488221282Smm PR target/30040 489221282Smm * config/i386/driver-i386.c (bit_SSSE3): New. 490221282Smm 491252080Spfg2006-11-27 Uros Bizjak <ubizjak@gmail.com> (r119260) 492252080Spfg 493252080Spfg * config/i386/i386.c (x86_ext_80387_constants): Add m_K8, m_CORE2 494252080Spfg and m_GENERIC64. 495252080Spfg 496221282Smm2006-11-18 Vladimir Makarov <vmakarov@redhat.com> (r118973) 497221282Smm 498221282Smm * doc/invoke.texi (core2): Add item. 499221282Smm 500221282Smm * config/i386/i386.h (TARGET_CORE2, TARGET_CPU_DEFAULT_core2): New 501221282Smm macros. 502221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for core2. 503221282Smm (TARGET_CPU_DEFAULT_generic): Change value. 504221282Smm (TARGET_CPU_DEFAULT_NAMES): Add core2. 505221282Smm (processor_type): Add new constant PROCESSOR_CORE2. 506221282Smm 507221282Smm * config/i386/i386.md (cpu): Add core2. 508221282Smm 509221282Smm * config/i386/i386.c (core2_cost): New initialized variable. 510221282Smm (m_CORE2): New macro. 511221282Smm (x86_use_leave, x86_push_memory, x86_movx, x86_unroll_strlen, 512221282Smm x86_deep_branch, x86_partial_reg_stall, x86_use_simode_fiop, 513221282Smm x86_use_cltd, x86_promote_QImode, x86_sub_esp_4, x86_sub_esp_8, 514221282Smm x86_add_esp_4, x86_add_esp_8, x86_integer_DFmode_moves, 515221282Smm x86_partial_reg_dependency, x86_memory_mismatch_stall, 516221282Smm x86_accumulate_outgoing_args, x86_prologue_using_move, 517221282Smm x86_epilogue_using_move, x86_arch_always_fancy_math_387, 518221282Smm x86_sse_partial_reg_dependency, x86_rep_movl_optimal, 519221282Smm x86_use_incdec, x86_four_jump_limit, x86_schedule, 520221282Smm x86_pad_returns): Add m_CORE2. 521221282Smm (override_options): Add entries for Core2. 522221282Smm (ix86_issue_rate): Add case for Core2. 523221282Smm 524259269Spfg2006-10-31 Geoffrey Keating <geoffk@apple.com> (r118356) 525259269Spfg 526259269Spfg * c-decl.c (grokdeclarator): Don't set DECL_EXTERNAL on 527259269Spfg inline static functions in c99 mode. 528259269Spfg 529259269Spfg PR 16622 530259269Spfg * doc/extend.texi (Inline): Update. 531259269Spfg * c-tree.h (struct language_function): Remove field 'extern_inline'. 532259269Spfg * c-decl.c (current_extern_inline): Delete. 533259269Spfg (pop_scope): Adjust test for an undefined nested function. 534259269Spfg Add warning about undeclared inline function. 535259269Spfg (diagnose_mismatched_decls): Update comments. Disallow overriding 536259269Spfg of inline functions in a translation unit in C99. Allow inline 537259269Spfg declarations in C99 at any time. 538259269Spfg (merge_decls): Boolize variables. Handle C99 'extern inline' 539259269Spfg semantics. 540259269Spfg (grokdeclarator): Set DECL_EXTERNAL here for functions. Handle 541259269Spfg C99 inline semantics. 542259269Spfg (start_function): Don't clear current_extern_inline. Don't set 543259269Spfg DECL_EXTERNAL. 544259269Spfg (c_push_function_context): Don't push current_extern_inline. 545259269Spfg (c_pop_function_context): Don't restore current_extern_inline. 546259269Spfg 547259269Spfg PR 11377 548259269Spfg * c-typeck.c (build_external_ref): Warn about static variables 549259269Spfg used in extern inline functions. 550259269Spfg * c-decl.c (start_decl): Warn about static variables declared 551259269Spfg in extern inline functions. 552259269Spfg 553221282Smm2006-10-27 Vladimir Makarov <vmakarov@redhat.com> (r118090) 554221282Smm 555221282Smm * config/i386/i386.h (TARGET_GEODE): 556221282Smm (TARGET_CPU_CPP_BUILTINS): Add code for geode. 557221282Smm (TARGET_CPU_DEFAULT_geode): New macro. 558221282Smm (TARGET_CPU_DEFAULT_k6, TARGET_CPU_DEFAULT_k6_2, 559221282Smm TARGET_CPU_DEFAULT_k6_3, TARGET_CPU_DEFAULT_athlon, 560221282Smm TARGET_CPU_DEFAULT_athlon_sse, TARGET_CPU_DEFAULT_k8, 561221282Smm TARGET_CPU_DEFAULT_pentium_m, TARGET_CPU_DEFAULT_prescott, 562221282Smm TARGET_CPU_DEFAULT_nocona, TARGET_CPU_DEFAULT_generic): Increase 563221282Smm the macro values. 564221282Smm (TARGET_CPU_DEFAULT_NAMES): Add geode. 565221282Smm (processor_type): Add PROCESSOR_GEODE. 566221282Smm 567221282Smm * config/i386/i386.md: Include geode.md. 568221282Smm (cpu): Add geode. 569221282Smm 570221282Smm * config/i386/i386.c (geode_cost): New initialized global 571221282Smm variable. 572221282Smm (m_GEODE, m_K6_GEODE): New macros. 573221282Smm (x86_use_leave, x86_push_memory, x86_deep_branch, x86_use_sahf, 574221282Smm x86_use_himode_fiop, x86_promote_QImode, x86_add_esp_4, 575221282Smm x86_add_esp_8, x86_rep_movl_optimal, x86_ext_80387_constants, 576221282Smm x86_schedule): Use m_K6_GEODE instead of m_K6. 577221282Smm (x86_movx, x86_cmove): Set up m_GEODE. 578221282Smm (x86_integer_DFmode_moves): Clear m_GEODE. 579221282Smm (processor_target_table): Add entry for geode. 580221282Smm (processor_alias_table): Ditto. 581221282Smm 582221282Smm * config/i386/geode.md: New file. 583221282Smm 584221282Smm * doc/invoke.texi: Add entry about geode processor. 585221282Smm 586237678Spfg2006-10-24 Richard Guenther <rguenther@suse.de> (r118001) 587229554Spfg 588229554Spfg PR middle-end/28796 589229554Spfg * builtins.c (fold_builtin_classify): Use HONOR_INFINITIES 590229554Spfg and HONOR_NANS instead of MODE_HAS_INFINITIES and MODE_HAS_NANS 591229554Spfg for deciding optimizations in consistency with fold-const.c 592229554Spfg (fold_builtin_unordered_cmp): Likewise. 593229554Spfg 594221282Smm2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117958) 595221282Smm 596221282Smm * config.gcc (i[34567]86-*-*): Add tmmintrin.h to extra_headers. 597221282Smm (x86_64-*-*): Likewise. 598221282Smm 599221282Smm * config/i386/i386.c (pta_flags): Add PTA_SSSE3. 600221282Smm (override_options): Check SSSE3. 601221282Smm (ix86_builtins): Add IX86_BUILTIN_PHADDW, IX86_BUILTIN_PHADDD, 602221282Smm IX86_BUILTIN_PHADDSW, IX86_BUILTIN_PHSUBW, IX86_BUILTIN_PHSUBD, 603221282Smm IX86_BUILTIN_PHSUBSW, IX86_BUILTIN_PMADDUBSW, 604221282Smm IX86_BUILTIN_PMULHRSW, IX86_BUILTIN_PSHUFB, 605221282Smm IX86_BUILTIN_PSIGNB, IX86_BUILTIN_PSIGNW, IX86_BUILTIN_PSIGND, 606221282Smm IX86_BUILTIN_PALIGNR, IX86_BUILTIN_PABSB, IX86_BUILTIN_PABSW, 607221282Smm IX86_BUILTIN_PABSD, IX86_BUILTIN_PHADDW128, 608221282Smm IX86_BUILTIN_PHADDD128, IX86_BUILTIN_PHADDSW128, 609221282Smm IX86_BUILTIN_PHSUBW128, IX86_BUILTIN_PHSUBD128, 610221282Smm IX86_BUILTIN_PHSUBSW128, IX86_BUILTIN_PMADDUBSW128, 611221282Smm IX86_BUILTIN_PMULHRSW128, IX86_BUILTIN_PSHUFB128, 612221282Smm IX86_BUILTIN_PSIGNB128, IX86_BUILTIN_PSIGNW128, 613221282Smm IX86_BUILTIN_PSIGND128, IX86_BUILTIN_PALIGNR128, 614221282Smm IX86_BUILTIN_PABSB128, IX86_BUILTIN_PABSW128 and 615221282Smm IX86_BUILTIN_PABSD128. 616221282Smm (bdesc_2arg): Add SSSE3. 617221282Smm (bdesc_1arg): Likewise. 618221282Smm (ix86_init_mmx_sse_builtins): Support SSSE3. 619221282Smm (ix86_expand_builtin): Likewise. 620221282Smm * config/i386/i386.h (TARGET_CPU_CPP_BUILTINS): Likewise. 621221282Smm 622221282Smm * config/i386/i386.md (UNSPEC_PSHUFB): New. 623221282Smm (UNSPEC_PSIGN): Likewise. 624221282Smm (UNSPEC_PALIGNR): Likewise. 625221282Smm Include mmx.md before sse.md. 626221282Smm 627221282Smm * config/i386/i386.opt: Add -mssse3. 628221282Smm 629221282Smm * config/i386/sse.md (ssse3_phaddwv8hi3): New pattern for SSSE3. 630221282Smm (ssse3_phaddwv4hi3): Likewise. 631221282Smm (ssse3_phadddv4si3): Likewise. 632221282Smm (ssse3_phadddv2si3): Likewise. 633221282Smm (ssse3_phaddswv8hi3): Likewise. 634221282Smm (ssse3_phaddswv4hi3): Likewise. 635221282Smm (ssse3_phsubwv8hi3): Likewise. 636221282Smm (ssse3_phsubwv4hi3): Likewise. 637221282Smm (ssse3_phsubdv4si3): Likewise. 638221282Smm (ssse3_phsubdv2si3): Likewise. 639221282Smm (ssse3_phsubswv8hi3): Likewise. 640221282Smm (ssse3_phsubswv4hi3): Likewise. 641221282Smm (ssse3_pmaddubswv8hi3): Likewise. 642221282Smm (ssse3_pmaddubswv4hi3): Likewise. 643221282Smm (ssse3_pmulhrswv8hi3): Likewise. 644221282Smm (ssse3_pmulhrswv4hi3): Likewise. 645221282Smm (ssse3_pshufbv16qi3): Likewise. 646221282Smm (ssse3_pshufbv8qi3): Likewise. 647221282Smm (ssse3_psign<mode>3): Likewise. 648221282Smm (ssse3_psign<mode>3): Likewise. 649221282Smm (ssse3_palignrti): Likewise. 650221282Smm (ssse3_palignrdi): Likewise. 651221282Smm (abs<mode>2): Likewise. 652221282Smm (abs<mode>2): Likewise. 653221282Smm 654221282Smm * config/i386/tmmintrin.h: New file. 655221282Smm 656221282Smm * doc/extend.texi: Document SSSE3 built-in functions. 657221282Smm 658221282Smm * doc/invoke.texi: Document -mssse3/-mno-ssse3 switches. 659234023Spfg 660252080Spfg2006-10-22 H.J. Lu <hongjiu.lu@intel.com> (r117959) 661250676Spfg 662250676Spfg * config/i386/tmmintrin.h: Remove the duplicated content. 663250676Spfg 664237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117932) 665234023Spfg 666237678Spfg PR tree-optimization/3511 667237678Spfg * tree-ssa-pre.c (phi_translate): Fold CALL_EXPRs that 668237678Spfg got new invariant arguments during PHI translation. 669237678Spfg 670237678Spfg2006-10-21 Richard Guenther <rguenther@suse.de> (r117929) 671237678Spfg 672234023Spfg * builtins.c (fold_builtin_classify): Fix typo. 673234023Spfg 674