1/* Print i386 instructions for GDB, the GNU debugger. 2 Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 3 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc. 4 5 This file is part of GDB. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 2 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 20 21/* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu) 22 July 1988 23 modified by John Hassey (hassey@dg-rtp.dg.com) 24 x86-64 support added by Jan Hubicka (jh@suse.cz) 25 VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */ 26 27/* The main tables describing the instructions is essentially a copy 28 of the "Opcode Map" chapter (Appendix A) of the Intel 80386 29 Programmers Manual. Usually, there is a capital letter, followed 30 by a small letter. The capital letter tell the addressing mode, 31 and the small letter tells about the operand size. Refer to 32 the Intel manual for details. */ 33 34#include "dis-asm.h" 35#include "sysdep.h" 36#include "opintl.h" 37#include "opcode/i386.h" 38 39#include <setjmp.h> 40 41static int fetch_data (struct disassemble_info *, bfd_byte *); 42static void ckprefix (void); 43static const char *prefix_name (int, int); 44static int print_insn (bfd_vma, disassemble_info *); 45static void dofloat (int); 46static void OP_ST (int, int); 47static void OP_STi (int, int); 48static int putop (const char *, int); 49static void oappend (const char *); 50static void append_seg (void); 51static void OP_indirE (int, int); 52static void print_operand_value (char *, int, bfd_vma); 53static void print_displacement (char *, bfd_vma); 54static void OP_E (int, int); 55static void OP_G (int, int); 56static bfd_vma get64 (void); 57static bfd_signed_vma get32 (void); 58static bfd_signed_vma get32s (void); 59static int get16 (void); 60static void set_op (bfd_vma, int); 61static void OP_REG (int, int); 62static void OP_IMREG (int, int); 63static void OP_I (int, int); 64static void OP_I64 (int, int); 65static void OP_sI (int, int); 66static void OP_J (int, int); 67static void OP_SEG (int, int); 68static void OP_DIR (int, int); 69static void OP_OFF (int, int); 70static void OP_OFF64 (int, int); 71static void ptr_reg (int, int); 72static void OP_ESreg (int, int); 73static void OP_DSreg (int, int); 74static void OP_C (int, int); 75static void OP_D (int, int); 76static void OP_T (int, int); 77static void OP_R (int, int); 78static void OP_MMX (int, int); 79static void OP_XMM (int, int); 80static void OP_EM (int, int); 81static void OP_EX (int, int); 82static void OP_EMC (int,int); 83static void OP_MXC (int,int); 84static void OP_MS (int, int); 85static void OP_XS (int, int); 86static void OP_M (int, int); 87static void OP_VMX (int, int); 88static void OP_0fae (int, int); 89static void OP_0f07 (int, int); 90static void NOP_Fixup1 (int, int); 91static void NOP_Fixup2 (int, int); 92static void OP_3DNowSuffix (int, int); 93static void OP_SIMD_Suffix (int, int); 94static void SIMD_Fixup (int, int); 95static void PNI_Fixup (int, int); 96static void XCR_Fixup (int, int); 97static void SVME_Fixup (int, int); 98static void INVLPG_Fixup (int, int); 99static void BadOp (void); 100static void VMX_Fixup (int, int); 101static void REP_Fixup (int, int); 102static void CMPXCHG8B_Fixup (int, int); 103static void XMM_Fixup (int, int); 104static void CRC32_Fixup (int, int); 105 106struct dis_private { 107 /* Points to first byte not fetched. */ 108 bfd_byte *max_fetched; 109 bfd_byte the_buffer[MAX_MNEM_SIZE]; 110 bfd_vma insn_start; 111 int orig_sizeflag; 112 jmp_buf bailout; 113}; 114 115enum address_mode 116{ 117 mode_16bit, 118 mode_32bit, 119 mode_64bit 120}; 121 122enum address_mode address_mode; 123 124/* Flags for the prefixes for the current instruction. See below. */ 125static int prefixes; 126 127/* REX prefix the current instruction. See below. */ 128static int rex; 129/* Bits of REX we've already used. */ 130static int rex_used; 131/* Mark parts used in the REX prefix. When we are testing for 132 empty prefix (for 8bit register REX extension), just mask it 133 out. Otherwise test for REX bit is excuse for existence of REX 134 only in case value is nonzero. */ 135#define USED_REX(value) \ 136 { \ 137 if (value) \ 138 { \ 139 if ((rex & value)) \ 140 rex_used |= (value) | REX_OPCODE; \ 141 } \ 142 else \ 143 rex_used |= REX_OPCODE; \ 144 } 145 146/* Flags for prefixes which we somehow handled when printing the 147 current instruction. */ 148static int used_prefixes; 149 150/* Flags stored in PREFIXES. */ 151#define PREFIX_REPZ 1 152#define PREFIX_REPNZ 2 153#define PREFIX_LOCK 4 154#define PREFIX_CS 8 155#define PREFIX_SS 0x10 156#define PREFIX_DS 0x20 157#define PREFIX_ES 0x40 158#define PREFIX_FS 0x80 159#define PREFIX_GS 0x100 160#define PREFIX_DATA 0x200 161#define PREFIX_ADDR 0x400 162#define PREFIX_FWAIT 0x800 163 164/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 165 to ADDR (exclusive) are valid. Returns 1 for success, longjmps 166 on error. */ 167#define FETCH_DATA(info, addr) \ 168 ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \ 169 ? 1 : fetch_data ((info), (addr))) 170 171static int 172fetch_data (struct disassemble_info *info, bfd_byte *addr) 173{ 174 int status; 175 struct dis_private *priv = (struct dis_private *) info->private_data; 176 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 177 178 if (addr <= priv->the_buffer + MAX_MNEM_SIZE) 179 status = (*info->read_memory_func) (start, 180 priv->max_fetched, 181 addr - priv->max_fetched, 182 info); 183 else 184 status = -1; 185 if (status != 0) 186 { 187 /* If we did manage to read at least one byte, then 188 print_insn_i386 will do something sensible. Otherwise, print 189 an error. We do that here because this is where we know 190 STATUS. */ 191 if (priv->max_fetched == priv->the_buffer) 192 (*info->memory_error_func) (status, start, info); 193 longjmp (priv->bailout, 1); 194 } 195 else 196 priv->max_fetched = addr; 197 return 1; 198} 199 200#define XX { NULL, 0 } 201 202#define Eb { OP_E, b_mode } 203#define Ev { OP_E, v_mode } 204#define Ed { OP_E, d_mode } 205#define Edq { OP_E, dq_mode } 206#define Edqw { OP_E, dqw_mode } 207#define Edqb { OP_E, dqb_mode } 208#define Edqd { OP_E, dqd_mode } 209#define indirEv { OP_indirE, stack_v_mode } 210#define indirEp { OP_indirE, f_mode } 211#define stackEv { OP_E, stack_v_mode } 212#define Em { OP_E, m_mode } 213#define Ew { OP_E, w_mode } 214#define M { OP_M, 0 } /* lea, lgdt, etc. */ 215#define Ma { OP_M, v_mode } 216#define Mo { OP_M, o_mode } 217#define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ 218#define Mq { OP_M, q_mode } 219#define Gb { OP_G, b_mode } 220#define Gv { OP_G, v_mode } 221#define Gd { OP_G, d_mode } 222#define Gdq { OP_G, dq_mode } 223#define Gm { OP_G, m_mode } 224#define Gw { OP_G, w_mode } 225#define Rd { OP_R, d_mode } 226#define Rm { OP_R, m_mode } 227#define Ib { OP_I, b_mode } 228#define sIb { OP_sI, b_mode } /* sign extened byte */ 229#define Iv { OP_I, v_mode } 230#define Iq { OP_I, q_mode } 231#define Iv64 { OP_I64, v_mode } 232#define Iw { OP_I, w_mode } 233#define I1 { OP_I, const_1_mode } 234#define Jb { OP_J, b_mode } 235#define Jv { OP_J, v_mode } 236#define Cm { OP_C, m_mode } 237#define Dm { OP_D, m_mode } 238#define Td { OP_T, d_mode } 239 240#define RMeAX { OP_REG, eAX_reg } 241#define RMeBX { OP_REG, eBX_reg } 242#define RMeCX { OP_REG, eCX_reg } 243#define RMeDX { OP_REG, eDX_reg } 244#define RMeSP { OP_REG, eSP_reg } 245#define RMeBP { OP_REG, eBP_reg } 246#define RMeSI { OP_REG, eSI_reg } 247#define RMeDI { OP_REG, eDI_reg } 248#define RMrAX { OP_REG, rAX_reg } 249#define RMrBX { OP_REG, rBX_reg } 250#define RMrCX { OP_REG, rCX_reg } 251#define RMrDX { OP_REG, rDX_reg } 252#define RMrSP { OP_REG, rSP_reg } 253#define RMrBP { OP_REG, rBP_reg } 254#define RMrSI { OP_REG, rSI_reg } 255#define RMrDI { OP_REG, rDI_reg } 256#define RMAL { OP_REG, al_reg } 257#define RMAL { OP_REG, al_reg } 258#define RMCL { OP_REG, cl_reg } 259#define RMDL { OP_REG, dl_reg } 260#define RMBL { OP_REG, bl_reg } 261#define RMAH { OP_REG, ah_reg } 262#define RMCH { OP_REG, ch_reg } 263#define RMDH { OP_REG, dh_reg } 264#define RMBH { OP_REG, bh_reg } 265#define RMAX { OP_REG, ax_reg } 266#define RMDX { OP_REG, dx_reg } 267 268#define eAX { OP_IMREG, eAX_reg } 269#define eBX { OP_IMREG, eBX_reg } 270#define eCX { OP_IMREG, eCX_reg } 271#define eDX { OP_IMREG, eDX_reg } 272#define eSP { OP_IMREG, eSP_reg } 273#define eBP { OP_IMREG, eBP_reg } 274#define eSI { OP_IMREG, eSI_reg } 275#define eDI { OP_IMREG, eDI_reg } 276#define AL { OP_IMREG, al_reg } 277#define CL { OP_IMREG, cl_reg } 278#define DL { OP_IMREG, dl_reg } 279#define BL { OP_IMREG, bl_reg } 280#define AH { OP_IMREG, ah_reg } 281#define CH { OP_IMREG, ch_reg } 282#define DH { OP_IMREG, dh_reg } 283#define BH { OP_IMREG, bh_reg } 284#define AX { OP_IMREG, ax_reg } 285#define DX { OP_IMREG, dx_reg } 286#define zAX { OP_IMREG, z_mode_ax_reg } 287#define indirDX { OP_IMREG, indir_dx_reg } 288 289#define Sw { OP_SEG, w_mode } 290#define Sv { OP_SEG, v_mode } 291#define Ap { OP_DIR, 0 } 292#define Ob { OP_OFF64, b_mode } 293#define Ov { OP_OFF64, v_mode } 294#define Xb { OP_DSreg, eSI_reg } 295#define Xv { OP_DSreg, eSI_reg } 296#define Xz { OP_DSreg, eSI_reg } 297#define Yb { OP_ESreg, eDI_reg } 298#define Yv { OP_ESreg, eDI_reg } 299#define DSBX { OP_DSreg, eBX_reg } 300 301#define es { OP_REG, es_reg } 302#define ss { OP_REG, ss_reg } 303#define cs { OP_REG, cs_reg } 304#define ds { OP_REG, ds_reg } 305#define fs { OP_REG, fs_reg } 306#define gs { OP_REG, gs_reg } 307 308#define MX { OP_MMX, 0 } 309#define XM { OP_XMM, 0 } 310#define EM { OP_EM, v_mode } 311#define EMd { OP_EM, d_mode } 312#define EMq { OP_EM, q_mode } 313#define EXd { OP_EX, d_mode } 314#define EXq { OP_EX, q_mode } 315#define EXx { OP_EX, x_mode } 316#define MS { OP_MS, v_mode } 317#define XS { OP_XS, v_mode } 318#define EMC { OP_EMC, v_mode } 319#define MXC { OP_MXC, 0 } 320#define VM { OP_VMX, q_mode } 321#define OPSUF { OP_3DNowSuffix, 0 } 322#define OPSIMD { OP_SIMD_Suffix, 0 } 323#define XMM0 { XMM_Fixup, 0 } 324 325/* Used handle "rep" prefix for string instructions. */ 326#define Xbr { REP_Fixup, eSI_reg } 327#define Xvr { REP_Fixup, eSI_reg } 328#define Ybr { REP_Fixup, eDI_reg } 329#define Yvr { REP_Fixup, eDI_reg } 330#define Yzr { REP_Fixup, eDI_reg } 331#define indirDXr { REP_Fixup, indir_dx_reg } 332#define ALr { REP_Fixup, al_reg } 333#define eAXr { REP_Fixup, eAX_reg } 334 335#define cond_jump_flag { NULL, cond_jump_mode } 336#define loop_jcxz_flag { NULL, loop_jcxz_mode } 337 338/* bits in sizeflag */ 339#define SUFFIX_ALWAYS 4 340#define AFLAG 2 341#define DFLAG 1 342 343#define b_mode 1 /* byte operand */ 344#define v_mode 2 /* operand size depends on prefixes */ 345#define w_mode 3 /* word operand */ 346#define d_mode 4 /* double word operand */ 347#define q_mode 5 /* quad word operand */ 348#define t_mode 6 /* ten-byte operand */ 349#define x_mode 7 /* 16-byte XMM operand */ 350#define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */ 351#define cond_jump_mode 9 352#define loop_jcxz_mode 10 353#define dq_mode 11 /* operand size depends on REX prefixes. */ 354#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */ 355#define f_mode 13 /* 4- or 6-byte pointer operand */ 356#define const_1_mode 14 357#define stack_v_mode 15 /* v_mode for stack-related opcodes. */ 358#define z_mode 16 /* non-quad operand size depends on prefixes */ 359#define o_mode 17 /* 16-byte operand */ 360#define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */ 361#define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */ 362 363#define es_reg 100 364#define cs_reg 101 365#define ss_reg 102 366#define ds_reg 103 367#define fs_reg 104 368#define gs_reg 105 369 370#define eAX_reg 108 371#define eCX_reg 109 372#define eDX_reg 110 373#define eBX_reg 111 374#define eSP_reg 112 375#define eBP_reg 113 376#define eSI_reg 114 377#define eDI_reg 115 378 379#define al_reg 116 380#define cl_reg 117 381#define dl_reg 118 382#define bl_reg 119 383#define ah_reg 120 384#define ch_reg 121 385#define dh_reg 122 386#define bh_reg 123 387 388#define ax_reg 124 389#define cx_reg 125 390#define dx_reg 126 391#define bx_reg 127 392#define sp_reg 128 393#define bp_reg 129 394#define si_reg 130 395#define di_reg 131 396 397#define rAX_reg 132 398#define rCX_reg 133 399#define rDX_reg 134 400#define rBX_reg 135 401#define rSP_reg 136 402#define rBP_reg 137 403#define rSI_reg 138 404#define rDI_reg 139 405 406#define z_mode_ax_reg 149 407#define indir_dx_reg 150 408 409#define FLOATCODE 1 410#define USE_GROUPS 2 411#define USE_PREFIX_USER_TABLE 3 412#define X86_64_SPECIAL 4 413#define IS_3BYTE_OPCODE 5 414 415#define FLOAT NULL, { { NULL, FLOATCODE } } 416 417#define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } } 418#define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } } 419#define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } } 420#define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } } 421#define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } } 422#define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } } 423#define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } } 424#define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } } 425#define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } } 426#define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } } 427#define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } } 428#define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } } 429#define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } } 430#define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } } 431#define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } } 432#define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } } 433#define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } } 434#define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } } 435#define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } } 436#define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } } 437#define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } } 438#define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } } 439#define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } } 440#define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } } 441#define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } } 442#define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } } 443#define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } } 444#define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } } 445 446#define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } } 447#define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } } 448#define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } } 449#define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } } 450#define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } } 451#define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } } 452#define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } } 453#define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } } 454#define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } } 455#define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } } 456#define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } } 457#define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } } 458#define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } } 459#define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } } 460#define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } } 461#define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } } 462#define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } } 463#define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } } 464#define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } } 465#define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } } 466#define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } } 467#define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } } 468#define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } } 469#define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } } 470#define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } } 471#define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } } 472#define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } } 473#define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } } 474#define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } } 475#define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } } 476#define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } } 477#define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } } 478#define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } } 479#define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } } 480#define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } } 481#define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } } 482#define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } } 483#define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } } 484#define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } } 485#define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } } 486#define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } } 487#define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } } 488#define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } } 489#define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } } 490#define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } } 491#define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } } 492#define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } } 493#define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } } 494#define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } } 495#define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } } 496#define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } } 497#define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } } 498#define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } } 499#define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } } 500#define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } } 501#define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } } 502#define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } } 503#define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } } 504#define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } } 505#define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } } 506#define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } } 507#define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } } 508#define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } } 509#define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } } 510#define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } } 511#define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } } 512#define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } } 513#define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } } 514#define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } } 515#define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } } 516#define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } } 517#define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } } 518#define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } } 519#define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } } 520#define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } } 521#define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } } 522#define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } } 523#define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } } 524#define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } } 525#define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } } 526#define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } } 527#define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } } 528#define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } } 529#define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } } 530#define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } } 531#define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } } 532#define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } } 533#define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } } 534#define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } } 535#define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } } 536#define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } } 537#define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } } 538#define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } } 539#define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } } 540#define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } } 541#define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } } 542#define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } } 543#define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } } 544#define PREGRP98 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 98 } } 545#define PREGRP99 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 99 } } 546#define PREGRP100 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 100 } } 547#define PREGRP101 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 101 } } 548#define PREGRP102 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 102 } } 549#define PREGRP103 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 103 } } 550#define PREGRP104 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 104 } } 551#define PREGRP105 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 105 } } 552#define PREGRP106 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 106 } } 553#define PREGRP107 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 107 } } 554 555 556#define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } } 557#define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } } 558#define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } } 559#define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } } 560 561#define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } } 562#define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } } 563 564typedef void (*op_rtn) (int bytemode, int sizeflag); 565 566struct dis386 { 567 const char *name; 568 struct 569 { 570 op_rtn rtn; 571 int bytemode; 572 } op[MAX_OPERANDS]; 573}; 574 575/* Upper case letters in the instruction names here are macros. 576 'A' => print 'b' if no register operands or suffix_always is true 577 'B' => print 'b' if suffix_always is true 578 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand 579 . size prefix 580 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if 581 . suffix_always is true 582 'E' => print 'e' if 32-bit form of jcxz 583 'F' => print 'w' or 'l' depending on address size prefix (loop insns) 584 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns) 585 'H' => print ",pt" or ",pn" branch hint 586 'I' => honor following macro letter even in Intel mode (implemented only 587 . for some of the macro letters) 588 'J' => print 'l' 589 'K' => print 'd' or 'q' if rex prefix is present. 590 'L' => print 'l' if suffix_always is true 591 'N' => print 'n' if instruction has no wait "prefix" 592 'O' => print 'd' or 'o' (or 'q' in Intel mode) 593 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix, 594 . or suffix_always is true. print 'q' if rex prefix is present. 595 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always 596 . is true 597 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode) 598 'S' => print 'w', 'l' or 'q' if suffix_always is true 599 'T' => print 'q' in 64bit mode and behave as 'P' otherwise 600 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise 601 'V' => print 'q' in 64bit mode and behave as 'S' otherwise 602 'W' => print 'b', 'w' or 'l' ('d' in Intel mode) 603 'X' => print 's', 'd' depending on data16 prefix (for XMM) 604 'Y' => 'q' if instruction has an REX 64bit overwrite prefix 605 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise 606 607 Many of the above letters print nothing in Intel mode. See "putop" 608 for the details. 609 610 Braces '{' and '}', and vertical bars '|', indicate alternative 611 mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel 612 modes. In cases where there are only two alternatives, the X86_64 613 instruction is reserved, and "(bad)" is printed. 614*/ 615 616static const struct dis386 dis386[] = { 617 /* 00 */ 618 { "addB", { Eb, Gb } }, 619 { "addS", { Ev, Gv } }, 620 { "addB", { Gb, Eb } }, 621 { "addS", { Gv, Ev } }, 622 { "addB", { AL, Ib } }, 623 { "addS", { eAX, Iv } }, 624 { "push{T|}", { es } }, 625 { "pop{T|}", { es } }, 626 /* 08 */ 627 { "orB", { Eb, Gb } }, 628 { "orS", { Ev, Gv } }, 629 { "orB", { Gb, Eb } }, 630 { "orS", { Gv, Ev } }, 631 { "orB", { AL, Ib } }, 632 { "orS", { eAX, Iv } }, 633 { "push{T|}", { cs } }, 634 { "(bad)", { XX } }, /* 0x0f extended opcode escape */ 635 /* 10 */ 636 { "adcB", { Eb, Gb } }, 637 { "adcS", { Ev, Gv } }, 638 { "adcB", { Gb, Eb } }, 639 { "adcS", { Gv, Ev } }, 640 { "adcB", { AL, Ib } }, 641 { "adcS", { eAX, Iv } }, 642 { "push{T|}", { ss } }, 643 { "pop{T|}", { ss } }, 644 /* 18 */ 645 { "sbbB", { Eb, Gb } }, 646 { "sbbS", { Ev, Gv } }, 647 { "sbbB", { Gb, Eb } }, 648 { "sbbS", { Gv, Ev } }, 649 { "sbbB", { AL, Ib } }, 650 { "sbbS", { eAX, Iv } }, 651 { "push{T|}", { ds } }, 652 { "pop{T|}", { ds } }, 653 /* 20 */ 654 { "andB", { Eb, Gb } }, 655 { "andS", { Ev, Gv } }, 656 { "andB", { Gb, Eb } }, 657 { "andS", { Gv, Ev } }, 658 { "andB", { AL, Ib } }, 659 { "andS", { eAX, Iv } }, 660 { "(bad)", { XX } }, /* SEG ES prefix */ 661 { "daa{|}", { XX } }, 662 /* 28 */ 663 { "subB", { Eb, Gb } }, 664 { "subS", { Ev, Gv } }, 665 { "subB", { Gb, Eb } }, 666 { "subS", { Gv, Ev } }, 667 { "subB", { AL, Ib } }, 668 { "subS", { eAX, Iv } }, 669 { "(bad)", { XX } }, /* SEG CS prefix */ 670 { "das{|}", { XX } }, 671 /* 30 */ 672 { "xorB", { Eb, Gb } }, 673 { "xorS", { Ev, Gv } }, 674 { "xorB", { Gb, Eb } }, 675 { "xorS", { Gv, Ev } }, 676 { "xorB", { AL, Ib } }, 677 { "xorS", { eAX, Iv } }, 678 { "(bad)", { XX } }, /* SEG SS prefix */ 679 { "aaa{|}", { XX } }, 680 /* 38 */ 681 { "cmpB", { Eb, Gb } }, 682 { "cmpS", { Ev, Gv } }, 683 { "cmpB", { Gb, Eb } }, 684 { "cmpS", { Gv, Ev } }, 685 { "cmpB", { AL, Ib } }, 686 { "cmpS", { eAX, Iv } }, 687 { "(bad)", { XX } }, /* SEG DS prefix */ 688 { "aas{|}", { XX } }, 689 /* 40 */ 690 { "inc{S|}", { RMeAX } }, 691 { "inc{S|}", { RMeCX } }, 692 { "inc{S|}", { RMeDX } }, 693 { "inc{S|}", { RMeBX } }, 694 { "inc{S|}", { RMeSP } }, 695 { "inc{S|}", { RMeBP } }, 696 { "inc{S|}", { RMeSI } }, 697 { "inc{S|}", { RMeDI } }, 698 /* 48 */ 699 { "dec{S|}", { RMeAX } }, 700 { "dec{S|}", { RMeCX } }, 701 { "dec{S|}", { RMeDX } }, 702 { "dec{S|}", { RMeBX } }, 703 { "dec{S|}", { RMeSP } }, 704 { "dec{S|}", { RMeBP } }, 705 { "dec{S|}", { RMeSI } }, 706 { "dec{S|}", { RMeDI } }, 707 /* 50 */ 708 { "pushV", { RMrAX } }, 709 { "pushV", { RMrCX } }, 710 { "pushV", { RMrDX } }, 711 { "pushV", { RMrBX } }, 712 { "pushV", { RMrSP } }, 713 { "pushV", { RMrBP } }, 714 { "pushV", { RMrSI } }, 715 { "pushV", { RMrDI } }, 716 /* 58 */ 717 { "popV", { RMrAX } }, 718 { "popV", { RMrCX } }, 719 { "popV", { RMrDX } }, 720 { "popV", { RMrBX } }, 721 { "popV", { RMrSP } }, 722 { "popV", { RMrBP } }, 723 { "popV", { RMrSI } }, 724 { "popV", { RMrDI } }, 725 /* 60 */ 726 { X86_64_0 }, 727 { X86_64_1 }, 728 { X86_64_2 }, 729 { X86_64_3 }, 730 { "(bad)", { XX } }, /* seg fs */ 731 { "(bad)", { XX } }, /* seg gs */ 732 { "(bad)", { XX } }, /* op size prefix */ 733 { "(bad)", { XX } }, /* adr size prefix */ 734 /* 68 */ 735 { "pushT", { Iq } }, 736 { "imulS", { Gv, Ev, Iv } }, 737 { "pushT", { sIb } }, 738 { "imulS", { Gv, Ev, sIb } }, 739 { "ins{b||b|}", { Ybr, indirDX } }, 740 { "ins{R||G|}", { Yzr, indirDX } }, 741 { "outs{b||b|}", { indirDXr, Xb } }, 742 { "outs{R||G|}", { indirDXr, Xz } }, 743 /* 70 */ 744 { "joH", { Jb, XX, cond_jump_flag } }, 745 { "jnoH", { Jb, XX, cond_jump_flag } }, 746 { "jbH", { Jb, XX, cond_jump_flag } }, 747 { "jaeH", { Jb, XX, cond_jump_flag } }, 748 { "jeH", { Jb, XX, cond_jump_flag } }, 749 { "jneH", { Jb, XX, cond_jump_flag } }, 750 { "jbeH", { Jb, XX, cond_jump_flag } }, 751 { "jaH", { Jb, XX, cond_jump_flag } }, 752 /* 78 */ 753 { "jsH", { Jb, XX, cond_jump_flag } }, 754 { "jnsH", { Jb, XX, cond_jump_flag } }, 755 { "jpH", { Jb, XX, cond_jump_flag } }, 756 { "jnpH", { Jb, XX, cond_jump_flag } }, 757 { "jlH", { Jb, XX, cond_jump_flag } }, 758 { "jgeH", { Jb, XX, cond_jump_flag } }, 759 { "jleH", { Jb, XX, cond_jump_flag } }, 760 { "jgH", { Jb, XX, cond_jump_flag } }, 761 /* 80 */ 762 { GRP1b }, 763 { GRP1S }, 764 { "(bad)", { XX } }, 765 { GRP1Ss }, 766 { "testB", { Eb, Gb } }, 767 { "testS", { Ev, Gv } }, 768 { "xchgB", { Eb, Gb } }, 769 { "xchgS", { Ev, Gv } }, 770 /* 88 */ 771 { "movB", { Eb, Gb } }, 772 { "movS", { Ev, Gv } }, 773 { "movB", { Gb, Eb } }, 774 { "movS", { Gv, Ev } }, 775 { "movD", { Sv, Sw } }, 776 { "leaS", { Gv, M } }, 777 { "movD", { Sw, Sv } }, 778 { GRP1a }, 779 /* 90 */ 780 { PREGRP38 }, 781 { "xchgS", { RMeCX, eAX } }, 782 { "xchgS", { RMeDX, eAX } }, 783 { "xchgS", { RMeBX, eAX } }, 784 { "xchgS", { RMeSP, eAX } }, 785 { "xchgS", { RMeBP, eAX } }, 786 { "xchgS", { RMeSI, eAX } }, 787 { "xchgS", { RMeDI, eAX } }, 788 /* 98 */ 789 { "cW{t||t|}R", { XX } }, 790 { "cR{t||t|}O", { XX } }, 791 { "Jcall{T|}", { Ap } }, 792 { "(bad)", { XX } }, /* fwait */ 793 { "pushfT", { XX } }, 794 { "popfT", { XX } }, 795 { "sahf{|}", { XX } }, 796 { "lahf{|}", { XX } }, 797 /* a0 */ 798 { "movB", { AL, Ob } }, 799 { "movS", { eAX, Ov } }, 800 { "movB", { Ob, AL } }, 801 { "movS", { Ov, eAX } }, 802 { "movs{b||b|}", { Ybr, Xb } }, 803 { "movs{R||R|}", { Yvr, Xv } }, 804 { "cmps{b||b|}", { Xb, Yb } }, 805 { "cmps{R||R|}", { Xv, Yv } }, 806 /* a8 */ 807 { "testB", { AL, Ib } }, 808 { "testS", { eAX, Iv } }, 809 { "stosB", { Ybr, AL } }, 810 { "stosS", { Yvr, eAX } }, 811 { "lodsB", { ALr, Xb } }, 812 { "lodsS", { eAXr, Xv } }, 813 { "scasB", { AL, Yb } }, 814 { "scasS", { eAX, Yv } }, 815 /* b0 */ 816 { "movB", { RMAL, Ib } }, 817 { "movB", { RMCL, Ib } }, 818 { "movB", { RMDL, Ib } }, 819 { "movB", { RMBL, Ib } }, 820 { "movB", { RMAH, Ib } }, 821 { "movB", { RMCH, Ib } }, 822 { "movB", { RMDH, Ib } }, 823 { "movB", { RMBH, Ib } }, 824 /* b8 */ 825 { "movS", { RMeAX, Iv64 } }, 826 { "movS", { RMeCX, Iv64 } }, 827 { "movS", { RMeDX, Iv64 } }, 828 { "movS", { RMeBX, Iv64 } }, 829 { "movS", { RMeSP, Iv64 } }, 830 { "movS", { RMeBP, Iv64 } }, 831 { "movS", { RMeSI, Iv64 } }, 832 { "movS", { RMeDI, Iv64 } }, 833 /* c0 */ 834 { GRP2b }, 835 { GRP2S }, 836 { "retT", { Iw } }, 837 { "retT", { XX } }, 838 { "les{S|}", { Gv, Mp } }, 839 { "ldsS", { Gv, Mp } }, 840 { GRP11_C6 }, 841 { GRP11_C7 }, 842 /* c8 */ 843 { "enterT", { Iw, Ib } }, 844 { "leaveT", { XX } }, 845 { "lretP", { Iw } }, 846 { "lretP", { XX } }, 847 { "int3", { XX } }, 848 { "int", { Ib } }, 849 { "into{|}", { XX } }, 850 { "iretP", { XX } }, 851 /* d0 */ 852 { GRP2b_one }, 853 { GRP2S_one }, 854 { GRP2b_cl }, 855 { GRP2S_cl }, 856 { "aam{|}", { sIb } }, 857 { "aad{|}", { sIb } }, 858 { "(bad)", { XX } }, 859 { "xlat", { DSBX } }, 860 /* d8 */ 861 { FLOAT }, 862 { FLOAT }, 863 { FLOAT }, 864 { FLOAT }, 865 { FLOAT }, 866 { FLOAT }, 867 { FLOAT }, 868 { FLOAT }, 869 /* e0 */ 870 { "loopneFH", { Jb, XX, loop_jcxz_flag } }, 871 { "loopeFH", { Jb, XX, loop_jcxz_flag } }, 872 { "loopFH", { Jb, XX, loop_jcxz_flag } }, 873 { "jEcxzH", { Jb, XX, loop_jcxz_flag } }, 874 { "inB", { AL, Ib } }, 875 { "inG", { zAX, Ib } }, 876 { "outB", { Ib, AL } }, 877 { "outG", { Ib, zAX } }, 878 /* e8 */ 879 { "callT", { Jv } }, 880 { "jmpT", { Jv } }, 881 { "Jjmp{T|}", { Ap } }, 882 { "jmp", { Jb } }, 883 { "inB", { AL, indirDX } }, 884 { "inG", { zAX, indirDX } }, 885 { "outB", { indirDX, AL } }, 886 { "outG", { indirDX, zAX } }, 887 /* f0 */ 888 { "(bad)", { XX } }, /* lock prefix */ 889 { "icebp", { XX } }, 890 { "(bad)", { XX } }, /* repne */ 891 { "(bad)", { XX } }, /* repz */ 892 { "hlt", { XX } }, 893 { "cmc", { XX } }, 894 { GRP3b }, 895 { GRP3S }, 896 /* f8 */ 897 { "clc", { XX } }, 898 { "stc", { XX } }, 899 { "cli", { XX } }, 900 { "sti", { XX } }, 901 { "cld", { XX } }, 902 { "std", { XX } }, 903 { GRP4 }, 904 { GRP5 }, 905}; 906 907static const struct dis386 dis386_twobyte[] = { 908 /* 00 */ 909 { GRP6 }, 910 { GRP7 }, 911 { "larS", { Gv, Ew } }, 912 { "lslS", { Gv, Ew } }, 913 { "(bad)", { XX } }, 914 { "syscall", { XX } }, 915 { "clts", { XX } }, 916 { "sysretP", { XX } }, 917 /* 08 */ 918 { "invd", { XX } }, 919 { "wbinvd", { XX } }, 920 { "(bad)", { XX } }, 921 { "ud2a", { XX } }, 922 { "(bad)", { XX } }, 923 { GRPAMD }, 924 { "femms", { XX } }, 925 { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */ 926 /* 10 */ 927 { PREGRP8 }, 928 { PREGRP9 }, 929 { PREGRP30 }, 930 { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } }, 931 { "unpcklpX", { XM, EXq } }, 932 { "unpckhpX", { XM, EXq } }, 933 { PREGRP31 }, 934 { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } }, 935 /* 18 */ 936 { GRP16 }, 937 { "(bad)", { XX } }, 938 { "(bad)", { XX } }, 939 { "(bad)", { XX } }, 940 { "(bad)", { XX } }, 941 { "(bad)", { XX } }, 942 { "(bad)", { XX } }, 943 { "nopQ", { Ev } }, 944 /* 20 */ 945 { "movZ", { Rm, Cm } }, 946 { "movZ", { Rm, Dm } }, 947 { "movZ", { Cm, Rm } }, 948 { "movZ", { Dm, Rm } }, 949 { "movL", { Rd, Td } }, 950 { "(bad)", { XX } }, 951 { "movL", { Td, Rd } }, 952 { "(bad)", { XX } }, 953 /* 28 */ 954 { "movapX", { XM, EXx } }, 955 { "movapX", { EXx, XM } }, 956 { PREGRP2 }, 957 { PREGRP33 }, 958 { PREGRP4 }, 959 { PREGRP3 }, 960 { PREGRP93 }, 961 { PREGRP94 }, 962 /* 30 */ 963 { "wrmsr", { XX } }, 964 { "rdtsc", { XX } }, 965 { "rdmsr", { XX } }, 966 { "rdpmc", { XX } }, 967 { "sysenter", { XX } }, 968 { "sysexit", { XX } }, 969 { "(bad)", { XX } }, 970 { "(bad)", { XX } }, 971 /* 38 */ 972 { THREE_BYTE_0 }, 973 { "(bad)", { XX } }, 974 { THREE_BYTE_1 }, 975 { "(bad)", { XX } }, 976 { "(bad)", { XX } }, 977 { "(bad)", { XX } }, 978 { "(bad)", { XX } }, 979 { "(bad)", { XX } }, 980 /* 40 */ 981 { "cmovo", { Gv, Ev } }, 982 { "cmovno", { Gv, Ev } }, 983 { "cmovb", { Gv, Ev } }, 984 { "cmovae", { Gv, Ev } }, 985 { "cmove", { Gv, Ev } }, 986 { "cmovne", { Gv, Ev } }, 987 { "cmovbe", { Gv, Ev } }, 988 { "cmova", { Gv, Ev } }, 989 /* 48 */ 990 { "cmovs", { Gv, Ev } }, 991 { "cmovns", { Gv, Ev } }, 992 { "cmovp", { Gv, Ev } }, 993 { "cmovnp", { Gv, Ev } }, 994 { "cmovl", { Gv, Ev } }, 995 { "cmovge", { Gv, Ev } }, 996 { "cmovle", { Gv, Ev } }, 997 { "cmovg", { Gv, Ev } }, 998 /* 50 */ 999 { "movmskpX", { Gdq, XS } }, 1000 { PREGRP13 }, 1001 { PREGRP12 }, 1002 { PREGRP11 }, 1003 { "andpX", { XM, EXx } }, 1004 { "andnpX", { XM, EXx } }, 1005 { "orpX", { XM, EXx } }, 1006 { "xorpX", { XM, EXx } }, 1007 /* 58 */ 1008 { PREGRP0 }, 1009 { PREGRP10 }, 1010 { PREGRP17 }, 1011 { PREGRP16 }, 1012 { PREGRP14 }, 1013 { PREGRP7 }, 1014 { PREGRP5 }, 1015 { PREGRP6 }, 1016 /* 60 */ 1017 { PREGRP95 }, 1018 { PREGRP96 }, 1019 { PREGRP97 }, 1020 { "packsswb", { MX, EM } }, 1021 { "pcmpgtb", { MX, EM } }, 1022 { "pcmpgtw", { MX, EM } }, 1023 { "pcmpgtd", { MX, EM } }, 1024 { "packuswb", { MX, EM } }, 1025 /* 68 */ 1026 { "punpckhbw", { MX, EM } }, 1027 { "punpckhwd", { MX, EM } }, 1028 { "punpckhdq", { MX, EM } }, 1029 { "packssdw", { MX, EM } }, 1030 { PREGRP26 }, 1031 { PREGRP24 }, 1032 { "movd", { MX, Edq } }, 1033 { PREGRP19 }, 1034 /* 70 */ 1035 { PREGRP22 }, 1036 { GRP12 }, 1037 { GRP13 }, 1038 { GRP14 }, 1039 { "pcmpeqb", { MX, EM } }, 1040 { "pcmpeqw", { MX, EM } }, 1041 { "pcmpeqd", { MX, EM } }, 1042 { "emms", { XX } }, 1043 /* 78 */ 1044 { PREGRP34 }, 1045 { PREGRP35 }, 1046 { "(bad)", { XX } }, 1047 { "(bad)", { XX } }, 1048 { PREGRP28 }, 1049 { PREGRP29 }, 1050 { PREGRP23 }, 1051 { PREGRP20 }, 1052 /* 80 */ 1053 { "joH", { Jv, XX, cond_jump_flag } }, 1054 { "jnoH", { Jv, XX, cond_jump_flag } }, 1055 { "jbH", { Jv, XX, cond_jump_flag } }, 1056 { "jaeH", { Jv, XX, cond_jump_flag } }, 1057 { "jeH", { Jv, XX, cond_jump_flag } }, 1058 { "jneH", { Jv, XX, cond_jump_flag } }, 1059 { "jbeH", { Jv, XX, cond_jump_flag } }, 1060 { "jaH", { Jv, XX, cond_jump_flag } }, 1061 /* 88 */ 1062 { "jsH", { Jv, XX, cond_jump_flag } }, 1063 { "jnsH", { Jv, XX, cond_jump_flag } }, 1064 { "jpH", { Jv, XX, cond_jump_flag } }, 1065 { "jnpH", { Jv, XX, cond_jump_flag } }, 1066 { "jlH", { Jv, XX, cond_jump_flag } }, 1067 { "jgeH", { Jv, XX, cond_jump_flag } }, 1068 { "jleH", { Jv, XX, cond_jump_flag } }, 1069 { "jgH", { Jv, XX, cond_jump_flag } }, 1070 /* 90 */ 1071 { "seto", { Eb } }, 1072 { "setno", { Eb } }, 1073 { "setb", { Eb } }, 1074 { "setae", { Eb } }, 1075 { "sete", { Eb } }, 1076 { "setne", { Eb } }, 1077 { "setbe", { Eb } }, 1078 { "seta", { Eb } }, 1079 /* 98 */ 1080 { "sets", { Eb } }, 1081 { "setns", { Eb } }, 1082 { "setp", { Eb } }, 1083 { "setnp", { Eb } }, 1084 { "setl", { Eb } }, 1085 { "setge", { Eb } }, 1086 { "setle", { Eb } }, 1087 { "setg", { Eb } }, 1088 /* a0 */ 1089 { "pushT", { fs } }, 1090 { "popT", { fs } }, 1091 { "cpuid", { XX } }, 1092 { "btS", { Ev, Gv } }, 1093 { "shldS", { Ev, Gv, Ib } }, 1094 { "shldS", { Ev, Gv, CL } }, 1095 { GRPPADLCK2 }, 1096 { GRPPADLCK1 }, 1097 /* a8 */ 1098 { "pushT", { gs } }, 1099 { "popT", { gs } }, 1100 { "rsm", { XX } }, 1101 { "btsS", { Ev, Gv } }, 1102 { "shrdS", { Ev, Gv, Ib } }, 1103 { "shrdS", { Ev, Gv, CL } }, 1104 { GRP15 }, 1105 { "imulS", { Gv, Ev } }, 1106 /* b0 */ 1107 { "cmpxchgB", { Eb, Gb } }, 1108 { "cmpxchgS", { Ev, Gv } }, 1109 { "lssS", { Gv, Mp } }, 1110 { "btrS", { Ev, Gv } }, 1111 { "lfsS", { Gv, Mp } }, 1112 { "lgsS", { Gv, Mp } }, 1113 { "movz{bR|x|bR|x}", { Gv, Eb } }, 1114 { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */ 1115 /* b8 */ 1116 { PREGRP37 }, 1117 { "ud2b", { XX } }, 1118 { GRP8 }, 1119 { "btcS", { Ev, Gv } }, 1120 { "bsfS", { Gv, Ev } }, 1121 { PREGRP36 }, 1122 { "movs{bR|x|bR|x}", { Gv, Eb } }, 1123 { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */ 1124 /* c0 */ 1125 { "xaddB", { Eb, Gb } }, 1126 { "xaddS", { Ev, Gv } }, 1127 { PREGRP1 }, 1128 { "movntiS", { Ev, Gv } }, 1129 { "pinsrw", { MX, Edqw, Ib } }, 1130 { "pextrw", { Gdq, MS, Ib } }, 1131 { "shufpX", { XM, EXx, Ib } }, 1132 { GRP9 }, 1133 /* c8 */ 1134 { "bswap", { RMeAX } }, 1135 { "bswap", { RMeCX } }, 1136 { "bswap", { RMeDX } }, 1137 { "bswap", { RMeBX } }, 1138 { "bswap", { RMeSP } }, 1139 { "bswap", { RMeBP } }, 1140 { "bswap", { RMeSI } }, 1141 { "bswap", { RMeDI } }, 1142 /* d0 */ 1143 { PREGRP27 }, 1144 { "psrlw", { MX, EM } }, 1145 { "psrld", { MX, EM } }, 1146 { "psrlq", { MX, EM } }, 1147 { "paddq", { MX, EM } }, 1148 { "pmullw", { MX, EM } }, 1149 { PREGRP21 }, 1150 { "pmovmskb", { Gdq, MS } }, 1151 /* d8 */ 1152 { "psubusb", { MX, EM } }, 1153 { "psubusw", { MX, EM } }, 1154 { "pminub", { MX, EM } }, 1155 { "pand", { MX, EM } }, 1156 { "paddusb", { MX, EM } }, 1157 { "paddusw", { MX, EM } }, 1158 { "pmaxub", { MX, EM } }, 1159 { "pandn", { MX, EM } }, 1160 /* e0 */ 1161 { "pavgb", { MX, EM } }, 1162 { "psraw", { MX, EM } }, 1163 { "psrad", { MX, EM } }, 1164 { "pavgw", { MX, EM } }, 1165 { "pmulhuw", { MX, EM } }, 1166 { "pmulhw", { MX, EM } }, 1167 { PREGRP15 }, 1168 { PREGRP25 }, 1169 /* e8 */ 1170 { "psubsb", { MX, EM } }, 1171 { "psubsw", { MX, EM } }, 1172 { "pminsw", { MX, EM } }, 1173 { "por", { MX, EM } }, 1174 { "paddsb", { MX, EM } }, 1175 { "paddsw", { MX, EM } }, 1176 { "pmaxsw", { MX, EM } }, 1177 { "pxor", { MX, EM } }, 1178 /* f0 */ 1179 { PREGRP32 }, 1180 { "psllw", { MX, EM } }, 1181 { "pslld", { MX, EM } }, 1182 { "psllq", { MX, EM } }, 1183 { "pmuludq", { MX, EM } }, 1184 { "pmaddwd", { MX, EM } }, 1185 { "psadbw", { MX, EM } }, 1186 { PREGRP18 }, 1187 /* f8 */ 1188 { "psubb", { MX, EM } }, 1189 { "psubw", { MX, EM } }, 1190 { "psubd", { MX, EM } }, 1191 { "psubq", { MX, EM } }, 1192 { "paddb", { MX, EM } }, 1193 { "paddw", { MX, EM } }, 1194 { "paddd", { MX, EM } }, 1195 { "(bad)", { XX } }, 1196}; 1197 1198static const unsigned char onebyte_has_modrm[256] = { 1199 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1200 /* ------------------------------- */ 1201 /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ 1202 /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ 1203 /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ 1204 /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ 1205 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ 1206 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ 1207 /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ 1208 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ 1209 /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ 1210 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ 1211 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ 1212 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ 1213 /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ 1214 /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ 1215 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ 1216 /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ 1217 /* ------------------------------- */ 1218 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1219}; 1220 1221static const unsigned char twobyte_has_modrm[256] = { 1222 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1223 /* ------------------------------- */ 1224 /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ 1225 /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */ 1226 /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ 1227 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1228 /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ 1229 /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ 1230 /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ 1231 /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */ 1232 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1233 /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ 1234 /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ 1235 /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */ 1236 /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ 1237 /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ 1238 /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ 1239 /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ 1240 /* ------------------------------- */ 1241 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1242}; 1243 1244static const unsigned char twobyte_uses_DATA_prefix[256] = { 1245 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1246 /* ------------------------------- */ 1247 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1248 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1249 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1250 /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ 1251 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1252 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1253 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ 1254 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */ 1255 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1256 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1257 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1258 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1259 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1260 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1261 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1262 /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ 1263 /* ------------------------------- */ 1264 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1265}; 1266 1267static const unsigned char twobyte_uses_REPNZ_prefix[256] = { 1268 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1269 /* ------------------------------- */ 1270 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1271 /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1272 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1273 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1274 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1275 /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */ 1276 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1277 /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */ 1278 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1279 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1280 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1281 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1282 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1283 /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1284 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1285 /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1286 /* ------------------------------- */ 1287 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1288}; 1289 1290static const unsigned char twobyte_uses_REPZ_prefix[256] = { 1291 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1292 /* ------------------------------- */ 1293 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1294 /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ 1295 /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ 1296 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1297 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1298 /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ 1299 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */ 1300 /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ 1301 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1302 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1303 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1304 /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */ 1305 /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1306 /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ 1307 /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ 1308 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1309 /* ------------------------------- */ 1310 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1311}; 1312 1313/* This is used to determine if opcode 0f 38 XX uses DATA prefix. */ 1314static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = { 1315 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1316 /* ------------------------------- */ 1317 /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */ 1318 /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */ 1319 /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */ 1320 /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */ 1321 /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1322 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1323 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1324 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1325 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1326 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1327 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1328 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1329 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1330 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,1,1,1,1,1, /* df */ 1331 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1332 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1333 /* ------------------------------- */ 1334 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1335}; 1336 1337/* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */ 1338static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = { 1339 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1340 /* ------------------------------- */ 1341 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1342 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1343 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1344 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1345 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1346 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1347 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1348 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1349 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1350 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1351 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1352 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1353 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1354 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1355 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1356 /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1357 /* ------------------------------- */ 1358 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1359}; 1360 1361/* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */ 1362static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = { 1363 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1364 /* ------------------------------- */ 1365 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1366 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1367 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1368 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1369 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1370 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1371 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1372 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1373 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1374 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1375 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1376 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1377 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1378 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1379 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1380 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1381 /* ------------------------------- */ 1382 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1383}; 1384 1385/* This is used to determine if opcode 0f 3a XX uses DATA prefix. */ 1386static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = { 1387 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1388 /* ------------------------------- */ 1389 /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */ 1390 /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */ 1391 /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1392 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1393 /* 40 */ 1,1,1,0,1,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1394 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1395 /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1396 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1397 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1398 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1399 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1400 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1401 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1402 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* df */ 1403 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1404 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1405 /* ------------------------------- */ 1406 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1407}; 1408 1409/* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */ 1410static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = { 1411 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1412 /* ------------------------------- */ 1413 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1414 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1415 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1416 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1417 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1418 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1419 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1420 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1421 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1422 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1423 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1424 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1425 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1426 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1427 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1428 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1429 /* ------------------------------- */ 1430 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1431}; 1432 1433/* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */ 1434static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = { 1435 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1436 /* ------------------------------- */ 1437 /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ 1438 /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ 1439 /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ 1440 /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ 1441 /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ 1442 /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ 1443 /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ 1444 /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ 1445 /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ 1446 /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ 1447 /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ 1448 /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ 1449 /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ 1450 /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ 1451 /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ 1452 /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ 1453 /* ------------------------------- */ 1454 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 1455}; 1456 1457static char obuf[100]; 1458static char *obufp; 1459static char scratchbuf[100]; 1460static unsigned char *start_codep; 1461static unsigned char *insn_codep; 1462static unsigned char *codep; 1463static disassemble_info *the_info; 1464static struct 1465 { 1466 int mod; 1467 int reg; 1468 int rm; 1469 } 1470modrm; 1471static unsigned char need_modrm; 1472 1473/* If we are accessing mod/rm/reg without need_modrm set, then the 1474 values are stale. Hitting this abort likely indicates that you 1475 need to update onebyte_has_modrm or twobyte_has_modrm. */ 1476#define MODRM_CHECK if (!need_modrm) abort () 1477 1478static const char **names64; 1479static const char **names32; 1480static const char **names16; 1481static const char **names8; 1482static const char **names8rex; 1483static const char **names_seg; 1484static const char **index16; 1485 1486static const char *intel_names64[] = { 1487 "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", 1488 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" 1489}; 1490static const char *intel_names32[] = { 1491 "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", 1492 "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" 1493}; 1494static const char *intel_names16[] = { 1495 "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", 1496 "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" 1497}; 1498static const char *intel_names8[] = { 1499 "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", 1500}; 1501static const char *intel_names8rex[] = { 1502 "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", 1503 "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" 1504}; 1505static const char *intel_names_seg[] = { 1506 "es", "cs", "ss", "ds", "fs", "gs", "?", "?", 1507}; 1508static const char *intel_index16[] = { 1509 "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" 1510}; 1511 1512static const char *att_names64[] = { 1513 "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", 1514 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" 1515}; 1516static const char *att_names32[] = { 1517 "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", 1518 "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" 1519}; 1520static const char *att_names16[] = { 1521 "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", 1522 "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" 1523}; 1524static const char *att_names8[] = { 1525 "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", 1526}; 1527static const char *att_names8rex[] = { 1528 "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", 1529 "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" 1530}; 1531static const char *att_names_seg[] = { 1532 "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", 1533}; 1534static const char *att_index16[] = { 1535 "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" 1536}; 1537 1538static const struct dis386 grps[][8] = { 1539 /* GRP1a */ 1540 { 1541 { "popU", { stackEv } }, 1542 { "(bad)", { XX } }, 1543 { "(bad)", { XX } }, 1544 { "(bad)", { XX } }, 1545 { "(bad)", { XX } }, 1546 { "(bad)", { XX } }, 1547 { "(bad)", { XX } }, 1548 { "(bad)", { XX } }, 1549 }, 1550 /* GRP1b */ 1551 { 1552 { "addA", { Eb, Ib } }, 1553 { "orA", { Eb, Ib } }, 1554 { "adcA", { Eb, Ib } }, 1555 { "sbbA", { Eb, Ib } }, 1556 { "andA", { Eb, Ib } }, 1557 { "subA", { Eb, Ib } }, 1558 { "xorA", { Eb, Ib } }, 1559 { "cmpA", { Eb, Ib } }, 1560 }, 1561 /* GRP1S */ 1562 { 1563 { "addQ", { Ev, Iv } }, 1564 { "orQ", { Ev, Iv } }, 1565 { "adcQ", { Ev, Iv } }, 1566 { "sbbQ", { Ev, Iv } }, 1567 { "andQ", { Ev, Iv } }, 1568 { "subQ", { Ev, Iv } }, 1569 { "xorQ", { Ev, Iv } }, 1570 { "cmpQ", { Ev, Iv } }, 1571 }, 1572 /* GRP1Ss */ 1573 { 1574 { "addQ", { Ev, sIb } }, 1575 { "orQ", { Ev, sIb } }, 1576 { "adcQ", { Ev, sIb } }, 1577 { "sbbQ", { Ev, sIb } }, 1578 { "andQ", { Ev, sIb } }, 1579 { "subQ", { Ev, sIb } }, 1580 { "xorQ", { Ev, sIb } }, 1581 { "cmpQ", { Ev, sIb } }, 1582 }, 1583 /* GRP2b */ 1584 { 1585 { "rolA", { Eb, Ib } }, 1586 { "rorA", { Eb, Ib } }, 1587 { "rclA", { Eb, Ib } }, 1588 { "rcrA", { Eb, Ib } }, 1589 { "shlA", { Eb, Ib } }, 1590 { "shrA", { Eb, Ib } }, 1591 { "(bad)", { XX } }, 1592 { "sarA", { Eb, Ib } }, 1593 }, 1594 /* GRP2S */ 1595 { 1596 { "rolQ", { Ev, Ib } }, 1597 { "rorQ", { Ev, Ib } }, 1598 { "rclQ", { Ev, Ib } }, 1599 { "rcrQ", { Ev, Ib } }, 1600 { "shlQ", { Ev, Ib } }, 1601 { "shrQ", { Ev, Ib } }, 1602 { "(bad)", { XX } }, 1603 { "sarQ", { Ev, Ib } }, 1604 }, 1605 /* GRP2b_one */ 1606 { 1607 { "rolA", { Eb, I1 } }, 1608 { "rorA", { Eb, I1 } }, 1609 { "rclA", { Eb, I1 } }, 1610 { "rcrA", { Eb, I1 } }, 1611 { "shlA", { Eb, I1 } }, 1612 { "shrA", { Eb, I1 } }, 1613 { "(bad)", { XX } }, 1614 { "sarA", { Eb, I1 } }, 1615 }, 1616 /* GRP2S_one */ 1617 { 1618 { "rolQ", { Ev, I1 } }, 1619 { "rorQ", { Ev, I1 } }, 1620 { "rclQ", { Ev, I1 } }, 1621 { "rcrQ", { Ev, I1 } }, 1622 { "shlQ", { Ev, I1 } }, 1623 { "shrQ", { Ev, I1 } }, 1624 { "(bad)", { XX } }, 1625 { "sarQ", { Ev, I1 } }, 1626 }, 1627 /* GRP2b_cl */ 1628 { 1629 { "rolA", { Eb, CL } }, 1630 { "rorA", { Eb, CL } }, 1631 { "rclA", { Eb, CL } }, 1632 { "rcrA", { Eb, CL } }, 1633 { "shlA", { Eb, CL } }, 1634 { "shrA", { Eb, CL } }, 1635 { "(bad)", { XX } }, 1636 { "sarA", { Eb, CL } }, 1637 }, 1638 /* GRP2S_cl */ 1639 { 1640 { "rolQ", { Ev, CL } }, 1641 { "rorQ", { Ev, CL } }, 1642 { "rclQ", { Ev, CL } }, 1643 { "rcrQ", { Ev, CL } }, 1644 { "shlQ", { Ev, CL } }, 1645 { "shrQ", { Ev, CL } }, 1646 { "(bad)", { XX } }, 1647 { "sarQ", { Ev, CL } }, 1648 }, 1649 /* GRP3b */ 1650 { 1651 { "testA", { Eb, Ib } }, 1652 { "(bad)", { Eb } }, 1653 { "notA", { Eb } }, 1654 { "negA", { Eb } }, 1655 { "mulA", { Eb } }, /* Don't print the implicit %al register, */ 1656 { "imulA", { Eb } }, /* to distinguish these opcodes from other */ 1657 { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */ 1658 { "idivA", { Eb } }, /* and idiv for consistency. */ 1659 }, 1660 /* GRP3S */ 1661 { 1662 { "testQ", { Ev, Iv } }, 1663 { "(bad)", { XX } }, 1664 { "notQ", { Ev } }, 1665 { "negQ", { Ev } }, 1666 { "mulQ", { Ev } }, /* Don't print the implicit register. */ 1667 { "imulQ", { Ev } }, 1668 { "divQ", { Ev } }, 1669 { "idivQ", { Ev } }, 1670 }, 1671 /* GRP4 */ 1672 { 1673 { "incA", { Eb } }, 1674 { "decA", { Eb } }, 1675 { "(bad)", { XX } }, 1676 { "(bad)", { XX } }, 1677 { "(bad)", { XX } }, 1678 { "(bad)", { XX } }, 1679 { "(bad)", { XX } }, 1680 { "(bad)", { XX } }, 1681 }, 1682 /* GRP5 */ 1683 { 1684 { "incQ", { Ev } }, 1685 { "decQ", { Ev } }, 1686 { "callT", { indirEv } }, 1687 { "JcallT", { indirEp } }, 1688 { "jmpT", { indirEv } }, 1689 { "JjmpT", { indirEp } }, 1690 { "pushU", { stackEv } }, 1691 { "(bad)", { XX } }, 1692 }, 1693 /* GRP6 */ 1694 { 1695 { "sldtD", { Sv } }, 1696 { "strD", { Sv } }, 1697 { "lldt", { Ew } }, 1698 { "ltr", { Ew } }, 1699 { "verr", { Ew } }, 1700 { "verw", { Ew } }, 1701 { "(bad)", { XX } }, 1702 { "(bad)", { XX } }, 1703 }, 1704 /* GRP7 */ 1705 { 1706 { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } }, 1707 { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } }, 1708 { "lgdt{Q|Q||}", { { XCR_Fixup, 0 } } }, 1709 { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } }, 1710 { "smswD", { Sv } }, 1711 { "(bad)", { XX } }, 1712 { "lmsw", { Ew } }, 1713 { "invlpg", { { INVLPG_Fixup, w_mode } } }, 1714 }, 1715 /* GRP8 */ 1716 { 1717 { "(bad)", { XX } }, 1718 { "(bad)", { XX } }, 1719 { "(bad)", { XX } }, 1720 { "(bad)", { XX } }, 1721 { "btQ", { Ev, Ib } }, 1722 { "btsQ", { Ev, Ib } }, 1723 { "btrQ", { Ev, Ib } }, 1724 { "btcQ", { Ev, Ib } }, 1725 }, 1726 /* GRP9 */ 1727 { 1728 { "(bad)", { XX } }, 1729 { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } }, 1730 { "(bad)", { XX } }, 1731 { "(bad)", { XX } }, 1732 { "(bad)", { XX } }, 1733 { "(bad)", { XX } }, 1734 { "", { VM } }, /* See OP_VMX. */ 1735 { "vmptrst", { Mq } }, 1736 }, 1737 /* GRP11_C6 */ 1738 { 1739 { "movA", { Eb, Ib } }, 1740 { "(bad)", { XX } }, 1741 { "(bad)", { XX } }, 1742 { "(bad)", { XX } }, 1743 { "(bad)", { XX } }, 1744 { "(bad)", { XX } }, 1745 { "(bad)", { XX } }, 1746 { "(bad)", { XX } }, 1747 }, 1748 /* GRP11_C7 */ 1749 { 1750 { "movQ", { Ev, Iv } }, 1751 { "(bad)", { XX } }, 1752 { "(bad)", { XX } }, 1753 { "(bad)", { XX } }, 1754 { "(bad)", { XX } }, 1755 { "(bad)", { XX } }, 1756 { "(bad)", { XX } }, 1757 { "(bad)", { XX } }, 1758 }, 1759 /* GRP12 */ 1760 { 1761 { "(bad)", { XX } }, 1762 { "(bad)", { XX } }, 1763 { "psrlw", { MS, Ib } }, 1764 { "(bad)", { XX } }, 1765 { "psraw", { MS, Ib } }, 1766 { "(bad)", { XX } }, 1767 { "psllw", { MS, Ib } }, 1768 { "(bad)", { XX } }, 1769 }, 1770 /* GRP13 */ 1771 { 1772 { "(bad)", { XX } }, 1773 { "(bad)", { XX } }, 1774 { "psrld", { MS, Ib } }, 1775 { "(bad)", { XX } }, 1776 { "psrad", { MS, Ib } }, 1777 { "(bad)", { XX } }, 1778 { "pslld", { MS, Ib } }, 1779 { "(bad)", { XX } }, 1780 }, 1781 /* GRP14 */ 1782 { 1783 { "(bad)", { XX } }, 1784 { "(bad)", { XX } }, 1785 { "psrlq", { MS, Ib } }, 1786 { "psrldq", { MS, Ib } }, 1787 { "(bad)", { XX } }, 1788 { "(bad)", { XX } }, 1789 { "psllq", { MS, Ib } }, 1790 { "pslldq", { MS, Ib } }, 1791 }, 1792 /* GRP15 */ 1793 { 1794 { "fxsave", { Ev } }, 1795 { "fxrstor", { Ev } }, 1796 { "ldmxcsr", { Ev } }, 1797 { "stmxcsr", { Ev } }, 1798 { "xsave", { Ev } }, 1799 { "xrstor", { { OP_0fae, v_mode } } }, 1800 { "xsaveopt", { { OP_0fae, v_mode } } }, 1801 { "clflush", { { OP_0fae, 0 } } }, 1802 }, 1803 /* GRP16 */ 1804 { 1805 { "prefetchnta", { Ev } }, 1806 { "prefetcht0", { Ev } }, 1807 { "prefetcht1", { Ev } }, 1808 { "prefetcht2", { Ev } }, 1809 { "(bad)", { XX } }, 1810 { "(bad)", { XX } }, 1811 { "(bad)", { XX } }, 1812 { "(bad)", { XX } }, 1813 }, 1814 /* GRPAMD */ 1815 { 1816 { "prefetch", { Eb } }, 1817 { "prefetchw", { Eb } }, 1818 { "(bad)", { XX } }, 1819 { "(bad)", { XX } }, 1820 { "(bad)", { XX } }, 1821 { "(bad)", { XX } }, 1822 { "(bad)", { XX } }, 1823 { "(bad)", { XX } }, 1824 }, 1825 /* GRPPADLCK1 */ 1826 { 1827 { "xstore-rng", { { OP_0f07, 0 } } }, 1828 { "xcrypt-ecb", { { OP_0f07, 0 } } }, 1829 { "xcrypt-cbc", { { OP_0f07, 0 } } }, 1830 { "xcrypt-ctr", { { OP_0f07, 0 } } }, 1831 { "xcrypt-cfb", { { OP_0f07, 0 } } }, 1832 { "xcrypt-ofb", { { OP_0f07, 0 } } }, 1833 { "(bad)", { { OP_0f07, 0 } } }, 1834 { "(bad)", { { OP_0f07, 0 } } }, 1835 }, 1836 /* GRPPADLCK2 */ 1837 { 1838 { "montmul", { { OP_0f07, 0 } } }, 1839 { "xsha1", { { OP_0f07, 0 } } }, 1840 { "xsha256", { { OP_0f07, 0 } } }, 1841 { "(bad)", { { OP_0f07, 0 } } }, 1842 { "(bad)", { { OP_0f07, 0 } } }, 1843 { "(bad)", { { OP_0f07, 0 } } }, 1844 { "(bad)", { { OP_0f07, 0 } } }, 1845 { "(bad)", { { OP_0f07, 0 } } }, 1846 } 1847}; 1848 1849static const struct dis386 prefix_user_table[][4] = { 1850 /* PREGRP0 */ 1851 { 1852 { "addps", { XM, EXx } }, 1853 { "addss", { XM, EXd } }, 1854 { "addpd", { XM, EXx } }, 1855 { "addsd", { XM, EXq } }, 1856 }, 1857 /* PREGRP1 */ 1858 { 1859 { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */ 1860 { "", { XM, EXx, OPSIMD } }, 1861 { "", { XM, EXx, OPSIMD } }, 1862 { "", { XM, EXx, OPSIMD } }, 1863 }, 1864 /* PREGRP2 */ 1865 { 1866 { "cvtpi2ps", { XM, EMC } }, 1867 { "cvtsi2ssY", { XM, Ev } }, 1868 { "cvtpi2pd", { XM, EMC } }, 1869 { "cvtsi2sdY", { XM, Ev } }, 1870 }, 1871 /* PREGRP3 */ 1872 { 1873 { "cvtps2pi", { MXC, EXx } }, 1874 { "cvtss2siY", { Gv, EXx } }, 1875 { "cvtpd2pi", { MXC, EXx } }, 1876 { "cvtsd2siY", { Gv, EXx } }, 1877 }, 1878 /* PREGRP4 */ 1879 { 1880 { "cvttps2pi", { MXC, EXx } }, 1881 { "cvttss2siY", { Gv, EXx } }, 1882 { "cvttpd2pi", { MXC, EXx } }, 1883 { "cvttsd2siY", { Gv, EXx } }, 1884 }, 1885 /* PREGRP5 */ 1886 { 1887 { "divps", { XM, EXx } }, 1888 { "divss", { XM, EXx } }, 1889 { "divpd", { XM, EXx } }, 1890 { "divsd", { XM, EXx } }, 1891 }, 1892 /* PREGRP6 */ 1893 { 1894 { "maxps", { XM, EXx } }, 1895 { "maxss", { XM, EXx } }, 1896 { "maxpd", { XM, EXx } }, 1897 { "maxsd", { XM, EXx } }, 1898 }, 1899 /* PREGRP7 */ 1900 { 1901 { "minps", { XM, EXx } }, 1902 { "minss", { XM, EXx } }, 1903 { "minpd", { XM, EXx } }, 1904 { "minsd", { XM, EXx } }, 1905 }, 1906 /* PREGRP8 */ 1907 { 1908 { "movups", { XM, EXx } }, 1909 { "movss", { XM, EXx } }, 1910 { "movupd", { XM, EXx } }, 1911 { "movsd", { XM, EXx } }, 1912 }, 1913 /* PREGRP9 */ 1914 { 1915 { "movups", { EXx, XM } }, 1916 { "movss", { EXx, XM } }, 1917 { "movupd", { EXx, XM } }, 1918 { "movsd", { EXx, XM } }, 1919 }, 1920 /* PREGRP10 */ 1921 { 1922 { "mulps", { XM, EXx } }, 1923 { "mulss", { XM, EXx } }, 1924 { "mulpd", { XM, EXx } }, 1925 { "mulsd", { XM, EXx } }, 1926 }, 1927 /* PREGRP11 */ 1928 { 1929 { "rcpps", { XM, EXx } }, 1930 { "rcpss", { XM, EXx } }, 1931 { "(bad)", { XM, EXx } }, 1932 { "(bad)", { XM, EXx } }, 1933 }, 1934 /* PREGRP12 */ 1935 { 1936 { "rsqrtps",{ XM, EXx } }, 1937 { "rsqrtss",{ XM, EXx } }, 1938 { "(bad)", { XM, EXx } }, 1939 { "(bad)", { XM, EXx } }, 1940 }, 1941 /* PREGRP13 */ 1942 { 1943 { "sqrtps", { XM, EXx } }, 1944 { "sqrtss", { XM, EXx } }, 1945 { "sqrtpd", { XM, EXx } }, 1946 { "sqrtsd", { XM, EXx } }, 1947 }, 1948 /* PREGRP14 */ 1949 { 1950 { "subps", { XM, EXx } }, 1951 { "subss", { XM, EXx } }, 1952 { "subpd", { XM, EXx } }, 1953 { "subsd", { XM, EXx } }, 1954 }, 1955 /* PREGRP15 */ 1956 { 1957 { "(bad)", { XM, EXx } }, 1958 { "cvtdq2pd", { XM, EXq } }, 1959 { "cvttpd2dq", { XM, EXx } }, 1960 { "cvtpd2dq", { XM, EXx } }, 1961 }, 1962 /* PREGRP16 */ 1963 { 1964 { "cvtdq2ps", { XM, EXx } }, 1965 { "cvttps2dq", { XM, EXx } }, 1966 { "cvtps2dq", { XM, EXx } }, 1967 { "(bad)", { XM, EXx } }, 1968 }, 1969 /* PREGRP17 */ 1970 { 1971 { "cvtps2pd", { XM, EXq } }, 1972 { "cvtss2sd", { XM, EXx } }, 1973 { "cvtpd2ps", { XM, EXx } }, 1974 { "cvtsd2ss", { XM, EXx } }, 1975 }, 1976 /* PREGRP18 */ 1977 { 1978 { "maskmovq", { MX, MS } }, 1979 { "(bad)", { XM, EXx } }, 1980 { "maskmovdqu", { XM, XS } }, 1981 { "(bad)", { XM, EXx } }, 1982 }, 1983 /* PREGRP19 */ 1984 { 1985 { "movq", { MX, EM } }, 1986 { "movdqu", { XM, EXx } }, 1987 { "movdqa", { XM, EXx } }, 1988 { "(bad)", { XM, EXx } }, 1989 }, 1990 /* PREGRP20 */ 1991 { 1992 { "movq", { EM, MX } }, 1993 { "movdqu", { EXx, XM } }, 1994 { "movdqa", { EXx, XM } }, 1995 { "(bad)", { EXx, XM } }, 1996 }, 1997 /* PREGRP21 */ 1998 { 1999 { "(bad)", { EXx, XM } }, 2000 { "movq2dq",{ XM, MS } }, 2001 { "movq", { EXx, XM } }, 2002 { "movdq2q",{ MX, XS } }, 2003 }, 2004 /* PREGRP22 */ 2005 { 2006 { "pshufw", { MX, EM, Ib } }, 2007 { "pshufhw",{ XM, EXx, Ib } }, 2008 { "pshufd", { XM, EXx, Ib } }, 2009 { "pshuflw",{ XM, EXx, Ib } }, 2010 }, 2011 /* PREGRP23 */ 2012 { 2013 { "movd", { Edq, MX } }, 2014 { "movq", { XM, EXx } }, 2015 { "movd", { Edq, XM } }, 2016 { "(bad)", { Ed, XM } }, 2017 }, 2018 /* PREGRP24 */ 2019 { 2020 { "(bad)", { MX, EXx } }, 2021 { "(bad)", { XM, EXx } }, 2022 { "punpckhqdq", { XM, EXx } }, 2023 { "(bad)", { XM, EXx } }, 2024 }, 2025 /* PREGRP25 */ 2026 { 2027 { "movntq", { EM, MX } }, 2028 { "(bad)", { EM, XM } }, 2029 { "movntdq",{ EM, XM } }, 2030 { "(bad)", { EM, XM } }, 2031 }, 2032 /* PREGRP26 */ 2033 { 2034 { "(bad)", { MX, EXx } }, 2035 { "(bad)", { XM, EXx } }, 2036 { "punpcklqdq", { XM, EXx } }, 2037 { "(bad)", { XM, EXx } }, 2038 }, 2039 /* PREGRP27 */ 2040 { 2041 { "(bad)", { MX, EXx } }, 2042 { "(bad)", { XM, EXx } }, 2043 { "addsubpd", { XM, EXx } }, 2044 { "addsubps", { XM, EXx } }, 2045 }, 2046 /* PREGRP28 */ 2047 { 2048 { "(bad)", { MX, EXx } }, 2049 { "(bad)", { XM, EXx } }, 2050 { "haddpd", { XM, EXx } }, 2051 { "haddps", { XM, EXx } }, 2052 }, 2053 /* PREGRP29 */ 2054 { 2055 { "(bad)", { MX, EXx } }, 2056 { "(bad)", { XM, EXx } }, 2057 { "hsubpd", { XM, EXx } }, 2058 { "hsubps", { XM, EXx } }, 2059 }, 2060 /* PREGRP30 */ 2061 { 2062 { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */ 2063 { "movsldup", { XM, EXx } }, 2064 { "movlpd", { XM, EXq } }, 2065 { "movddup", { XM, EXq } }, 2066 }, 2067 /* PREGRP31 */ 2068 { 2069 { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } }, 2070 { "movshdup", { XM, EXx } }, 2071 { "movhpd", { XM, EXq } }, 2072 { "(bad)", { XM, EXq } }, 2073 }, 2074 /* PREGRP32 */ 2075 { 2076 { "(bad)", { XM, EXx } }, 2077 { "(bad)", { XM, EXx } }, 2078 { "(bad)", { XM, EXx } }, 2079 { "lddqu", { XM, M } }, 2080 }, 2081 /* PREGRP33 */ 2082 { 2083 {"movntps", { Ev, XM } }, 2084 {"movntss", { Ev, XM } }, 2085 {"movntpd", { Ev, XM } }, 2086 {"movntsd", { Ev, XM } }, 2087 }, 2088 2089 /* PREGRP34 */ 2090 { 2091 {"vmread", { Em, Gm } }, 2092 {"(bad)", { XX } }, 2093 {"extrq", { XS, Ib, Ib } }, 2094 {"insertq", { XM, XS, Ib, Ib } }, 2095 }, 2096 2097 /* PREGRP35 */ 2098 { 2099 {"vmwrite", { Gm, Em } }, 2100 {"(bad)", { XX } }, 2101 {"extrq", { XM, XS } }, 2102 {"insertq", { XM, XS } }, 2103 }, 2104 2105 /* PREGRP36 */ 2106 { 2107 { "bsrS", { Gv, Ev } }, 2108 { "lzcntS", { Gv, Ev } }, 2109 { "bsrS", { Gv, Ev } }, 2110 { "(bad)", { XX } }, 2111 }, 2112 2113 /* PREGRP37 */ 2114 { 2115 { "(bad)", { XX } }, 2116 { "popcntS", { Gv, Ev } }, 2117 { "(bad)", { XX } }, 2118 { "(bad)", { XX } }, 2119 }, 2120 2121 /* PREGRP38 */ 2122 { 2123 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2124 { "pause", { XX } }, 2125 { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } }, 2126 { "(bad)", { XX } }, 2127 }, 2128 2129 /* PREGRP39 */ 2130 { 2131 { "(bad)", { XX } }, 2132 { "(bad)", { XX } }, 2133 { "pblendvb", {XM, EXx, XMM0 } }, 2134 { "(bad)", { XX } }, 2135 }, 2136 2137 /* PREGRP40 */ 2138 { 2139 { "(bad)", { XX } }, 2140 { "(bad)", { XX } }, 2141 { "blendvps", {XM, EXx, XMM0 } }, 2142 { "(bad)", { XX } }, 2143 }, 2144 2145 /* PREGRP41 */ 2146 { 2147 { "(bad)", { XX } }, 2148 { "(bad)", { XX } }, 2149 { "blendvpd", { XM, EXx, XMM0 } }, 2150 { "(bad)", { XX } }, 2151 }, 2152 2153 /* PREGRP42 */ 2154 { 2155 { "(bad)", { XX } }, 2156 { "(bad)", { XX } }, 2157 { "ptest", { XM, EXx } }, 2158 { "(bad)", { XX } }, 2159 }, 2160 2161 /* PREGRP43 */ 2162 { 2163 { "(bad)", { XX } }, 2164 { "(bad)", { XX } }, 2165 { "pmovsxbw", { XM, EXx } }, 2166 { "(bad)", { XX } }, 2167 }, 2168 2169 /* PREGRP44 */ 2170 { 2171 { "(bad)", { XX } }, 2172 { "(bad)", { XX } }, 2173 { "pmovsxbd", { XM, EXx } }, 2174 { "(bad)", { XX } }, 2175 }, 2176 2177 /* PREGRP45 */ 2178 { 2179 { "(bad)", { XX } }, 2180 { "(bad)", { XX } }, 2181 { "pmovsxbq", { XM, EXx } }, 2182 { "(bad)", { XX } }, 2183 }, 2184 2185 /* PREGRP46 */ 2186 { 2187 { "(bad)", { XX } }, 2188 { "(bad)", { XX } }, 2189 { "pmovsxwd", { XM, EXx } }, 2190 { "(bad)", { XX } }, 2191 }, 2192 2193 /* PREGRP47 */ 2194 { 2195 { "(bad)", { XX } }, 2196 { "(bad)", { XX } }, 2197 { "pmovsxwq", { XM, EXx } }, 2198 { "(bad)", { XX } }, 2199 }, 2200 2201 /* PREGRP48 */ 2202 { 2203 { "(bad)", { XX } }, 2204 { "(bad)", { XX } }, 2205 { "pmovsxdq", { XM, EXx } }, 2206 { "(bad)", { XX } }, 2207 }, 2208 2209 /* PREGRP49 */ 2210 { 2211 { "(bad)", { XX } }, 2212 { "(bad)", { XX } }, 2213 { "pmuldq", { XM, EXx } }, 2214 { "(bad)", { XX } }, 2215 }, 2216 2217 /* PREGRP50 */ 2218 { 2219 { "(bad)", { XX } }, 2220 { "(bad)", { XX } }, 2221 { "pcmpeqq", { XM, EXx } }, 2222 { "(bad)", { XX } }, 2223 }, 2224 2225 /* PREGRP51 */ 2226 { 2227 { "(bad)", { XX } }, 2228 { "(bad)", { XX } }, 2229 { "movntdqa", { XM, EM } }, 2230 { "(bad)", { XX } }, 2231 }, 2232 2233 /* PREGRP52 */ 2234 { 2235 { "(bad)", { XX } }, 2236 { "(bad)", { XX } }, 2237 { "packusdw", { XM, EXx } }, 2238 { "(bad)", { XX } }, 2239 }, 2240 2241 /* PREGRP53 */ 2242 { 2243 { "(bad)", { XX } }, 2244 { "(bad)", { XX } }, 2245 { "pmovzxbw", { XM, EXx } }, 2246 { "(bad)", { XX } }, 2247 }, 2248 2249 /* PREGRP54 */ 2250 { 2251 { "(bad)", { XX } }, 2252 { "(bad)", { XX } }, 2253 { "pmovzxbd", { XM, EXx } }, 2254 { "(bad)", { XX } }, 2255 }, 2256 2257 /* PREGRP55 */ 2258 { 2259 { "(bad)", { XX } }, 2260 { "(bad)", { XX } }, 2261 { "pmovzxbq", { XM, EXx } }, 2262 { "(bad)", { XX } }, 2263 }, 2264 2265 /* PREGRP56 */ 2266 { 2267 { "(bad)", { XX } }, 2268 { "(bad)", { XX } }, 2269 { "pmovzxwd", { XM, EXx } }, 2270 { "(bad)", { XX } }, 2271 }, 2272 2273 /* PREGRP57 */ 2274 { 2275 { "(bad)", { XX } }, 2276 { "(bad)", { XX } }, 2277 { "pmovzxwq", { XM, EXx } }, 2278 { "(bad)", { XX } }, 2279 }, 2280 2281 /* PREGRP58 */ 2282 { 2283 { "(bad)", { XX } }, 2284 { "(bad)", { XX } }, 2285 { "pmovzxdq", { XM, EXx } }, 2286 { "(bad)", { XX } }, 2287 }, 2288 2289 /* PREGRP59 */ 2290 { 2291 { "(bad)", { XX } }, 2292 { "(bad)", { XX } }, 2293 { "pminsb", { XM, EXx } }, 2294 { "(bad)", { XX } }, 2295 }, 2296 2297 /* PREGRP60 */ 2298 { 2299 { "(bad)", { XX } }, 2300 { "(bad)", { XX } }, 2301 { "pminsd", { XM, EXx } }, 2302 { "(bad)", { XX } }, 2303 }, 2304 2305 /* PREGRP61 */ 2306 { 2307 { "(bad)", { XX } }, 2308 { "(bad)", { XX } }, 2309 { "pminuw", { XM, EXx } }, 2310 { "(bad)", { XX } }, 2311 }, 2312 2313 /* PREGRP62 */ 2314 { 2315 { "(bad)", { XX } }, 2316 { "(bad)", { XX } }, 2317 { "pminud", { XM, EXx } }, 2318 { "(bad)", { XX } }, 2319 }, 2320 2321 /* PREGRP63 */ 2322 { 2323 { "(bad)", { XX } }, 2324 { "(bad)", { XX } }, 2325 { "pmaxsb", { XM, EXx } }, 2326 { "(bad)", { XX } }, 2327 }, 2328 2329 /* PREGRP64 */ 2330 { 2331 { "(bad)", { XX } }, 2332 { "(bad)", { XX } }, 2333 { "pmaxsd", { XM, EXx } }, 2334 { "(bad)", { XX } }, 2335 }, 2336 2337 /* PREGRP65 */ 2338 { 2339 { "(bad)", { XX } }, 2340 { "(bad)", { XX } }, 2341 { "pmaxuw", { XM, EXx } }, 2342 { "(bad)", { XX } }, 2343 }, 2344 2345 /* PREGRP66 */ 2346 { 2347 { "(bad)", { XX } }, 2348 { "(bad)", { XX } }, 2349 { "pmaxud", { XM, EXx } }, 2350 { "(bad)", { XX } }, 2351 }, 2352 2353 /* PREGRP67 */ 2354 { 2355 { "(bad)", { XX } }, 2356 { "(bad)", { XX } }, 2357 { "pmulld", { XM, EXx } }, 2358 { "(bad)", { XX } }, 2359 }, 2360 2361 /* PREGRP68 */ 2362 { 2363 { "(bad)", { XX } }, 2364 { "(bad)", { XX } }, 2365 { "phminposuw", { XM, EXx } }, 2366 { "(bad)", { XX } }, 2367 }, 2368 2369 /* PREGRP69 */ 2370 { 2371 { "(bad)", { XX } }, 2372 { "(bad)", { XX } }, 2373 { "roundps", { XM, EXx, Ib } }, 2374 { "(bad)", { XX } }, 2375 }, 2376 2377 /* PREGRP70 */ 2378 { 2379 { "(bad)", { XX } }, 2380 { "(bad)", { XX } }, 2381 { "roundpd", { XM, EXx, Ib } }, 2382 { "(bad)", { XX } }, 2383 }, 2384 2385 /* PREGRP71 */ 2386 { 2387 { "(bad)", { XX } }, 2388 { "(bad)", { XX } }, 2389 { "roundss", { XM, EXx, Ib } }, 2390 { "(bad)", { XX } }, 2391 }, 2392 2393 /* PREGRP72 */ 2394 { 2395 { "(bad)", { XX } }, 2396 { "(bad)", { XX } }, 2397 { "roundsd", { XM, EXx, Ib } }, 2398 { "(bad)", { XX } }, 2399 }, 2400 2401 /* PREGRP73 */ 2402 { 2403 { "(bad)", { XX } }, 2404 { "(bad)", { XX } }, 2405 { "blendps", { XM, EXx, Ib } }, 2406 { "(bad)", { XX } }, 2407 }, 2408 2409 /* PREGRP74 */ 2410 { 2411 { "(bad)", { XX } }, 2412 { "(bad)", { XX } }, 2413 { "blendpd", { XM, EXx, Ib } }, 2414 { "(bad)", { XX } }, 2415 }, 2416 2417 /* PREGRP75 */ 2418 { 2419 { "(bad)", { XX } }, 2420 { "(bad)", { XX } }, 2421 { "pblendw", { XM, EXx, Ib } }, 2422 { "(bad)", { XX } }, 2423 }, 2424 2425 /* PREGRP76 */ 2426 { 2427 { "(bad)", { XX } }, 2428 { "(bad)", { XX } }, 2429 { "pextrb", { Edqb, XM, Ib } }, 2430 { "(bad)", { XX } }, 2431 }, 2432 2433 /* PREGRP77 */ 2434 { 2435 { "(bad)", { XX } }, 2436 { "(bad)", { XX } }, 2437 { "pextrw", { Edqw, XM, Ib } }, 2438 { "(bad)", { XX } }, 2439 }, 2440 2441 /* PREGRP78 */ 2442 { 2443 { "(bad)", { XX } }, 2444 { "(bad)", { XX } }, 2445 { "pextrK", { Edq, XM, Ib } }, 2446 { "(bad)", { XX } }, 2447 }, 2448 2449 /* PREGRP79 */ 2450 { 2451 { "(bad)", { XX } }, 2452 { "(bad)", { XX } }, 2453 { "extractps", { Edqd, XM, Ib } }, 2454 { "(bad)", { XX } }, 2455 }, 2456 2457 /* PREGRP80 */ 2458 { 2459 { "(bad)", { XX } }, 2460 { "(bad)", { XX } }, 2461 { "pinsrb", { XM, Edqb, Ib } }, 2462 { "(bad)", { XX } }, 2463 }, 2464 2465 /* PREGRP81 */ 2466 { 2467 { "(bad)", { XX } }, 2468 { "(bad)", { XX } }, 2469 { "insertps", { XM, EXx, Ib } }, 2470 { "(bad)", { XX } }, 2471 }, 2472 2473 /* PREGRP82 */ 2474 { 2475 { "(bad)", { XX } }, 2476 { "(bad)", { XX } }, 2477 { "pinsrK", { XM, Edq, Ib } }, 2478 { "(bad)", { XX } }, 2479 }, 2480 2481 /* PREGRP83 */ 2482 { 2483 { "(bad)", { XX } }, 2484 { "(bad)", { XX } }, 2485 { "dpps", { XM, EXx, Ib } }, 2486 { "(bad)", { XX } }, 2487 }, 2488 2489 /* PREGRP84 */ 2490 { 2491 { "(bad)", { XX } }, 2492 { "(bad)", { XX } }, 2493 { "dppd", { XM, EXx, Ib } }, 2494 { "(bad)", { XX } }, 2495 }, 2496 2497 /* PREGRP85 */ 2498 { 2499 { "(bad)", { XX } }, 2500 { "(bad)", { XX } }, 2501 { "mpsadbw", { XM, EXx, Ib } }, 2502 { "(bad)", { XX } }, 2503 }, 2504 2505 /* PREGRP86 */ 2506 { 2507 { "(bad)", { XX } }, 2508 { "(bad)", { XX } }, 2509 { "pcmpgtq", { XM, EXx } }, 2510 { "(bad)", { XX } }, 2511 }, 2512 2513 /* PREGRP87 */ 2514 { 2515 { "(bad)", { XX } }, 2516 { "(bad)", { XX } }, 2517 { "(bad)", { XX } }, 2518 { "crc32", { Gdq, { CRC32_Fixup, b_mode } } }, 2519 }, 2520 2521 /* PREGRP88 */ 2522 { 2523 { "(bad)", { XX } }, 2524 { "(bad)", { XX } }, 2525 { "(bad)", { XX } }, 2526 { "crc32", { Gdq, { CRC32_Fixup, v_mode } } }, 2527 }, 2528 2529 /* PREGRP89 */ 2530 { 2531 { "(bad)", { XX } }, 2532 { "(bad)", { XX } }, 2533 { "pcmpestrm", { XM, EXx, Ib } }, 2534 { "(bad)", { XX } }, 2535 }, 2536 2537 /* PREGRP90 */ 2538 { 2539 { "(bad)", { XX } }, 2540 { "(bad)", { XX } }, 2541 { "pcmpestri", { XM, EXx, Ib } }, 2542 { "(bad)", { XX } }, 2543 }, 2544 2545 /* PREGRP91 */ 2546 { 2547 { "(bad)", { XX } }, 2548 { "(bad)", { XX } }, 2549 { "pcmpistrm", { XM, EXx, Ib } }, 2550 { "(bad)", { XX } }, 2551 }, 2552 2553 /* PREGRP92 */ 2554 { 2555 { "(bad)", { XX } }, 2556 { "(bad)", { XX } }, 2557 { "pcmpistri", { XM, EXx, Ib } }, 2558 { "(bad)", { XX } }, 2559 }, 2560 2561 /* PREGRP93 */ 2562 { 2563 { "ucomiss",{ XM, EXd } }, 2564 { "(bad)", { XX } }, 2565 { "ucomisd",{ XM, EXq } }, 2566 { "(bad)", { XX } }, 2567 }, 2568 2569 /* PREGRP94 */ 2570 { 2571 { "comiss", { XM, EXd } }, 2572 { "(bad)", { XX } }, 2573 { "comisd", { XM, EXq } }, 2574 { "(bad)", { XX } }, 2575 }, 2576 2577 /* PREGRP95 */ 2578 { 2579 { "punpcklbw",{ MX, EMd } }, 2580 { "(bad)", { XX } }, 2581 { "punpcklbw",{ MX, EMq } }, 2582 { "(bad)", { XX } }, 2583 }, 2584 2585 /* PREGRP96 */ 2586 { 2587 { "punpcklwd",{ MX, EMd } }, 2588 { "(bad)", { XX } }, 2589 { "punpcklwd",{ MX, EMq } }, 2590 { "(bad)", { XX } }, 2591 }, 2592 2593 /* PREGRP97 */ 2594 { 2595 { "punpckldq",{ MX, EMd } }, 2596 { "(bad)", { XX } }, 2597 { "punpckldq",{ MX, EMq } }, 2598 { "(bad)", { XX } }, 2599 }, 2600 2601 /* PREGRP98 */ 2602 { 2603 { "(bad)", { XX } }, 2604 { "(bad)", { XX } }, 2605 { "invept", { Gm, Mo } }, 2606 { "(bad)", { XX } }, 2607 }, 2608 2609 /* PREGRP99 */ 2610 { 2611 { "(bad)", { XX } }, 2612 { "(bad)", { XX } }, 2613 { "invvpid",{ Gm, Mo } }, 2614 { "(bad)", { XX } }, 2615 }, 2616 2617 /* PREGRP100 */ 2618 { 2619 { "(bad)", { XX } }, 2620 { "(bad)", { XX } }, 2621 { "aesimc", { XM, EXx } }, 2622 { "(bad)", { XX } }, 2623 }, 2624 2625 /* PREGRP101 */ 2626 { 2627 { "(bad)", { XX } }, 2628 { "(bad)", { XX } }, 2629 { "aesenc",{ XM, EXx } }, 2630 { "(bad)", { XX } }, 2631 }, 2632 2633 /* PREGRP102 */ 2634 { 2635 { "(bad)", { XX } }, 2636 { "(bad)", { XX } }, 2637 { "aesenclast", { XM, EXx } }, 2638 { "(bad)", { XX } }, 2639 }, 2640 2641 /* PREGRP103 */ 2642 { 2643 { "(bad)", { XX } }, 2644 { "(bad)", { XX } }, 2645 { "aesdec", { XM, EXx } }, 2646 { "(bad)", { XX } }, 2647 }, 2648 2649 /* PREGRP104 */ 2650 { 2651 { "(bad)", { XX } }, 2652 { "(bad)", { XX } }, 2653 { "aesdeclast", { XM, EXx } }, 2654 { "(bad)", { XX } }, 2655 }, 2656 2657 /* PREGRP105 */ 2658 { 2659 { "(bad)", { XX } }, 2660 { "(bad)", { XX } }, 2661 { "aeskeygenassist", { XM, EXx, Ib } }, 2662 { "(bad)", { XX } }, 2663 }, 2664 2665 /* PREGRP106 */ 2666 { 2667 { "(bad)", { XX } }, 2668 { "(bad)", { XX } }, 2669 { "pclmulqdq", { XM, EXx, Ib } }, 2670 { "(bad)", { XX } }, 2671 }, 2672 2673 /* PREGRP107 */ 2674 { 2675 { "(bad)", { XX } }, 2676 { "(bad)", { XX } }, 2677 { "invpcid",{ Gm, Mo } }, 2678 { "(bad)", { XX } }, 2679 }, 2680}; 2681 2682static const struct dis386 x86_64_table[][2] = { 2683 { 2684 { "pusha{P|}", { XX } }, 2685 { "(bad)", { XX } }, 2686 }, 2687 { 2688 { "popa{P|}", { XX } }, 2689 { "(bad)", { XX } }, 2690 }, 2691 { 2692 { "bound{S|}", { Gv, Ma } }, 2693 { "(bad)", { XX } }, 2694 }, 2695 { 2696 { "arpl", { Ew, Gw } }, 2697 { "movs{||lq|xd}", { Gv, Ed } }, 2698 }, 2699}; 2700 2701static const struct dis386 three_byte_table[][256] = { 2702 /* THREE_BYTE_0 */ 2703 { 2704 /* 00 */ 2705 { "pshufb", { MX, EM } }, 2706 { "phaddw", { MX, EM } }, 2707 { "phaddd", { MX, EM } }, 2708 { "phaddsw", { MX, EM } }, 2709 { "pmaddubsw", { MX, EM } }, 2710 { "phsubw", { MX, EM } }, 2711 { "phsubd", { MX, EM } }, 2712 { "phsubsw", { MX, EM } }, 2713 /* 08 */ 2714 { "psignb", { MX, EM } }, 2715 { "psignw", { MX, EM } }, 2716 { "psignd", { MX, EM } }, 2717 { "pmulhrsw", { MX, EM } }, 2718 { "(bad)", { XX } }, 2719 { "(bad)", { XX } }, 2720 { "(bad)", { XX } }, 2721 { "(bad)", { XX } }, 2722 /* 10 */ 2723 { PREGRP39 }, 2724 { "(bad)", { XX } }, 2725 { "(bad)", { XX } }, 2726 { "(bad)", { XX } }, 2727 { PREGRP40 }, 2728 { PREGRP41 }, 2729 { "(bad)", { XX } }, 2730 { PREGRP42 }, 2731 /* 18 */ 2732 { "(bad)", { XX } }, 2733 { "(bad)", { XX } }, 2734 { "(bad)", { XX } }, 2735 { "(bad)", { XX } }, 2736 { "pabsb", { MX, EM } }, 2737 { "pabsw", { MX, EM } }, 2738 { "pabsd", { MX, EM } }, 2739 { "(bad)", { XX } }, 2740 /* 20 */ 2741 { PREGRP43 }, 2742 { PREGRP44 }, 2743 { PREGRP45 }, 2744 { PREGRP46 }, 2745 { PREGRP47 }, 2746 { PREGRP48 }, 2747 { "(bad)", { XX } }, 2748 { "(bad)", { XX } }, 2749 /* 28 */ 2750 { PREGRP49 }, 2751 { PREGRP50 }, 2752 { PREGRP51 }, 2753 { PREGRP52 }, 2754 { "(bad)", { XX } }, 2755 { "(bad)", { XX } }, 2756 { "(bad)", { XX } }, 2757 { "(bad)", { XX } }, 2758 /* 30 */ 2759 { PREGRP53 }, 2760 { PREGRP54 }, 2761 { PREGRP55 }, 2762 { PREGRP56 }, 2763 { PREGRP57 }, 2764 { PREGRP58 }, 2765 { "(bad)", { XX } }, 2766 { PREGRP86 }, 2767 /* 38 */ 2768 { PREGRP59 }, 2769 { PREGRP60 }, 2770 { PREGRP61 }, 2771 { PREGRP62 }, 2772 { PREGRP63 }, 2773 { PREGRP64 }, 2774 { PREGRP65 }, 2775 { PREGRP66 }, 2776 /* 40 */ 2777 { PREGRP67 }, 2778 { PREGRP68 }, 2779 { "(bad)", { XX } }, 2780 { "(bad)", { XX } }, 2781 { "(bad)", { XX } }, 2782 { "(bad)", { XX } }, 2783 { "(bad)", { XX } }, 2784 { "(bad)", { XX } }, 2785 /* 48 */ 2786 { "(bad)", { XX } }, 2787 { "(bad)", { XX } }, 2788 { "(bad)", { XX } }, 2789 { "(bad)", { XX } }, 2790 { "(bad)", { XX } }, 2791 { "(bad)", { XX } }, 2792 { "(bad)", { XX } }, 2793 { "(bad)", { XX } }, 2794 /* 50 */ 2795 { "(bad)", { XX } }, 2796 { "(bad)", { XX } }, 2797 { "(bad)", { XX } }, 2798 { "(bad)", { XX } }, 2799 { "(bad)", { XX } }, 2800 { "(bad)", { XX } }, 2801 { "(bad)", { XX } }, 2802 { "(bad)", { XX } }, 2803 /* 58 */ 2804 { "(bad)", { XX } }, 2805 { "(bad)", { XX } }, 2806 { "(bad)", { XX } }, 2807 { "(bad)", { XX } }, 2808 { "(bad)", { XX } }, 2809 { "(bad)", { XX } }, 2810 { "(bad)", { XX } }, 2811 { "(bad)", { XX } }, 2812 /* 60 */ 2813 { "(bad)", { XX } }, 2814 { "(bad)", { XX } }, 2815 { "(bad)", { XX } }, 2816 { "(bad)", { XX } }, 2817 { "(bad)", { XX } }, 2818 { "(bad)", { XX } }, 2819 { "(bad)", { XX } }, 2820 { "(bad)", { XX } }, 2821 /* 68 */ 2822 { "(bad)", { XX } }, 2823 { "(bad)", { XX } }, 2824 { "(bad)", { XX } }, 2825 { "(bad)", { XX } }, 2826 { "(bad)", { XX } }, 2827 { "(bad)", { XX } }, 2828 { "(bad)", { XX } }, 2829 { "(bad)", { XX } }, 2830 /* 70 */ 2831 { "(bad)", { XX } }, 2832 { "(bad)", { XX } }, 2833 { "(bad)", { XX } }, 2834 { "(bad)", { XX } }, 2835 { "(bad)", { XX } }, 2836 { "(bad)", { XX } }, 2837 { "(bad)", { XX } }, 2838 { "(bad)", { XX } }, 2839 /* 78 */ 2840 { "(bad)", { XX } }, 2841 { "(bad)", { XX } }, 2842 { "(bad)", { XX } }, 2843 { "(bad)", { XX } }, 2844 { "(bad)", { XX } }, 2845 { "(bad)", { XX } }, 2846 { "(bad)", { XX } }, 2847 { "(bad)", { XX } }, 2848 /* 80 */ 2849 { PREGRP98 }, 2850 { PREGRP99 }, 2851 { PREGRP107 }, 2852 { "(bad)", { XX } }, 2853 { "(bad)", { XX } }, 2854 { "(bad)", { XX } }, 2855 { "(bad)", { XX } }, 2856 { "(bad)", { XX } }, 2857 /* 88 */ 2858 { "(bad)", { XX } }, 2859 { "(bad)", { XX } }, 2860 { "(bad)", { XX } }, 2861 { "(bad)", { XX } }, 2862 { "(bad)", { XX } }, 2863 { "(bad)", { XX } }, 2864 { "(bad)", { XX } }, 2865 { "(bad)", { XX } }, 2866 /* 90 */ 2867 { "(bad)", { XX } }, 2868 { "(bad)", { XX } }, 2869 { "(bad)", { XX } }, 2870 { "(bad)", { XX } }, 2871 { "(bad)", { XX } }, 2872 { "(bad)", { XX } }, 2873 { "(bad)", { XX } }, 2874 { "(bad)", { XX } }, 2875 /* 98 */ 2876 { "(bad)", { XX } }, 2877 { "(bad)", { XX } }, 2878 { "(bad)", { XX } }, 2879 { "(bad)", { XX } }, 2880 { "(bad)", { XX } }, 2881 { "(bad)", { XX } }, 2882 { "(bad)", { XX } }, 2883 { "(bad)", { XX } }, 2884 /* a0 */ 2885 { "(bad)", { XX } }, 2886 { "(bad)", { XX } }, 2887 { "(bad)", { XX } }, 2888 { "(bad)", { XX } }, 2889 { "(bad)", { XX } }, 2890 { "(bad)", { XX } }, 2891 { "(bad)", { XX } }, 2892 { "(bad)", { XX } }, 2893 /* a8 */ 2894 { "(bad)", { XX } }, 2895 { "(bad)", { XX } }, 2896 { "(bad)", { XX } }, 2897 { "(bad)", { XX } }, 2898 { "(bad)", { XX } }, 2899 { "(bad)", { XX } }, 2900 { "(bad)", { XX } }, 2901 { "(bad)", { XX } }, 2902 /* b0 */ 2903 { "(bad)", { XX } }, 2904 { "(bad)", { XX } }, 2905 { "(bad)", { XX } }, 2906 { "(bad)", { XX } }, 2907 { "(bad)", { XX } }, 2908 { "(bad)", { XX } }, 2909 { "(bad)", { XX } }, 2910 { "(bad)", { XX } }, 2911 /* b8 */ 2912 { "(bad)", { XX } }, 2913 { "(bad)", { XX } }, 2914 { "(bad)", { XX } }, 2915 { "(bad)", { XX } }, 2916 { "(bad)", { XX } }, 2917 { "(bad)", { XX } }, 2918 { "(bad)", { XX } }, 2919 { "(bad)", { XX } }, 2920 /* c0 */ 2921 { "(bad)", { XX } }, 2922 { "(bad)", { XX } }, 2923 { "(bad)", { XX } }, 2924 { "(bad)", { XX } }, 2925 { "(bad)", { XX } }, 2926 { "(bad)", { XX } }, 2927 { "(bad)", { XX } }, 2928 { "(bad)", { XX } }, 2929 /* c8 */ 2930 { "(bad)", { XX } }, 2931 { "(bad)", { XX } }, 2932 { "(bad)", { XX } }, 2933 { "(bad)", { XX } }, 2934 { "(bad)", { XX } }, 2935 { "(bad)", { XX } }, 2936 { "(bad)", { XX } }, 2937 { "(bad)", { XX } }, 2938 /* d0 */ 2939 { "(bad)", { XX } }, 2940 { "(bad)", { XX } }, 2941 { "(bad)", { XX } }, 2942 { "(bad)", { XX } }, 2943 { "(bad)", { XX } }, 2944 { "(bad)", { XX } }, 2945 { "(bad)", { XX } }, 2946 { "(bad)", { XX } }, 2947 /* d8 */ 2948 { "(bad)", { XX } }, 2949 { "(bad)", { XX } }, 2950 { "(bad)", { XX } }, 2951 { PREGRP100 }, 2952 { PREGRP101 }, 2953 { PREGRP102 }, 2954 { PREGRP103 }, 2955 { PREGRP104 }, 2956 /* e0 */ 2957 { "(bad)", { XX } }, 2958 { "(bad)", { XX } }, 2959 { "(bad)", { XX } }, 2960 { "(bad)", { XX } }, 2961 { "(bad)", { XX } }, 2962 { "(bad)", { XX } }, 2963 { "(bad)", { XX } }, 2964 { "(bad)", { XX } }, 2965 /* e8 */ 2966 { "(bad)", { XX } }, 2967 { "(bad)", { XX } }, 2968 { "(bad)", { XX } }, 2969 { "(bad)", { XX } }, 2970 { "(bad)", { XX } }, 2971 { "(bad)", { XX } }, 2972 { "(bad)", { XX } }, 2973 { "(bad)", { XX } }, 2974 /* f0 */ 2975 { PREGRP87 }, 2976 { PREGRP88 }, 2977 { "(bad)", { XX } }, 2978 { "(bad)", { XX } }, 2979 { "(bad)", { XX } }, 2980 { "(bad)", { XX } }, 2981 { "(bad)", { XX } }, 2982 { "(bad)", { XX } }, 2983 /* f8 */ 2984 { "(bad)", { XX } }, 2985 { "(bad)", { XX } }, 2986 { "(bad)", { XX } }, 2987 { "(bad)", { XX } }, 2988 { "(bad)", { XX } }, 2989 { "(bad)", { XX } }, 2990 { "(bad)", { XX } }, 2991 { "(bad)", { XX } }, 2992 }, 2993 /* THREE_BYTE_1 */ 2994 { 2995 /* 00 */ 2996 { "(bad)", { XX } }, 2997 { "(bad)", { XX } }, 2998 { "(bad)", { XX } }, 2999 { "(bad)", { XX } }, 3000 { "(bad)", { XX } }, 3001 { "(bad)", { XX } }, 3002 { "(bad)", { XX } }, 3003 { "(bad)", { XX } }, 3004 /* 08 */ 3005 { PREGRP69 }, 3006 { PREGRP70 }, 3007 { PREGRP71 }, 3008 { PREGRP72 }, 3009 { PREGRP73 }, 3010 { PREGRP74 }, 3011 { PREGRP75 }, 3012 { "palignr", { MX, EM, Ib } }, 3013 /* 10 */ 3014 { "(bad)", { XX } }, 3015 { "(bad)", { XX } }, 3016 { "(bad)", { XX } }, 3017 { "(bad)", { XX } }, 3018 { PREGRP76 }, 3019 { PREGRP77 }, 3020 { PREGRP78 }, 3021 { PREGRP79 }, 3022 /* 18 */ 3023 { "(bad)", { XX } }, 3024 { "(bad)", { XX } }, 3025 { "(bad)", { XX } }, 3026 { "(bad)", { XX } }, 3027 { "(bad)", { XX } }, 3028 { "(bad)", { XX } }, 3029 { "(bad)", { XX } }, 3030 { "(bad)", { XX } }, 3031 /* 20 */ 3032 { PREGRP80 }, 3033 { PREGRP81 }, 3034 { PREGRP82 }, 3035 { "(bad)", { XX } }, 3036 { "(bad)", { XX } }, 3037 { "(bad)", { XX } }, 3038 { "(bad)", { XX } }, 3039 { "(bad)", { XX } }, 3040 /* 28 */ 3041 { "(bad)", { XX } }, 3042 { "(bad)", { XX } }, 3043 { "(bad)", { XX } }, 3044 { "(bad)", { XX } }, 3045 { "(bad)", { XX } }, 3046 { "(bad)", { XX } }, 3047 { "(bad)", { XX } }, 3048 { "(bad)", { XX } }, 3049 /* 30 */ 3050 { "(bad)", { XX } }, 3051 { "(bad)", { XX } }, 3052 { "(bad)", { XX } }, 3053 { "(bad)", { XX } }, 3054 { "(bad)", { XX } }, 3055 { "(bad)", { XX } }, 3056 { "(bad)", { XX } }, 3057 { "(bad)", { XX } }, 3058 /* 38 */ 3059 { "(bad)", { XX } }, 3060 { "(bad)", { XX } }, 3061 { "(bad)", { XX } }, 3062 { "(bad)", { XX } }, 3063 { "(bad)", { XX } }, 3064 { "(bad)", { XX } }, 3065 { "(bad)", { XX } }, 3066 { "(bad)", { XX } }, 3067 /* 40 */ 3068 { PREGRP83 }, 3069 { PREGRP84 }, 3070 { PREGRP85 }, 3071 { "(bad)", { XX } }, 3072 { PREGRP106 }, 3073 { "(bad)", { XX } }, 3074 { "(bad)", { XX } }, 3075 { "(bad)", { XX } }, 3076 /* 48 */ 3077 { "(bad)", { XX } }, 3078 { "(bad)", { XX } }, 3079 { "(bad)", { XX } }, 3080 { "(bad)", { XX } }, 3081 { "(bad)", { XX } }, 3082 { "(bad)", { XX } }, 3083 { "(bad)", { XX } }, 3084 { "(bad)", { XX } }, 3085 /* 50 */ 3086 { "(bad)", { XX } }, 3087 { "(bad)", { XX } }, 3088 { "(bad)", { XX } }, 3089 { "(bad)", { XX } }, 3090 { "(bad)", { XX } }, 3091 { "(bad)", { XX } }, 3092 { "(bad)", { XX } }, 3093 { "(bad)", { XX } }, 3094 /* 58 */ 3095 { "(bad)", { XX } }, 3096 { "(bad)", { XX } }, 3097 { "(bad)", { XX } }, 3098 { "(bad)", { XX } }, 3099 { "(bad)", { XX } }, 3100 { "(bad)", { XX } }, 3101 { "(bad)", { XX } }, 3102 { "(bad)", { XX } }, 3103 /* 60 */ 3104 { PREGRP89 }, 3105 { PREGRP90 }, 3106 { PREGRP91 }, 3107 { PREGRP92 }, 3108 { "(bad)", { XX } }, 3109 { "(bad)", { XX } }, 3110 { "(bad)", { XX } }, 3111 { "(bad)", { XX } }, 3112 /* 68 */ 3113 { "(bad)", { XX } }, 3114 { "(bad)", { XX } }, 3115 { "(bad)", { XX } }, 3116 { "(bad)", { XX } }, 3117 { "(bad)", { XX } }, 3118 { "(bad)", { XX } }, 3119 { "(bad)", { XX } }, 3120 { "(bad)", { XX } }, 3121 /* 70 */ 3122 { "(bad)", { XX } }, 3123 { "(bad)", { XX } }, 3124 { "(bad)", { XX } }, 3125 { "(bad)", { XX } }, 3126 { "(bad)", { XX } }, 3127 { "(bad)", { XX } }, 3128 { "(bad)", { XX } }, 3129 { "(bad)", { XX } }, 3130 /* 78 */ 3131 { "(bad)", { XX } }, 3132 { "(bad)", { XX } }, 3133 { "(bad)", { XX } }, 3134 { "(bad)", { XX } }, 3135 { "(bad)", { XX } }, 3136 { "(bad)", { XX } }, 3137 { "(bad)", { XX } }, 3138 { "(bad)", { XX } }, 3139 /* 80 */ 3140 { "(bad)", { XX } }, 3141 { "(bad)", { XX } }, 3142 { "(bad)", { XX } }, 3143 { "(bad)", { XX } }, 3144 { "(bad)", { XX } }, 3145 { "(bad)", { XX } }, 3146 { "(bad)", { XX } }, 3147 { "(bad)", { XX } }, 3148 /* 88 */ 3149 { "(bad)", { XX } }, 3150 { "(bad)", { XX } }, 3151 { "(bad)", { XX } }, 3152 { "(bad)", { XX } }, 3153 { "(bad)", { XX } }, 3154 { "(bad)", { XX } }, 3155 { "(bad)", { XX } }, 3156 { "(bad)", { XX } }, 3157 /* 90 */ 3158 { "(bad)", { XX } }, 3159 { "(bad)", { XX } }, 3160 { "(bad)", { XX } }, 3161 { "(bad)", { XX } }, 3162 { "(bad)", { XX } }, 3163 { "(bad)", { XX } }, 3164 { "(bad)", { XX } }, 3165 { "(bad)", { XX } }, 3166 /* 98 */ 3167 { "(bad)", { XX } }, 3168 { "(bad)", { XX } }, 3169 { "(bad)", { XX } }, 3170 { "(bad)", { XX } }, 3171 { "(bad)", { XX } }, 3172 { "(bad)", { XX } }, 3173 { "(bad)", { XX } }, 3174 { "(bad)", { XX } }, 3175 /* a0 */ 3176 { "(bad)", { XX } }, 3177 { "(bad)", { XX } }, 3178 { "(bad)", { XX } }, 3179 { "(bad)", { XX } }, 3180 { "(bad)", { XX } }, 3181 { "(bad)", { XX } }, 3182 { "(bad)", { XX } }, 3183 { "(bad)", { XX } }, 3184 /* a8 */ 3185 { "(bad)", { XX } }, 3186 { "(bad)", { XX } }, 3187 { "(bad)", { XX } }, 3188 { "(bad)", { XX } }, 3189 { "(bad)", { XX } }, 3190 { "(bad)", { XX } }, 3191 { "(bad)", { XX } }, 3192 { "(bad)", { XX } }, 3193 /* b0 */ 3194 { "(bad)", { XX } }, 3195 { "(bad)", { XX } }, 3196 { "(bad)", { XX } }, 3197 { "(bad)", { XX } }, 3198 { "(bad)", { XX } }, 3199 { "(bad)", { XX } }, 3200 { "(bad)", { XX } }, 3201 { "(bad)", { XX } }, 3202 /* b8 */ 3203 { "(bad)", { XX } }, 3204 { "(bad)", { XX } }, 3205 { "(bad)", { XX } }, 3206 { "(bad)", { XX } }, 3207 { "(bad)", { XX } }, 3208 { "(bad)", { XX } }, 3209 { "(bad)", { XX } }, 3210 { "(bad)", { XX } }, 3211 /* c0 */ 3212 { "(bad)", { XX } }, 3213 { "(bad)", { XX } }, 3214 { "(bad)", { XX } }, 3215 { "(bad)", { XX } }, 3216 { "(bad)", { XX } }, 3217 { "(bad)", { XX } }, 3218 { "(bad)", { XX } }, 3219 { "(bad)", { XX } }, 3220 /* c8 */ 3221 { "(bad)", { XX } }, 3222 { "(bad)", { XX } }, 3223 { "(bad)", { XX } }, 3224 { "(bad)", { XX } }, 3225 { "(bad)", { XX } }, 3226 { "(bad)", { XX } }, 3227 { "(bad)", { XX } }, 3228 { "(bad)", { XX } }, 3229 /* d0 */ 3230 { "(bad)", { XX } }, 3231 { "(bad)", { XX } }, 3232 { "(bad)", { XX } }, 3233 { "(bad)", { XX } }, 3234 { "(bad)", { XX } }, 3235 { "(bad)", { XX } }, 3236 { "(bad)", { XX } }, 3237 { "(bad)", { XX } }, 3238 /* d8 */ 3239 { "(bad)", { XX } }, 3240 { "(bad)", { XX } }, 3241 { "(bad)", { XX } }, 3242 { "(bad)", { XX } }, 3243 { "(bad)", { XX } }, 3244 { "(bad)", { XX } }, 3245 { "(bad)", { XX } }, 3246 { PREGRP105 }, 3247 /* e0 */ 3248 { "(bad)", { XX } }, 3249 { "(bad)", { XX } }, 3250 { "(bad)", { XX } }, 3251 { "(bad)", { XX } }, 3252 { "(bad)", { XX } }, 3253 { "(bad)", { XX } }, 3254 { "(bad)", { XX } }, 3255 { "(bad)", { XX } }, 3256 /* e8 */ 3257 { "(bad)", { XX } }, 3258 { "(bad)", { XX } }, 3259 { "(bad)", { XX } }, 3260 { "(bad)", { XX } }, 3261 { "(bad)", { XX } }, 3262 { "(bad)", { XX } }, 3263 { "(bad)", { XX } }, 3264 { "(bad)", { XX } }, 3265 /* f0 */ 3266 { "(bad)", { XX } }, 3267 { "(bad)", { XX } }, 3268 { "(bad)", { XX } }, 3269 { "(bad)", { XX } }, 3270 { "(bad)", { XX } }, 3271 { "(bad)", { XX } }, 3272 { "(bad)", { XX } }, 3273 { "(bad)", { XX } }, 3274 /* f8 */ 3275 { "(bad)", { XX } }, 3276 { "(bad)", { XX } }, 3277 { "(bad)", { XX } }, 3278 { "(bad)", { XX } }, 3279 { "(bad)", { XX } }, 3280 { "(bad)", { XX } }, 3281 { "(bad)", { XX } }, 3282 { "(bad)", { XX } }, 3283 } 3284}; 3285 3286#define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") 3287 3288static void 3289ckprefix (void) 3290{ 3291 int newrex; 3292 rex = 0; 3293 prefixes = 0; 3294 used_prefixes = 0; 3295 rex_used = 0; 3296 while (1) 3297 { 3298 (void) FETCH_DATA (the_info, codep + 1); 3299 newrex = 0; 3300 switch (*codep) 3301 { 3302 /* REX prefixes family. */ 3303 case 0x40: 3304 case 0x41: 3305 case 0x42: 3306 case 0x43: 3307 case 0x44: 3308 case 0x45: 3309 case 0x46: 3310 case 0x47: 3311 case 0x48: 3312 case 0x49: 3313 case 0x4a: 3314 case 0x4b: 3315 case 0x4c: 3316 case 0x4d: 3317 case 0x4e: 3318 case 0x4f: 3319 if (address_mode == mode_64bit) 3320 newrex = *codep; 3321 else 3322 return; 3323 break; 3324 case 0xf3: 3325 prefixes |= PREFIX_REPZ; 3326 break; 3327 case 0xf2: 3328 prefixes |= PREFIX_REPNZ; 3329 break; 3330 case 0xf0: 3331 prefixes |= PREFIX_LOCK; 3332 break; 3333 case 0x2e: 3334 prefixes |= PREFIX_CS; 3335 break; 3336 case 0x36: 3337 prefixes |= PREFIX_SS; 3338 break; 3339 case 0x3e: 3340 prefixes |= PREFIX_DS; 3341 break; 3342 case 0x26: 3343 prefixes |= PREFIX_ES; 3344 break; 3345 case 0x64: 3346 prefixes |= PREFIX_FS; 3347 break; 3348 case 0x65: 3349 prefixes |= PREFIX_GS; 3350 break; 3351 case 0x66: 3352 prefixes |= PREFIX_DATA; 3353 break; 3354 case 0x67: 3355 prefixes |= PREFIX_ADDR; 3356 break; 3357 case FWAIT_OPCODE: 3358 /* fwait is really an instruction. If there are prefixes 3359 before the fwait, they belong to the fwait, *not* to the 3360 following instruction. */ 3361 if (prefixes || rex) 3362 { 3363 prefixes |= PREFIX_FWAIT; 3364 codep++; 3365 return; 3366 } 3367 prefixes = PREFIX_FWAIT; 3368 break; 3369 default: 3370 return; 3371 } 3372 /* Rex is ignored when followed by another prefix. */ 3373 if (rex) 3374 { 3375 rex_used = rex; 3376 return; 3377 } 3378 rex = newrex; 3379 codep++; 3380 } 3381} 3382 3383/* Return the name of the prefix byte PREF, or NULL if PREF is not a 3384 prefix byte. */ 3385 3386static const char * 3387prefix_name (int pref, int sizeflag) 3388{ 3389 static const char *rexes [16] = 3390 { 3391 "rex", /* 0x40 */ 3392 "rex.B", /* 0x41 */ 3393 "rex.X", /* 0x42 */ 3394 "rex.XB", /* 0x43 */ 3395 "rex.R", /* 0x44 */ 3396 "rex.RB", /* 0x45 */ 3397 "rex.RX", /* 0x46 */ 3398 "rex.RXB", /* 0x47 */ 3399 "rex.W", /* 0x48 */ 3400 "rex.WB", /* 0x49 */ 3401 "rex.WX", /* 0x4a */ 3402 "rex.WXB", /* 0x4b */ 3403 "rex.WR", /* 0x4c */ 3404 "rex.WRB", /* 0x4d */ 3405 "rex.WRX", /* 0x4e */ 3406 "rex.WRXB", /* 0x4f */ 3407 }; 3408 3409 switch (pref) 3410 { 3411 /* REX prefixes family. */ 3412 case 0x40: 3413 case 0x41: 3414 case 0x42: 3415 case 0x43: 3416 case 0x44: 3417 case 0x45: 3418 case 0x46: 3419 case 0x47: 3420 case 0x48: 3421 case 0x49: 3422 case 0x4a: 3423 case 0x4b: 3424 case 0x4c: 3425 case 0x4d: 3426 case 0x4e: 3427 case 0x4f: 3428 return rexes [pref - 0x40]; 3429 case 0xf3: 3430 return "repz"; 3431 case 0xf2: 3432 return "repnz"; 3433 case 0xf0: 3434 return "lock"; 3435 case 0x2e: 3436 return "cs"; 3437 case 0x36: 3438 return "ss"; 3439 case 0x3e: 3440 return "ds"; 3441 case 0x26: 3442 return "es"; 3443 case 0x64: 3444 return "fs"; 3445 case 0x65: 3446 return "gs"; 3447 case 0x66: 3448 return (sizeflag & DFLAG) ? "data16" : "data32"; 3449 case 0x67: 3450 if (address_mode == mode_64bit) 3451 return (sizeflag & AFLAG) ? "addr32" : "addr64"; 3452 else 3453 return (sizeflag & AFLAG) ? "addr16" : "addr32"; 3454 case FWAIT_OPCODE: 3455 return "fwait"; 3456 default: 3457 return NULL; 3458 } 3459} 3460 3461static char op_out[MAX_OPERANDS][100]; 3462static int op_ad, op_index[MAX_OPERANDS]; 3463static int two_source_ops; 3464static bfd_vma op_address[MAX_OPERANDS]; 3465static bfd_vma op_riprel[MAX_OPERANDS]; 3466static bfd_vma start_pc; 3467 3468/* 3469 * On the 386's of 1988, the maximum length of an instruction is 15 bytes. 3470 * (see topic "Redundant prefixes" in the "Differences from 8086" 3471 * section of the "Virtual 8086 Mode" chapter.) 3472 * 'pc' should be the address of this instruction, it will 3473 * be used to print the target address if this is a relative jump or call 3474 * The function returns the length of this instruction in bytes. 3475 */ 3476 3477static char intel_syntax; 3478static char open_char; 3479static char close_char; 3480static char separator_char; 3481static char scale_char; 3482 3483/* Here for backwards compatibility. When gdb stops using 3484 print_insn_i386_att and print_insn_i386_intel these functions can 3485 disappear, and print_insn_i386 be merged into print_insn. */ 3486int 3487print_insn_i386_att (bfd_vma pc, disassemble_info *info) 3488{ 3489 intel_syntax = 0; 3490 3491 return print_insn (pc, info); 3492} 3493 3494int 3495print_insn_i386_intel (bfd_vma pc, disassemble_info *info) 3496{ 3497 intel_syntax = 1; 3498 3499 return print_insn (pc, info); 3500} 3501 3502int 3503print_insn_i386 (bfd_vma pc, disassemble_info *info) 3504{ 3505 intel_syntax = -1; 3506 3507 return print_insn (pc, info); 3508} 3509 3510void 3511print_i386_disassembler_options (FILE *stream) 3512{ 3513 fprintf (stream, _("\n\ 3514The following i386/x86-64 specific disassembler options are supported for use\n\ 3515with the -M switch (multiple options should be separated by commas):\n")); 3516 3517 fprintf (stream, _(" x86-64 Disassemble in 64bit mode\n")); 3518 fprintf (stream, _(" i386 Disassemble in 32bit mode\n")); 3519 fprintf (stream, _(" i8086 Disassemble in 16bit mode\n")); 3520 fprintf (stream, _(" att Display instruction in AT&T syntax\n")); 3521 fprintf (stream, _(" intel Display instruction in Intel syntax\n")); 3522 fprintf (stream, _(" addr64 Assume 64bit address size\n")); 3523 fprintf (stream, _(" addr32 Assume 32bit address size\n")); 3524 fprintf (stream, _(" addr16 Assume 16bit address size\n")); 3525 fprintf (stream, _(" data32 Assume 32bit data size\n")); 3526 fprintf (stream, _(" data16 Assume 16bit data size\n")); 3527 fprintf (stream, _(" suffix Always display instruction suffix in AT&T syntax\n")); 3528} 3529 3530static int 3531print_insn (bfd_vma pc, disassemble_info *info) 3532{ 3533 const struct dis386 *dp; 3534 int i; 3535 char *op_txt[MAX_OPERANDS]; 3536 int needcomma; 3537 unsigned char uses_DATA_prefix, uses_LOCK_prefix; 3538 unsigned char uses_REPNZ_prefix, uses_REPZ_prefix; 3539 int sizeflag; 3540 const char *p; 3541 struct dis_private priv; 3542 unsigned char op; 3543 3544 if (info->mach == bfd_mach_x86_64_intel_syntax 3545 || info->mach == bfd_mach_x86_64) 3546 address_mode = mode_64bit; 3547 else 3548 address_mode = mode_32bit; 3549 3550 if (intel_syntax == (char) -1) 3551 intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax 3552 || info->mach == bfd_mach_x86_64_intel_syntax); 3553 3554 if (info->mach == bfd_mach_i386_i386 3555 || info->mach == bfd_mach_x86_64 3556 || info->mach == bfd_mach_i386_i386_intel_syntax 3557 || info->mach == bfd_mach_x86_64_intel_syntax) 3558 priv.orig_sizeflag = AFLAG | DFLAG; 3559 else if (info->mach == bfd_mach_i386_i8086) 3560 priv.orig_sizeflag = 0; 3561 else 3562 abort (); 3563 3564 for (p = info->disassembler_options; p != NULL; ) 3565 { 3566 if (CONST_STRNEQ (p, "x86-64")) 3567 { 3568 address_mode = mode_64bit; 3569 priv.orig_sizeflag = AFLAG | DFLAG; 3570 } 3571 else if (CONST_STRNEQ (p, "i386")) 3572 { 3573 address_mode = mode_32bit; 3574 priv.orig_sizeflag = AFLAG | DFLAG; 3575 } 3576 else if (CONST_STRNEQ (p, "i8086")) 3577 { 3578 address_mode = mode_16bit; 3579 priv.orig_sizeflag = 0; 3580 } 3581 else if (CONST_STRNEQ (p, "intel")) 3582 { 3583 intel_syntax = 1; 3584 } 3585 else if (CONST_STRNEQ (p, "att")) 3586 { 3587 intel_syntax = 0; 3588 } 3589 else if (CONST_STRNEQ (p, "addr")) 3590 { 3591 if (address_mode == mode_64bit) 3592 { 3593 if (p[4] == '3' && p[5] == '2') 3594 priv.orig_sizeflag &= ~AFLAG; 3595 else if (p[4] == '6' && p[5] == '4') 3596 priv.orig_sizeflag |= AFLAG; 3597 } 3598 else 3599 { 3600 if (p[4] == '1' && p[5] == '6') 3601 priv.orig_sizeflag &= ~AFLAG; 3602 else if (p[4] == '3' && p[5] == '2') 3603 priv.orig_sizeflag |= AFLAG; 3604 } 3605 } 3606 else if (CONST_STRNEQ (p, "data")) 3607 { 3608 if (p[4] == '1' && p[5] == '6') 3609 priv.orig_sizeflag &= ~DFLAG; 3610 else if (p[4] == '3' && p[5] == '2') 3611 priv.orig_sizeflag |= DFLAG; 3612 } 3613 else if (CONST_STRNEQ (p, "suffix")) 3614 priv.orig_sizeflag |= SUFFIX_ALWAYS; 3615 3616 p = strchr (p, ','); 3617 if (p != NULL) 3618 p++; 3619 } 3620 3621 if (intel_syntax) 3622 { 3623 names64 = intel_names64; 3624 names32 = intel_names32; 3625 names16 = intel_names16; 3626 names8 = intel_names8; 3627 names8rex = intel_names8rex; 3628 names_seg = intel_names_seg; 3629 index16 = intel_index16; 3630 open_char = '['; 3631 close_char = ']'; 3632 separator_char = '+'; 3633 scale_char = '*'; 3634 } 3635 else 3636 { 3637 names64 = att_names64; 3638 names32 = att_names32; 3639 names16 = att_names16; 3640 names8 = att_names8; 3641 names8rex = att_names8rex; 3642 names_seg = att_names_seg; 3643 index16 = att_index16; 3644 open_char = '('; 3645 close_char = ')'; 3646 separator_char = ','; 3647 scale_char = ','; 3648 } 3649 3650 /* The output looks better if we put 7 bytes on a line, since that 3651 puts most long word instructions on a single line. */ 3652 info->bytes_per_line = 7; 3653 3654 info->private_data = &priv; 3655 priv.max_fetched = priv.the_buffer; 3656 priv.insn_start = pc; 3657 3658 obuf[0] = 0; 3659 for (i = 0; i < MAX_OPERANDS; ++i) 3660 { 3661 op_out[i][0] = 0; 3662 op_index[i] = -1; 3663 } 3664 3665 the_info = info; 3666 start_pc = pc; 3667 start_codep = priv.the_buffer; 3668 codep = priv.the_buffer; 3669 3670 if (setjmp (priv.bailout) != 0) 3671 { 3672 const char *name; 3673 3674 /* Getting here means we tried for data but didn't get it. That 3675 means we have an incomplete instruction of some sort. Just 3676 print the first byte as a prefix or a .byte pseudo-op. */ 3677 if (codep > priv.the_buffer) 3678 { 3679 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3680 if (name != NULL) 3681 (*info->fprintf_func) (info->stream, "%s", name); 3682 else 3683 { 3684 /* Just print the first byte as a .byte instruction. */ 3685 (*info->fprintf_func) (info->stream, ".byte 0x%x", 3686 (unsigned int) priv.the_buffer[0]); 3687 } 3688 3689 return 1; 3690 } 3691 3692 return -1; 3693 } 3694 3695 obufp = obuf; 3696 ckprefix (); 3697 3698 insn_codep = codep; 3699 sizeflag = priv.orig_sizeflag; 3700 3701 (void) FETCH_DATA (info, codep + 1); 3702 two_source_ops = (*codep == 0x62) || (*codep == 0xc8); 3703 3704 if (((prefixes & PREFIX_FWAIT) 3705 && ((*codep < 0xd8) || (*codep > 0xdf))) 3706 || (rex && rex_used)) 3707 { 3708 const char *name; 3709 3710 /* fwait not followed by floating point instruction, or rex followed 3711 by other prefixes. Print the first prefix. */ 3712 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3713 if (name == NULL) 3714 name = INTERNAL_DISASSEMBLER_ERROR; 3715 (*info->fprintf_func) (info->stream, "%s", name); 3716 return 1; 3717 } 3718 3719 op = 0; 3720 if (*codep == 0x0f) 3721 { 3722 unsigned char threebyte; 3723 (void) FETCH_DATA (info, codep + 2); 3724 threebyte = *++codep; 3725 dp = &dis386_twobyte[threebyte]; 3726 need_modrm = twobyte_has_modrm[*codep]; 3727 uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep]; 3728 uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep]; 3729 uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep]; 3730 uses_LOCK_prefix = (*codep & ~0x02) == 0x20; 3731 codep++; 3732 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3733 { 3734 (void) FETCH_DATA (info, codep + 2); 3735 op = *codep++; 3736 switch (threebyte) 3737 { 3738 case 0x38: 3739 uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op]; 3740 uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op]; 3741 uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op]; 3742 break; 3743 case 0x3a: 3744 uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op]; 3745 uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op]; 3746 uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op]; 3747 break; 3748 default: 3749 break; 3750 } 3751 } 3752 } 3753 else 3754 { 3755 dp = &dis386[*codep]; 3756 need_modrm = onebyte_has_modrm[*codep]; 3757 uses_DATA_prefix = 0; 3758 uses_REPNZ_prefix = 0; 3759 /* pause is 0xf3 0x90. */ 3760 uses_REPZ_prefix = *codep == 0x90; 3761 uses_LOCK_prefix = 0; 3762 codep++; 3763 } 3764 3765 if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ)) 3766 { 3767 oappend ("repz "); 3768 used_prefixes |= PREFIX_REPZ; 3769 } 3770 if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ)) 3771 { 3772 oappend ("repnz "); 3773 used_prefixes |= PREFIX_REPNZ; 3774 } 3775 3776 if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK)) 3777 { 3778 oappend ("lock "); 3779 used_prefixes |= PREFIX_LOCK; 3780 } 3781 3782 if (prefixes & PREFIX_ADDR) 3783 { 3784 sizeflag ^= AFLAG; 3785 if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax) 3786 { 3787 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 3788 oappend ("addr32 "); 3789 else 3790 oappend ("addr16 "); 3791 used_prefixes |= PREFIX_ADDR; 3792 } 3793 } 3794 3795 if (!uses_DATA_prefix && (prefixes & PREFIX_DATA)) 3796 { 3797 sizeflag ^= DFLAG; 3798 if (dp->op[2].bytemode == cond_jump_mode 3799 && dp->op[0].bytemode == v_mode 3800 && !intel_syntax) 3801 { 3802 if (sizeflag & DFLAG) 3803 oappend ("data32 "); 3804 else 3805 oappend ("data16 "); 3806 used_prefixes |= PREFIX_DATA; 3807 } 3808 } 3809 3810 if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) 3811 { 3812 dp = &three_byte_table[dp->op[1].bytemode][op]; 3813 modrm.mod = (*codep >> 6) & 3; 3814 modrm.reg = (*codep >> 3) & 7; 3815 modrm.rm = *codep & 7; 3816 } 3817 else if (need_modrm) 3818 { 3819 (void) FETCH_DATA (info, codep + 1); 3820 modrm.mod = (*codep >> 6) & 3; 3821 modrm.reg = (*codep >> 3) & 7; 3822 modrm.rm = *codep & 7; 3823 } 3824 3825 if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE) 3826 { 3827 dofloat (sizeflag); 3828 } 3829 else 3830 { 3831 int index; 3832 if (dp->name == NULL) 3833 { 3834 switch (dp->op[0].bytemode) 3835 { 3836 case USE_GROUPS: 3837 dp = &grps[dp->op[1].bytemode][modrm.reg]; 3838 break; 3839 3840 case USE_PREFIX_USER_TABLE: 3841 index = 0; 3842 used_prefixes |= (prefixes & PREFIX_REPZ); 3843 if (prefixes & PREFIX_REPZ) 3844 index = 1; 3845 else 3846 { 3847 /* We should check PREFIX_REPNZ and PREFIX_REPZ 3848 before PREFIX_DATA. */ 3849 used_prefixes |= (prefixes & PREFIX_REPNZ); 3850 if (prefixes & PREFIX_REPNZ) 3851 index = 3; 3852 else 3853 { 3854 used_prefixes |= (prefixes & PREFIX_DATA); 3855 if (prefixes & PREFIX_DATA) 3856 index = 2; 3857 } 3858 } 3859 dp = &prefix_user_table[dp->op[1].bytemode][index]; 3860 break; 3861 3862 case X86_64_SPECIAL: 3863 index = address_mode == mode_64bit ? 1 : 0; 3864 dp = &x86_64_table[dp->op[1].bytemode][index]; 3865 break; 3866 3867 default: 3868 oappend (INTERNAL_DISASSEMBLER_ERROR); 3869 break; 3870 } 3871 } 3872 3873 if (putop (dp->name, sizeflag) == 0) 3874 { 3875 for (i = 0; i < MAX_OPERANDS; ++i) 3876 { 3877 obufp = op_out[i]; 3878 op_ad = MAX_OPERANDS - 1 - i; 3879 if (dp->op[i].rtn) 3880 (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag); 3881 } 3882 } 3883 } 3884 3885 /* See if any prefixes were not used. If so, print the first one 3886 separately. If we don't do this, we'll wind up printing an 3887 instruction stream which does not precisely correspond to the 3888 bytes we are disassembling. */ 3889 if ((prefixes & ~used_prefixes) != 0) 3890 { 3891 const char *name; 3892 3893 name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag); 3894 if (name == NULL) 3895 name = INTERNAL_DISASSEMBLER_ERROR; 3896 (*info->fprintf_func) (info->stream, "%s", name); 3897 return 1; 3898 } 3899 if (rex & ~rex_used) 3900 { 3901 const char *name; 3902 name = prefix_name (rex | 0x40, priv.orig_sizeflag); 3903 if (name == NULL) 3904 name = INTERNAL_DISASSEMBLER_ERROR; 3905 (*info->fprintf_func) (info->stream, "%s ", name); 3906 } 3907 3908 obufp = obuf + strlen (obuf); 3909 for (i = strlen (obuf); i < 6; i++) 3910 oappend (" "); 3911 oappend (" "); 3912 (*info->fprintf_func) (info->stream, "%s", obuf); 3913 3914 /* The enter and bound instructions are printed with operands in the same 3915 order as the intel book; everything else is printed in reverse order. */ 3916 if (intel_syntax || two_source_ops) 3917 { 3918 bfd_vma riprel; 3919 3920 for (i = 0; i < MAX_OPERANDS; ++i) 3921 op_txt[i] = op_out[i]; 3922 3923 for (i = 0; i < (MAX_OPERANDS >> 1); ++i) 3924 { 3925 op_ad = op_index[i]; 3926 op_index[i] = op_index[MAX_OPERANDS - 1 - i]; 3927 op_index[MAX_OPERANDS - 1 - i] = op_ad; 3928 riprel = op_riprel[i]; 3929 op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i]; 3930 op_riprel[MAX_OPERANDS - 1 - i] = riprel; 3931 } 3932 } 3933 else 3934 { 3935 for (i = 0; i < MAX_OPERANDS; ++i) 3936 op_txt[MAX_OPERANDS - 1 - i] = op_out[i]; 3937 } 3938 3939 needcomma = 0; 3940 for (i = 0; i < MAX_OPERANDS; ++i) 3941 if (*op_txt[i]) 3942 { 3943 if (needcomma) 3944 (*info->fprintf_func) (info->stream, ","); 3945 if (op_index[i] != -1 && !op_riprel[i]) 3946 (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info); 3947 else 3948 (*info->fprintf_func) (info->stream, "%s", op_txt[i]); 3949 needcomma = 1; 3950 } 3951 3952 for (i = 0; i < MAX_OPERANDS; i++) 3953 if (op_index[i] != -1 && op_riprel[i]) 3954 { 3955 (*info->fprintf_func) (info->stream, " # "); 3956 (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep 3957 + op_address[op_index[i]]), info); 3958 break; 3959 } 3960 return codep - priv.the_buffer; 3961} 3962 3963static const char *float_mem[] = { 3964 /* d8 */ 3965 "fadd{s||s|}", 3966 "fmul{s||s|}", 3967 "fcom{s||s|}", 3968 "fcomp{s||s|}", 3969 "fsub{s||s|}", 3970 "fsubr{s||s|}", 3971 "fdiv{s||s|}", 3972 "fdivr{s||s|}", 3973 /* d9 */ 3974 "fld{s||s|}", 3975 "(bad)", 3976 "fst{s||s|}", 3977 "fstp{s||s|}", 3978 "fldenvIC", 3979 "fldcw", 3980 "fNstenvIC", 3981 "fNstcw", 3982 /* da */ 3983 "fiadd{l||l|}", 3984 "fimul{l||l|}", 3985 "ficom{l||l|}", 3986 "ficomp{l||l|}", 3987 "fisub{l||l|}", 3988 "fisubr{l||l|}", 3989 "fidiv{l||l|}", 3990 "fidivr{l||l|}", 3991 /* db */ 3992 "fild{l||l|}", 3993 "fisttp{l||l|}", 3994 "fist{l||l|}", 3995 "fistp{l||l|}", 3996 "(bad)", 3997 "fld{t||t|}", 3998 "(bad)", 3999 "fstp{t||t|}", 4000 /* dc */ 4001 "fadd{l||l|}", 4002 "fmul{l||l|}", 4003 "fcom{l||l|}", 4004 "fcomp{l||l|}", 4005 "fsub{l||l|}", 4006 "fsubr{l||l|}", 4007 "fdiv{l||l|}", 4008 "fdivr{l||l|}", 4009 /* dd */ 4010 "fld{l||l|}", 4011 "fisttp{ll||ll|}", 4012 "fst{l||l|}", 4013 "fstp{l||l|}", 4014 "frstorIC", 4015 "(bad)", 4016 "fNsaveIC", 4017 "fNstsw", 4018 /* de */ 4019 "fiadd", 4020 "fimul", 4021 "ficom", 4022 "ficomp", 4023 "fisub", 4024 "fisubr", 4025 "fidiv", 4026 "fidivr", 4027 /* df */ 4028 "fild", 4029 "fisttp", 4030 "fist", 4031 "fistp", 4032 "fbld", 4033 "fild{ll||ll|}", 4034 "fbstp", 4035 "fistp{ll||ll|}", 4036}; 4037 4038static const unsigned char float_mem_mode[] = { 4039 /* d8 */ 4040 d_mode, 4041 d_mode, 4042 d_mode, 4043 d_mode, 4044 d_mode, 4045 d_mode, 4046 d_mode, 4047 d_mode, 4048 /* d9 */ 4049 d_mode, 4050 0, 4051 d_mode, 4052 d_mode, 4053 0, 4054 w_mode, 4055 0, 4056 w_mode, 4057 /* da */ 4058 d_mode, 4059 d_mode, 4060 d_mode, 4061 d_mode, 4062 d_mode, 4063 d_mode, 4064 d_mode, 4065 d_mode, 4066 /* db */ 4067 d_mode, 4068 d_mode, 4069 d_mode, 4070 d_mode, 4071 0, 4072 t_mode, 4073 0, 4074 t_mode, 4075 /* dc */ 4076 q_mode, 4077 q_mode, 4078 q_mode, 4079 q_mode, 4080 q_mode, 4081 q_mode, 4082 q_mode, 4083 q_mode, 4084 /* dd */ 4085 q_mode, 4086 q_mode, 4087 q_mode, 4088 q_mode, 4089 0, 4090 0, 4091 0, 4092 w_mode, 4093 /* de */ 4094 w_mode, 4095 w_mode, 4096 w_mode, 4097 w_mode, 4098 w_mode, 4099 w_mode, 4100 w_mode, 4101 w_mode, 4102 /* df */ 4103 w_mode, 4104 w_mode, 4105 w_mode, 4106 w_mode, 4107 t_mode, 4108 q_mode, 4109 t_mode, 4110 q_mode 4111}; 4112 4113#define ST { OP_ST, 0 } 4114#define STi { OP_STi, 0 } 4115 4116#define FGRPd9_2 NULL, { { NULL, 0 } } 4117#define FGRPd9_4 NULL, { { NULL, 1 } } 4118#define FGRPd9_5 NULL, { { NULL, 2 } } 4119#define FGRPd9_6 NULL, { { NULL, 3 } } 4120#define FGRPd9_7 NULL, { { NULL, 4 } } 4121#define FGRPda_5 NULL, { { NULL, 5 } } 4122#define FGRPdb_4 NULL, { { NULL, 6 } } 4123#define FGRPde_3 NULL, { { NULL, 7 } } 4124#define FGRPdf_4 NULL, { { NULL, 8 } } 4125 4126static const struct dis386 float_reg[][8] = { 4127 /* d8 */ 4128 { 4129 { "fadd", { ST, STi } }, 4130 { "fmul", { ST, STi } }, 4131 { "fcom", { STi } }, 4132 { "fcomp", { STi } }, 4133 { "fsub", { ST, STi } }, 4134 { "fsubr", { ST, STi } }, 4135 { "fdiv", { ST, STi } }, 4136 { "fdivr", { ST, STi } }, 4137 }, 4138 /* d9 */ 4139 { 4140 { "fld", { STi } }, 4141 { "fxch", { STi } }, 4142 { FGRPd9_2 }, 4143 { "(bad)", { XX } }, 4144 { FGRPd9_4 }, 4145 { FGRPd9_5 }, 4146 { FGRPd9_6 }, 4147 { FGRPd9_7 }, 4148 }, 4149 /* da */ 4150 { 4151 { "fcmovb", { ST, STi } }, 4152 { "fcmove", { ST, STi } }, 4153 { "fcmovbe",{ ST, STi } }, 4154 { "fcmovu", { ST, STi } }, 4155 { "(bad)", { XX } }, 4156 { FGRPda_5 }, 4157 { "(bad)", { XX } }, 4158 { "(bad)", { XX } }, 4159 }, 4160 /* db */ 4161 { 4162 { "fcmovnb",{ ST, STi } }, 4163 { "fcmovne",{ ST, STi } }, 4164 { "fcmovnbe",{ ST, STi } }, 4165 { "fcmovnu",{ ST, STi } }, 4166 { FGRPdb_4 }, 4167 { "fucomi", { ST, STi } }, 4168 { "fcomi", { ST, STi } }, 4169 { "(bad)", { XX } }, 4170 }, 4171 /* dc */ 4172 { 4173 { "fadd", { STi, ST } }, 4174 { "fmul", { STi, ST } }, 4175 { "(bad)", { XX } }, 4176 { "(bad)", { XX } }, 4177#if SYSV386_COMPAT 4178 { "fsub", { STi, ST } }, 4179 { "fsubr", { STi, ST } }, 4180 { "fdiv", { STi, ST } }, 4181 { "fdivr", { STi, ST } }, 4182#else 4183 { "fsubr", { STi, ST } }, 4184 { "fsub", { STi, ST } }, 4185 { "fdivr", { STi, ST } }, 4186 { "fdiv", { STi, ST } }, 4187#endif 4188 }, 4189 /* dd */ 4190 { 4191 { "ffree", { STi } }, 4192 { "(bad)", { XX } }, 4193 { "fst", { STi } }, 4194 { "fstp", { STi } }, 4195 { "fucom", { STi } }, 4196 { "fucomp", { STi } }, 4197 { "(bad)", { XX } }, 4198 { "(bad)", { XX } }, 4199 }, 4200 /* de */ 4201 { 4202 { "faddp", { STi, ST } }, 4203 { "fmulp", { STi, ST } }, 4204 { "(bad)", { XX } }, 4205 { FGRPde_3 }, 4206#if SYSV386_COMPAT 4207 { "fsubp", { STi, ST } }, 4208 { "fsubrp", { STi, ST } }, 4209 { "fdivp", { STi, ST } }, 4210 { "fdivrp", { STi, ST } }, 4211#else 4212 { "fsubrp", { STi, ST } }, 4213 { "fsubp", { STi, ST } }, 4214 { "fdivrp", { STi, ST } }, 4215 { "fdivp", { STi, ST } }, 4216#endif 4217 }, 4218 /* df */ 4219 { 4220 { "ffreep", { STi } }, 4221 { "(bad)", { XX } }, 4222 { "(bad)", { XX } }, 4223 { "(bad)", { XX } }, 4224 { FGRPdf_4 }, 4225 { "fucomip", { ST, STi } }, 4226 { "fcomip", { ST, STi } }, 4227 { "(bad)", { XX } }, 4228 }, 4229}; 4230 4231static char *fgrps[][8] = { 4232 /* d9_2 0 */ 4233 { 4234 "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4235 }, 4236 4237 /* d9_4 1 */ 4238 { 4239 "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", 4240 }, 4241 4242 /* d9_5 2 */ 4243 { 4244 "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", 4245 }, 4246 4247 /* d9_6 3 */ 4248 { 4249 "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", 4250 }, 4251 4252 /* d9_7 4 */ 4253 { 4254 "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", 4255 }, 4256 4257 /* da_5 5 */ 4258 { 4259 "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4260 }, 4261 4262 /* db_4 6 */ 4263 { 4264 "feni(287 only)","fdisi(287 only)","fNclex","fNinit", 4265 "fNsetpm(287 only)","(bad)","(bad)","(bad)", 4266 }, 4267 4268 /* de_3 7 */ 4269 { 4270 "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4271 }, 4272 4273 /* df_4 8 */ 4274 { 4275 "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", 4276 }, 4277}; 4278 4279static void 4280dofloat (int sizeflag) 4281{ 4282 const struct dis386 *dp; 4283 unsigned char floatop; 4284 4285 floatop = codep[-1]; 4286 4287 if (modrm.mod != 3) 4288 { 4289 int fp_indx = (floatop - 0xd8) * 8 + modrm.reg; 4290 4291 putop (float_mem[fp_indx], sizeflag); 4292 obufp = op_out[0]; 4293 op_ad = 2; 4294 OP_E (float_mem_mode[fp_indx], sizeflag); 4295 return; 4296 } 4297 /* Skip mod/rm byte. */ 4298 MODRM_CHECK; 4299 codep++; 4300 4301 dp = &float_reg[floatop - 0xd8][modrm.reg]; 4302 if (dp->name == NULL) 4303 { 4304 putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag); 4305 4306 /* Instruction fnstsw is only one with strange arg. */ 4307 if (floatop == 0xdf && codep[-1] == 0xe0) 4308 strcpy (op_out[0], names16[0]); 4309 } 4310 else 4311 { 4312 putop (dp->name, sizeflag); 4313 4314 obufp = op_out[0]; 4315 op_ad = 2; 4316 if (dp->op[0].rtn) 4317 (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag); 4318 4319 obufp = op_out[1]; 4320 op_ad = 1; 4321 if (dp->op[1].rtn) 4322 (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag); 4323 } 4324} 4325 4326static void 4327OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4328{ 4329 oappend ("%st" + intel_syntax); 4330} 4331 4332static void 4333OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 4334{ 4335 sprintf (scratchbuf, "%%st(%d)", modrm.rm); 4336 oappend (scratchbuf + intel_syntax); 4337} 4338 4339/* Capital letters in template are macros. */ 4340static int 4341putop (const char *template, int sizeflag) 4342{ 4343 const char *p; 4344 int alt = 0; 4345 4346 for (p = template; *p; p++) 4347 { 4348 switch (*p) 4349 { 4350 default: 4351 *obufp++ = *p; 4352 break; 4353 case '{': 4354 alt = 0; 4355 if (intel_syntax) 4356 alt += 1; 4357 if (address_mode == mode_64bit) 4358 alt += 2; 4359 while (alt != 0) 4360 { 4361 while (*++p != '|') 4362 { 4363 if (*p == '}') 4364 { 4365 /* Alternative not valid. */ 4366 strcpy (obuf, "(bad)"); 4367 obufp = obuf + 5; 4368 return 1; 4369 } 4370 else if (*p == '\0') 4371 abort (); 4372 } 4373 alt--; 4374 } 4375 /* Fall through. */ 4376 case 'I': 4377 alt = 1; 4378 continue; 4379 case '|': 4380 while (*++p != '}') 4381 { 4382 if (*p == '\0') 4383 abort (); 4384 } 4385 break; 4386 case '}': 4387 break; 4388 case 'A': 4389 if (intel_syntax) 4390 break; 4391 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4392 *obufp++ = 'b'; 4393 break; 4394 case 'B': 4395 if (intel_syntax) 4396 break; 4397 if (sizeflag & SUFFIX_ALWAYS) 4398 *obufp++ = 'b'; 4399 break; 4400 case 'C': 4401 if (intel_syntax && !alt) 4402 break; 4403 if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS)) 4404 { 4405 if (sizeflag & DFLAG) 4406 *obufp++ = intel_syntax ? 'd' : 'l'; 4407 else 4408 *obufp++ = intel_syntax ? 'w' : 's'; 4409 used_prefixes |= (prefixes & PREFIX_DATA); 4410 } 4411 break; 4412 case 'D': 4413 if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS)) 4414 break; 4415 USED_REX (REX_W); 4416 if (modrm.mod == 3) 4417 { 4418 if (rex & REX_W) 4419 *obufp++ = 'q'; 4420 else if (sizeflag & DFLAG) 4421 *obufp++ = intel_syntax ? 'd' : 'l'; 4422 else 4423 *obufp++ = 'w'; 4424 used_prefixes |= (prefixes & PREFIX_DATA); 4425 } 4426 else 4427 *obufp++ = 'w'; 4428 break; 4429 case 'E': /* For jcxz/jecxz */ 4430 if (address_mode == mode_64bit) 4431 { 4432 if (sizeflag & AFLAG) 4433 *obufp++ = 'r'; 4434 else 4435 *obufp++ = 'e'; 4436 } 4437 else 4438 if (sizeflag & AFLAG) 4439 *obufp++ = 'e'; 4440 used_prefixes |= (prefixes & PREFIX_ADDR); 4441 break; 4442 case 'F': 4443 if (intel_syntax) 4444 break; 4445 if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS)) 4446 { 4447 if (sizeflag & AFLAG) 4448 *obufp++ = address_mode == mode_64bit ? 'q' : 'l'; 4449 else 4450 *obufp++ = address_mode == mode_64bit ? 'l' : 'w'; 4451 used_prefixes |= (prefixes & PREFIX_ADDR); 4452 } 4453 break; 4454 case 'G': 4455 if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS))) 4456 break; 4457 if ((rex & REX_W) || (sizeflag & DFLAG)) 4458 *obufp++ = 'l'; 4459 else 4460 *obufp++ = 'w'; 4461 if (!(rex & REX_W)) 4462 used_prefixes |= (prefixes & PREFIX_DATA); 4463 break; 4464 case 'H': 4465 if (intel_syntax) 4466 break; 4467 if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS 4468 || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) 4469 { 4470 used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); 4471 *obufp++ = ','; 4472 *obufp++ = 'p'; 4473 if (prefixes & PREFIX_DS) 4474 *obufp++ = 't'; 4475 else 4476 *obufp++ = 'n'; 4477 } 4478 break; 4479 case 'J': 4480 if (intel_syntax) 4481 break; 4482 *obufp++ = 'l'; 4483 break; 4484 case 'K': 4485 USED_REX (REX_W); 4486 if (rex & REX_W) 4487 *obufp++ = 'q'; 4488 else 4489 *obufp++ = 'd'; 4490 break; 4491 case 'Z': 4492 if (intel_syntax) 4493 break; 4494 if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS)) 4495 { 4496 *obufp++ = 'q'; 4497 break; 4498 } 4499 /* Fall through. */ 4500 case 'L': 4501 if (intel_syntax) 4502 break; 4503 if (sizeflag & SUFFIX_ALWAYS) 4504 *obufp++ = 'l'; 4505 break; 4506 case 'N': 4507 if ((prefixes & PREFIX_FWAIT) == 0) 4508 *obufp++ = 'n'; 4509 else 4510 used_prefixes |= PREFIX_FWAIT; 4511 break; 4512 case 'O': 4513 USED_REX (REX_W); 4514 if (rex & REX_W) 4515 *obufp++ = 'o'; 4516 else if (intel_syntax && (sizeflag & DFLAG)) 4517 *obufp++ = 'q'; 4518 else 4519 *obufp++ = 'd'; 4520 if (!(rex & REX_W)) 4521 used_prefixes |= (prefixes & PREFIX_DATA); 4522 break; 4523 case 'T': 4524 if (intel_syntax) 4525 break; 4526 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4527 { 4528 *obufp++ = 'q'; 4529 break; 4530 } 4531 /* Fall through. */ 4532 case 'P': 4533 if (intel_syntax) 4534 break; 4535 if ((prefixes & PREFIX_DATA) 4536 || (rex & REX_W) 4537 || (sizeflag & SUFFIX_ALWAYS)) 4538 { 4539 USED_REX (REX_W); 4540 if (rex & REX_W) 4541 *obufp++ = 'q'; 4542 else 4543 { 4544 if (sizeflag & DFLAG) 4545 *obufp++ = 'l'; 4546 else 4547 *obufp++ = 'w'; 4548 } 4549 used_prefixes |= (prefixes & PREFIX_DATA); 4550 } 4551 break; 4552 case 'U': 4553 if (intel_syntax) 4554 break; 4555 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4556 { 4557 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4558 *obufp++ = 'q'; 4559 break; 4560 } 4561 /* Fall through. */ 4562 case 'Q': 4563 if (intel_syntax && !alt) 4564 break; 4565 USED_REX (REX_W); 4566 if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) 4567 { 4568 if (rex & REX_W) 4569 *obufp++ = 'q'; 4570 else 4571 { 4572 if (sizeflag & DFLAG) 4573 *obufp++ = intel_syntax ? 'd' : 'l'; 4574 else 4575 *obufp++ = 'w'; 4576 } 4577 used_prefixes |= (prefixes & PREFIX_DATA); 4578 } 4579 break; 4580 case 'R': 4581 USED_REX (REX_W); 4582 if (rex & REX_W) 4583 *obufp++ = 'q'; 4584 else if (sizeflag & DFLAG) 4585 { 4586 if (intel_syntax) 4587 *obufp++ = 'd'; 4588 else 4589 *obufp++ = 'l'; 4590 } 4591 else 4592 *obufp++ = 'w'; 4593 if (intel_syntax && !p[1] 4594 && ((rex & REX_W) || (sizeflag & DFLAG))) 4595 *obufp++ = 'e'; 4596 if (!(rex & REX_W)) 4597 used_prefixes |= (prefixes & PREFIX_DATA); 4598 break; 4599 case 'V': 4600 if (intel_syntax) 4601 break; 4602 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4603 { 4604 if (sizeflag & SUFFIX_ALWAYS) 4605 *obufp++ = 'q'; 4606 break; 4607 } 4608 /* Fall through. */ 4609 case 'S': 4610 if (intel_syntax) 4611 break; 4612 if (sizeflag & SUFFIX_ALWAYS) 4613 { 4614 if (rex & REX_W) 4615 *obufp++ = 'q'; 4616 else 4617 { 4618 if (sizeflag & DFLAG) 4619 *obufp++ = 'l'; 4620 else 4621 *obufp++ = 'w'; 4622 used_prefixes |= (prefixes & PREFIX_DATA); 4623 } 4624 } 4625 break; 4626 case 'X': 4627 if (prefixes & PREFIX_DATA) 4628 *obufp++ = 'd'; 4629 else 4630 *obufp++ = 's'; 4631 used_prefixes |= (prefixes & PREFIX_DATA); 4632 break; 4633 case 'Y': 4634 if (intel_syntax) 4635 break; 4636 if (rex & REX_W) 4637 { 4638 USED_REX (REX_W); 4639 *obufp++ = 'q'; 4640 } 4641 break; 4642 /* implicit operand size 'l' for i386 or 'q' for x86-64 */ 4643 case 'W': 4644 /* operand size flag for cwtl, cbtw */ 4645 USED_REX (REX_W); 4646 if (rex & REX_W) 4647 { 4648 if (intel_syntax) 4649 *obufp++ = 'd'; 4650 else 4651 *obufp++ = 'l'; 4652 } 4653 else if (sizeflag & DFLAG) 4654 *obufp++ = 'w'; 4655 else 4656 *obufp++ = 'b'; 4657 if (!(rex & REX_W)) 4658 used_prefixes |= (prefixes & PREFIX_DATA); 4659 break; 4660 } 4661 alt = 0; 4662 } 4663 *obufp = 0; 4664 return 0; 4665} 4666 4667static void 4668oappend (const char *s) 4669{ 4670 strcpy (obufp, s); 4671 obufp += strlen (s); 4672} 4673 4674static void 4675append_seg (void) 4676{ 4677 if (prefixes & PREFIX_CS) 4678 { 4679 used_prefixes |= PREFIX_CS; 4680 oappend ("%cs:" + intel_syntax); 4681 } 4682 if (prefixes & PREFIX_DS) 4683 { 4684 used_prefixes |= PREFIX_DS; 4685 oappend ("%ds:" + intel_syntax); 4686 } 4687 if (prefixes & PREFIX_SS) 4688 { 4689 used_prefixes |= PREFIX_SS; 4690 oappend ("%ss:" + intel_syntax); 4691 } 4692 if (prefixes & PREFIX_ES) 4693 { 4694 used_prefixes |= PREFIX_ES; 4695 oappend ("%es:" + intel_syntax); 4696 } 4697 if (prefixes & PREFIX_FS) 4698 { 4699 used_prefixes |= PREFIX_FS; 4700 oappend ("%fs:" + intel_syntax); 4701 } 4702 if (prefixes & PREFIX_GS) 4703 { 4704 used_prefixes |= PREFIX_GS; 4705 oappend ("%gs:" + intel_syntax); 4706 } 4707} 4708 4709static void 4710OP_indirE (int bytemode, int sizeflag) 4711{ 4712 if (!intel_syntax) 4713 oappend ("*"); 4714 OP_E (bytemode, sizeflag); 4715} 4716 4717static void 4718print_operand_value (char *buf, int hex, bfd_vma disp) 4719{ 4720 if (address_mode == mode_64bit) 4721 { 4722 if (hex) 4723 { 4724 char tmp[30]; 4725 int i; 4726 buf[0] = '0'; 4727 buf[1] = 'x'; 4728 sprintf_vma (tmp, disp); 4729 for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); 4730 strcpy (buf + 2, tmp + i); 4731 } 4732 else 4733 { 4734 bfd_signed_vma v = disp; 4735 char tmp[30]; 4736 int i; 4737 if (v < 0) 4738 { 4739 *(buf++) = '-'; 4740 v = -disp; 4741 /* Check for possible overflow on 0x8000000000000000. */ 4742 if (v < 0) 4743 { 4744 strcpy (buf, "9223372036854775808"); 4745 return; 4746 } 4747 } 4748 if (!v) 4749 { 4750 strcpy (buf, "0"); 4751 return; 4752 } 4753 4754 i = 0; 4755 tmp[29] = 0; 4756 while (v) 4757 { 4758 tmp[28 - i] = (v % 10) + '0'; 4759 v /= 10; 4760 i++; 4761 } 4762 strcpy (buf, tmp + 29 - i); 4763 } 4764 } 4765 else 4766 { 4767 if (hex) 4768 sprintf (buf, "0x%x", (unsigned int) disp); 4769 else 4770 sprintf (buf, "%d", (int) disp); 4771 } 4772} 4773 4774/* Put DISP in BUF as signed hex number. */ 4775 4776static void 4777print_displacement (char *buf, bfd_vma disp) 4778{ 4779 bfd_signed_vma val = disp; 4780 char tmp[30]; 4781 int i, j = 0; 4782 4783 if (val < 0) 4784 { 4785 buf[j++] = '-'; 4786 val = -disp; 4787 4788 /* Check for possible overflow. */ 4789 if (val < 0) 4790 { 4791 switch (address_mode) 4792 { 4793 case mode_64bit: 4794 strcpy (buf + j, "0x8000000000000000"); 4795 break; 4796 case mode_32bit: 4797 strcpy (buf + j, "0x80000000"); 4798 break; 4799 case mode_16bit: 4800 strcpy (buf + j, "0x8000"); 4801 break; 4802 } 4803 return; 4804 } 4805 } 4806 4807 buf[j++] = '0'; 4808 buf[j++] = 'x'; 4809 4810 sprintf_vma (tmp, val); 4811 for (i = 0; tmp[i] == '0'; i++) 4812 continue; 4813 if (tmp[i] == '\0') 4814 i--; 4815 strcpy (buf + j, tmp + i); 4816} 4817 4818static void 4819intel_operand_size (int bytemode, int sizeflag) 4820{ 4821 switch (bytemode) 4822 { 4823 case b_mode: 4824 case dqb_mode: 4825 oappend ("BYTE PTR "); 4826 break; 4827 case w_mode: 4828 case dqw_mode: 4829 oappend ("WORD PTR "); 4830 break; 4831 case stack_v_mode: 4832 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4833 { 4834 oappend ("QWORD PTR "); 4835 used_prefixes |= (prefixes & PREFIX_DATA); 4836 break; 4837 } 4838 /* FALLTHRU */ 4839 case v_mode: 4840 case dq_mode: 4841 USED_REX (REX_W); 4842 if (rex & REX_W) 4843 oappend ("QWORD PTR "); 4844 else if ((sizeflag & DFLAG) || bytemode == dq_mode) 4845 oappend ("DWORD PTR "); 4846 else 4847 oappend ("WORD PTR "); 4848 used_prefixes |= (prefixes & PREFIX_DATA); 4849 break; 4850 case z_mode: 4851 if ((rex & REX_W) || (sizeflag & DFLAG)) 4852 *obufp++ = 'D'; 4853 oappend ("WORD PTR "); 4854 if (!(rex & REX_W)) 4855 used_prefixes |= (prefixes & PREFIX_DATA); 4856 break; 4857 case d_mode: 4858 case dqd_mode: 4859 oappend ("DWORD PTR "); 4860 break; 4861 case q_mode: 4862 oappend ("QWORD PTR "); 4863 break; 4864 case m_mode: 4865 if (address_mode == mode_64bit) 4866 oappend ("QWORD PTR "); 4867 else 4868 oappend ("DWORD PTR "); 4869 break; 4870 case f_mode: 4871 if (sizeflag & DFLAG) 4872 oappend ("FWORD PTR "); 4873 else 4874 oappend ("DWORD PTR "); 4875 used_prefixes |= (prefixes & PREFIX_DATA); 4876 break; 4877 case t_mode: 4878 oappend ("TBYTE PTR "); 4879 break; 4880 case x_mode: 4881 oappend ("XMMWORD PTR "); 4882 break; 4883 case o_mode: 4884 oappend ("OWORD PTR "); 4885 break; 4886 default: 4887 break; 4888 } 4889} 4890 4891static void 4892OP_E (int bytemode, int sizeflag) 4893{ 4894 bfd_vma disp; 4895 int add = 0; 4896 int riprel = 0; 4897 USED_REX (REX_B); 4898 if (rex & REX_B) 4899 add += 8; 4900 4901 /* Skip mod/rm byte. */ 4902 MODRM_CHECK; 4903 codep++; 4904 4905 if (modrm.mod == 3) 4906 { 4907 switch (bytemode) 4908 { 4909 case b_mode: 4910 USED_REX (0); 4911 if (rex) 4912 oappend (names8rex[modrm.rm + add]); 4913 else 4914 oappend (names8[modrm.rm + add]); 4915 break; 4916 case w_mode: 4917 oappend (names16[modrm.rm + add]); 4918 break; 4919 case d_mode: 4920 oappend (names32[modrm.rm + add]); 4921 break; 4922 case q_mode: 4923 oappend (names64[modrm.rm + add]); 4924 break; 4925 case m_mode: 4926 if (address_mode == mode_64bit) 4927 oappend (names64[modrm.rm + add]); 4928 else 4929 oappend (names32[modrm.rm + add]); 4930 break; 4931 case stack_v_mode: 4932 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 4933 { 4934 oappend (names64[modrm.rm + add]); 4935 used_prefixes |= (prefixes & PREFIX_DATA); 4936 break; 4937 } 4938 bytemode = v_mode; 4939 /* FALLTHRU */ 4940 case v_mode: 4941 case dq_mode: 4942 case dqb_mode: 4943 case dqd_mode: 4944 case dqw_mode: 4945 USED_REX (REX_W); 4946 if (rex & REX_W) 4947 oappend (names64[modrm.rm + add]); 4948 else if ((sizeflag & DFLAG) || bytemode != v_mode) 4949 oappend (names32[modrm.rm + add]); 4950 else 4951 oappend (names16[modrm.rm + add]); 4952 used_prefixes |= (prefixes & PREFIX_DATA); 4953 break; 4954 case 0: 4955 break; 4956 default: 4957 oappend (INTERNAL_DISASSEMBLER_ERROR); 4958 break; 4959 } 4960 return; 4961 } 4962 4963 disp = 0; 4964 if (intel_syntax) 4965 intel_operand_size (bytemode, sizeflag); 4966 append_seg (); 4967 4968 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 4969 { 4970 /* 32/64 bit address mode */ 4971 int havedisp; 4972 int havesib; 4973 int havebase; 4974 int base; 4975 int index = 0; 4976 int scale = 0; 4977 4978 havesib = 0; 4979 havebase = 1; 4980 base = modrm.rm; 4981 4982 if (base == 4) 4983 { 4984 havesib = 1; 4985 (void) FETCH_DATA (the_info, codep + 1); 4986 index = (*codep >> 3) & 7; 4987 if (address_mode == mode_64bit || index != 0x4) 4988 /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */ 4989 scale = (*codep >> 6) & 3; 4990 base = *codep & 7; 4991 USED_REX (REX_X); 4992 if (rex & REX_X) 4993 index += 8; 4994 codep++; 4995 } 4996 base += add; 4997 4998 switch (modrm.mod) 4999 { 5000 case 0: 5001 if ((base & 7) == 5) 5002 { 5003 havebase = 0; 5004 if (address_mode == mode_64bit && !havesib) 5005 riprel = 1; 5006 disp = get32s (); 5007 } 5008 break; 5009 case 1: 5010 FETCH_DATA (the_info, codep + 1); 5011 disp = *codep++; 5012 if ((disp & 0x80) != 0) 5013 disp -= 0x100; 5014 break; 5015 case 2: 5016 disp = get32s (); 5017 break; 5018 } 5019 5020 havedisp = havebase || (havesib && (index != 4 || scale != 0)); 5021 5022 if (!intel_syntax) 5023 if (modrm.mod != 0 || (base & 7) == 5) 5024 { 5025 if (havedisp || riprel) 5026 print_displacement (scratchbuf, disp); 5027 else 5028 print_operand_value (scratchbuf, 1, disp); 5029 oappend (scratchbuf); 5030 if (riprel) 5031 { 5032 set_op (disp, 1); 5033 oappend ("(%rip)"); 5034 } 5035 } 5036 5037 if (havedisp || (intel_syntax && riprel)) 5038 { 5039 *obufp++ = open_char; 5040 if (intel_syntax && riprel) 5041 { 5042 set_op (disp, 1); 5043 oappend ("rip"); 5044 } 5045 *obufp = '\0'; 5046 if (havebase) 5047 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5048 ? names64[base] : names32[base]); 5049 if (havesib) 5050 { 5051 if (index != 4) 5052 { 5053 if (!intel_syntax || havebase) 5054 { 5055 *obufp++ = separator_char; 5056 *obufp = '\0'; 5057 } 5058 oappend (address_mode == mode_64bit && (sizeflag & AFLAG) 5059 ? names64[index] : names32[index]); 5060 } 5061 if (scale != 0 || (!intel_syntax && index != 4)) 5062 { 5063 *obufp++ = scale_char; 5064 *obufp = '\0'; 5065 sprintf (scratchbuf, "%d", 1 << scale); 5066 oappend (scratchbuf); 5067 } 5068 } 5069 if (intel_syntax 5070 && (disp || modrm.mod != 0 || (base & 7) == 5)) 5071 { 5072 if ((bfd_signed_vma) disp >= 0) 5073 { 5074 *obufp++ = '+'; 5075 *obufp = '\0'; 5076 } 5077 else if (modrm.mod != 1) 5078 { 5079 *obufp++ = '-'; 5080 *obufp = '\0'; 5081 disp = - (bfd_signed_vma) disp; 5082 } 5083 5084 print_displacement (scratchbuf, disp); 5085 oappend (scratchbuf); 5086 } 5087 5088 *obufp++ = close_char; 5089 *obufp = '\0'; 5090 } 5091 else if (intel_syntax) 5092 { 5093 if (modrm.mod != 0 || (base & 7) == 5) 5094 { 5095 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5096 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5097 ; 5098 else 5099 { 5100 oappend (names_seg[ds_reg - es_reg]); 5101 oappend (":"); 5102 } 5103 print_operand_value (scratchbuf, 1, disp); 5104 oappend (scratchbuf); 5105 } 5106 } 5107 } 5108 else 5109 { /* 16 bit address mode */ 5110 switch (modrm.mod) 5111 { 5112 case 0: 5113 if (modrm.rm == 6) 5114 { 5115 disp = get16 (); 5116 if ((disp & 0x8000) != 0) 5117 disp -= 0x10000; 5118 } 5119 break; 5120 case 1: 5121 FETCH_DATA (the_info, codep + 1); 5122 disp = *codep++; 5123 if ((disp & 0x80) != 0) 5124 disp -= 0x100; 5125 break; 5126 case 2: 5127 disp = get16 (); 5128 if ((disp & 0x8000) != 0) 5129 disp -= 0x10000; 5130 break; 5131 } 5132 5133 if (!intel_syntax) 5134 if (modrm.mod != 0 || modrm.rm == 6) 5135 { 5136 print_displacement (scratchbuf, disp); 5137 oappend (scratchbuf); 5138 } 5139 5140 if (modrm.mod != 0 || modrm.rm != 6) 5141 { 5142 *obufp++ = open_char; 5143 *obufp = '\0'; 5144 oappend (index16[modrm.rm]); 5145 if (intel_syntax 5146 && (disp || modrm.mod != 0 || modrm.rm == 6)) 5147 { 5148 if ((bfd_signed_vma) disp >= 0) 5149 { 5150 *obufp++ = '+'; 5151 *obufp = '\0'; 5152 } 5153 else if (modrm.mod != 1) 5154 { 5155 *obufp++ = '-'; 5156 *obufp = '\0'; 5157 disp = - (bfd_signed_vma) disp; 5158 } 5159 5160 print_displacement (scratchbuf, disp); 5161 oappend (scratchbuf); 5162 } 5163 5164 *obufp++ = close_char; 5165 *obufp = '\0'; 5166 } 5167 else if (intel_syntax) 5168 { 5169 if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5170 | PREFIX_ES | PREFIX_FS | PREFIX_GS)) 5171 ; 5172 else 5173 { 5174 oappend (names_seg[ds_reg - es_reg]); 5175 oappend (":"); 5176 } 5177 print_operand_value (scratchbuf, 1, disp & 0xffff); 5178 oappend (scratchbuf); 5179 } 5180 } 5181} 5182 5183static void 5184OP_G (int bytemode, int sizeflag) 5185{ 5186 int add = 0; 5187 USED_REX (REX_R); 5188 if (rex & REX_R) 5189 add += 8; 5190 switch (bytemode) 5191 { 5192 case b_mode: 5193 USED_REX (0); 5194 if (rex) 5195 oappend (names8rex[modrm.reg + add]); 5196 else 5197 oappend (names8[modrm.reg + add]); 5198 break; 5199 case w_mode: 5200 oappend (names16[modrm.reg + add]); 5201 break; 5202 case d_mode: 5203 oappend (names32[modrm.reg + add]); 5204 break; 5205 case q_mode: 5206 oappend (names64[modrm.reg + add]); 5207 break; 5208 case v_mode: 5209 case dq_mode: 5210 case dqb_mode: 5211 case dqd_mode: 5212 case dqw_mode: 5213 USED_REX (REX_W); 5214 if (rex & REX_W) 5215 oappend (names64[modrm.reg + add]); 5216 else if ((sizeflag & DFLAG) || bytemode != v_mode) 5217 oappend (names32[modrm.reg + add]); 5218 else 5219 oappend (names16[modrm.reg + add]); 5220 used_prefixes |= (prefixes & PREFIX_DATA); 5221 break; 5222 case m_mode: 5223 if (address_mode == mode_64bit) 5224 oappend (names64[modrm.reg + add]); 5225 else 5226 oappend (names32[modrm.reg + add]); 5227 break; 5228 default: 5229 oappend (INTERNAL_DISASSEMBLER_ERROR); 5230 break; 5231 } 5232} 5233 5234static bfd_vma 5235get64 (void) 5236{ 5237 bfd_vma x; 5238#ifdef BFD64 5239 unsigned int a; 5240 unsigned int b; 5241 5242 (void) FETCH_DATA (the_info, codep + 8); 5243 a = *codep++ & 0xff; 5244 a |= (*codep++ & 0xff) << 8; 5245 a |= (*codep++ & 0xff) << 16; 5246 a |= (*codep++ & 0xff) << 24; 5247 b = *codep++ & 0xff; 5248 b |= (*codep++ & 0xff) << 8; 5249 b |= (*codep++ & 0xff) << 16; 5250 b |= (*codep++ & 0xff) << 24; 5251 x = a + ((bfd_vma) b << 32); 5252#else 5253 abort (); 5254 x = 0; 5255#endif 5256 return x; 5257} 5258 5259static bfd_signed_vma 5260get32 (void) 5261{ 5262 bfd_signed_vma x = 0; 5263 5264 (void) FETCH_DATA (the_info, codep + 4); 5265 x = *codep++ & (bfd_signed_vma) 0xff; 5266 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5267 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5268 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5269 return x; 5270} 5271 5272static bfd_signed_vma 5273get32s (void) 5274{ 5275 bfd_signed_vma x = 0; 5276 5277 (void) FETCH_DATA (the_info, codep + 4); 5278 x = *codep++ & (bfd_signed_vma) 0xff; 5279 x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; 5280 x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; 5281 x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; 5282 5283 x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); 5284 5285 return x; 5286} 5287 5288static int 5289get16 (void) 5290{ 5291 int x = 0; 5292 5293 (void) FETCH_DATA (the_info, codep + 2); 5294 x = *codep++ & 0xff; 5295 x |= (*codep++ & 0xff) << 8; 5296 return x; 5297} 5298 5299static void 5300set_op (bfd_vma op, int riprel) 5301{ 5302 op_index[op_ad] = op_ad; 5303 if (address_mode == mode_64bit) 5304 { 5305 op_address[op_ad] = op; 5306 op_riprel[op_ad] = riprel; 5307 } 5308 else 5309 { 5310 /* Mask to get a 32-bit address. */ 5311 op_address[op_ad] = op & 0xffffffff; 5312 op_riprel[op_ad] = riprel & 0xffffffff; 5313 } 5314} 5315 5316static void 5317OP_REG (int code, int sizeflag) 5318{ 5319 const char *s; 5320 int add = 0; 5321 USED_REX (REX_B); 5322 if (rex & REX_B) 5323 add = 8; 5324 5325 switch (code) 5326 { 5327 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5328 case sp_reg: case bp_reg: case si_reg: case di_reg: 5329 s = names16[code - ax_reg + add]; 5330 break; 5331 case es_reg: case ss_reg: case cs_reg: 5332 case ds_reg: case fs_reg: case gs_reg: 5333 s = names_seg[code - es_reg + add]; 5334 break; 5335 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5336 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5337 USED_REX (0); 5338 if (rex) 5339 s = names8rex[code - al_reg + add]; 5340 else 5341 s = names8[code - al_reg]; 5342 break; 5343 case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: 5344 case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: 5345 if (address_mode == mode_64bit && (sizeflag & DFLAG)) 5346 { 5347 s = names64[code - rAX_reg + add]; 5348 break; 5349 } 5350 code += eAX_reg - rAX_reg; 5351 /* Fall through. */ 5352 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5353 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5354 USED_REX (REX_W); 5355 if (rex & REX_W) 5356 s = names64[code - eAX_reg + add]; 5357 else if (sizeflag & DFLAG) 5358 s = names32[code - eAX_reg + add]; 5359 else 5360 s = names16[code - eAX_reg + add]; 5361 used_prefixes |= (prefixes & PREFIX_DATA); 5362 break; 5363 default: 5364 s = INTERNAL_DISASSEMBLER_ERROR; 5365 break; 5366 } 5367 oappend (s); 5368} 5369 5370static void 5371OP_IMREG (int code, int sizeflag) 5372{ 5373 const char *s; 5374 5375 switch (code) 5376 { 5377 case indir_dx_reg: 5378 if (intel_syntax) 5379 s = "dx"; 5380 else 5381 s = "(%dx)"; 5382 break; 5383 case ax_reg: case cx_reg: case dx_reg: case bx_reg: 5384 case sp_reg: case bp_reg: case si_reg: case di_reg: 5385 s = names16[code - ax_reg]; 5386 break; 5387 case es_reg: case ss_reg: case cs_reg: 5388 case ds_reg: case fs_reg: case gs_reg: 5389 s = names_seg[code - es_reg]; 5390 break; 5391 case al_reg: case ah_reg: case cl_reg: case ch_reg: 5392 case dl_reg: case dh_reg: case bl_reg: case bh_reg: 5393 USED_REX (0); 5394 if (rex) 5395 s = names8rex[code - al_reg]; 5396 else 5397 s = names8[code - al_reg]; 5398 break; 5399 case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: 5400 case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: 5401 USED_REX (REX_W); 5402 if (rex & REX_W) 5403 s = names64[code - eAX_reg]; 5404 else if (sizeflag & DFLAG) 5405 s = names32[code - eAX_reg]; 5406 else 5407 s = names16[code - eAX_reg]; 5408 used_prefixes |= (prefixes & PREFIX_DATA); 5409 break; 5410 case z_mode_ax_reg: 5411 if ((rex & REX_W) || (sizeflag & DFLAG)) 5412 s = *names32; 5413 else 5414 s = *names16; 5415 if (!(rex & REX_W)) 5416 used_prefixes |= (prefixes & PREFIX_DATA); 5417 break; 5418 default: 5419 s = INTERNAL_DISASSEMBLER_ERROR; 5420 break; 5421 } 5422 oappend (s); 5423} 5424 5425static void 5426OP_I (int bytemode, int sizeflag) 5427{ 5428 bfd_signed_vma op; 5429 bfd_signed_vma mask = -1; 5430 5431 switch (bytemode) 5432 { 5433 case b_mode: 5434 FETCH_DATA (the_info, codep + 1); 5435 op = *codep++; 5436 mask = 0xff; 5437 break; 5438 case q_mode: 5439 if (address_mode == mode_64bit) 5440 { 5441 op = get32s (); 5442 break; 5443 } 5444 /* Fall through. */ 5445 case v_mode: 5446 USED_REX (REX_W); 5447 if (rex & REX_W) 5448 op = get32s (); 5449 else if (sizeflag & DFLAG) 5450 { 5451 op = get32 (); 5452 mask = 0xffffffff; 5453 } 5454 else 5455 { 5456 op = get16 (); 5457 mask = 0xfffff; 5458 } 5459 used_prefixes |= (prefixes & PREFIX_DATA); 5460 break; 5461 case w_mode: 5462 mask = 0xfffff; 5463 op = get16 (); 5464 break; 5465 case const_1_mode: 5466 if (intel_syntax) 5467 oappend ("1"); 5468 return; 5469 default: 5470 oappend (INTERNAL_DISASSEMBLER_ERROR); 5471 return; 5472 } 5473 5474 op &= mask; 5475 scratchbuf[0] = '$'; 5476 print_operand_value (scratchbuf + 1, 1, op); 5477 oappend (scratchbuf + intel_syntax); 5478 scratchbuf[0] = '\0'; 5479} 5480 5481static void 5482OP_I64 (int bytemode, int sizeflag) 5483{ 5484 bfd_signed_vma op; 5485 bfd_signed_vma mask = -1; 5486 5487 if (address_mode != mode_64bit) 5488 { 5489 OP_I (bytemode, sizeflag); 5490 return; 5491 } 5492 5493 switch (bytemode) 5494 { 5495 case b_mode: 5496 FETCH_DATA (the_info, codep + 1); 5497 op = *codep++; 5498 mask = 0xff; 5499 break; 5500 case v_mode: 5501 USED_REX (REX_W); 5502 if (rex & REX_W) 5503 op = get64 (); 5504 else if (sizeflag & DFLAG) 5505 { 5506 op = get32 (); 5507 mask = 0xffffffff; 5508 } 5509 else 5510 { 5511 op = get16 (); 5512 mask = 0xfffff; 5513 } 5514 used_prefixes |= (prefixes & PREFIX_DATA); 5515 break; 5516 case w_mode: 5517 mask = 0xfffff; 5518 op = get16 (); 5519 break; 5520 default: 5521 oappend (INTERNAL_DISASSEMBLER_ERROR); 5522 return; 5523 } 5524 5525 op &= mask; 5526 scratchbuf[0] = '$'; 5527 print_operand_value (scratchbuf + 1, 1, op); 5528 oappend (scratchbuf + intel_syntax); 5529 scratchbuf[0] = '\0'; 5530} 5531 5532static void 5533OP_sI (int bytemode, int sizeflag) 5534{ 5535 bfd_signed_vma op; 5536 bfd_signed_vma mask = -1; 5537 5538 switch (bytemode) 5539 { 5540 case b_mode: 5541 FETCH_DATA (the_info, codep + 1); 5542 op = *codep++; 5543 if ((op & 0x80) != 0) 5544 op -= 0x100; 5545 mask = 0xffffffff; 5546 break; 5547 case v_mode: 5548 USED_REX (REX_W); 5549 if (rex & REX_W) 5550 op = get32s (); 5551 else if (sizeflag & DFLAG) 5552 { 5553 op = get32s (); 5554 mask = 0xffffffff; 5555 } 5556 else 5557 { 5558 mask = 0xffffffff; 5559 op = get16 (); 5560 if ((op & 0x8000) != 0) 5561 op -= 0x10000; 5562 } 5563 used_prefixes |= (prefixes & PREFIX_DATA); 5564 break; 5565 case w_mode: 5566 op = get16 (); 5567 mask = 0xffffffff; 5568 if ((op & 0x8000) != 0) 5569 op -= 0x10000; 5570 break; 5571 default: 5572 oappend (INTERNAL_DISASSEMBLER_ERROR); 5573 return; 5574 } 5575 5576 scratchbuf[0] = '$'; 5577 print_operand_value (scratchbuf + 1, 1, op); 5578 oappend (scratchbuf + intel_syntax); 5579} 5580 5581static void 5582OP_J (int bytemode, int sizeflag) 5583{ 5584 bfd_vma disp; 5585 bfd_vma mask = -1; 5586 bfd_vma segment = 0; 5587 5588 switch (bytemode) 5589 { 5590 case b_mode: 5591 FETCH_DATA (the_info, codep + 1); 5592 disp = *codep++; 5593 if ((disp & 0x80) != 0) 5594 disp -= 0x100; 5595 break; 5596 case v_mode: 5597 if ((sizeflag & DFLAG) || (rex & REX_W)) 5598 disp = get32s (); 5599 else 5600 { 5601 disp = get16 (); 5602 if ((disp & 0x8000) != 0) 5603 disp -= 0x10000; 5604 /* In 16bit mode, address is wrapped around at 64k within 5605 the same segment. Otherwise, a data16 prefix on a jump 5606 instruction means that the pc is masked to 16 bits after 5607 the displacement is added! */ 5608 mask = 0xffff; 5609 if ((prefixes & PREFIX_DATA) == 0) 5610 segment = ((start_pc + codep - start_codep) 5611 & ~((bfd_vma) 0xffff)); 5612 } 5613 used_prefixes |= (prefixes & PREFIX_DATA); 5614 break; 5615 default: 5616 oappend (INTERNAL_DISASSEMBLER_ERROR); 5617 return; 5618 } 5619 disp = ((start_pc + codep - start_codep + disp) & mask) | segment; 5620 set_op (disp, 0); 5621 print_operand_value (scratchbuf, 1, disp); 5622 oappend (scratchbuf); 5623} 5624 5625static void 5626OP_SEG (int bytemode, int sizeflag) 5627{ 5628 if (bytemode == w_mode) 5629 oappend (names_seg[modrm.reg]); 5630 else 5631 OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag); 5632} 5633 5634static void 5635OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) 5636{ 5637 int seg, offset; 5638 5639 if (sizeflag & DFLAG) 5640 { 5641 offset = get32 (); 5642 seg = get16 (); 5643 } 5644 else 5645 { 5646 offset = get16 (); 5647 seg = get16 (); 5648 } 5649 used_prefixes |= (prefixes & PREFIX_DATA); 5650 if (intel_syntax) 5651 sprintf (scratchbuf, "0x%x:0x%x", seg, offset); 5652 else 5653 sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset); 5654 oappend (scratchbuf); 5655} 5656 5657static void 5658OP_OFF (int bytemode, int sizeflag) 5659{ 5660 bfd_vma off; 5661 5662 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5663 intel_operand_size (bytemode, sizeflag); 5664 append_seg (); 5665 5666 if ((sizeflag & AFLAG) || address_mode == mode_64bit) 5667 off = get32 (); 5668 else 5669 off = get16 (); 5670 5671 if (intel_syntax) 5672 { 5673 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5674 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5675 { 5676 oappend (names_seg[ds_reg - es_reg]); 5677 oappend (":"); 5678 } 5679 } 5680 print_operand_value (scratchbuf, 1, off); 5681 oappend (scratchbuf); 5682} 5683 5684static void 5685OP_OFF64 (int bytemode, int sizeflag) 5686{ 5687 bfd_vma off; 5688 5689 if (address_mode != mode_64bit 5690 || (prefixes & PREFIX_ADDR)) 5691 { 5692 OP_OFF (bytemode, sizeflag); 5693 return; 5694 } 5695 5696 if (intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 5697 intel_operand_size (bytemode, sizeflag); 5698 append_seg (); 5699 5700 off = get64 (); 5701 5702 if (intel_syntax) 5703 { 5704 if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS 5705 | PREFIX_ES | PREFIX_FS | PREFIX_GS))) 5706 { 5707 oappend (names_seg[ds_reg - es_reg]); 5708 oappend (":"); 5709 } 5710 } 5711 print_operand_value (scratchbuf, 1, off); 5712 oappend (scratchbuf); 5713} 5714 5715static void 5716ptr_reg (int code, int sizeflag) 5717{ 5718 const char *s; 5719 5720 *obufp++ = open_char; 5721 used_prefixes |= (prefixes & PREFIX_ADDR); 5722 if (address_mode == mode_64bit) 5723 { 5724 if (!(sizeflag & AFLAG)) 5725 s = names32[code - eAX_reg]; 5726 else 5727 s = names64[code - eAX_reg]; 5728 } 5729 else if (sizeflag & AFLAG) 5730 s = names32[code - eAX_reg]; 5731 else 5732 s = names16[code - eAX_reg]; 5733 oappend (s); 5734 *obufp++ = close_char; 5735 *obufp = 0; 5736} 5737 5738static void 5739OP_ESreg (int code, int sizeflag) 5740{ 5741 if (intel_syntax) 5742 { 5743 switch (codep[-1]) 5744 { 5745 case 0x6d: /* insw/insl */ 5746 intel_operand_size (z_mode, sizeflag); 5747 break; 5748 case 0xa5: /* movsw/movsl/movsq */ 5749 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5750 case 0xab: /* stosw/stosl */ 5751 case 0xaf: /* scasw/scasl */ 5752 intel_operand_size (v_mode, sizeflag); 5753 break; 5754 default: 5755 intel_operand_size (b_mode, sizeflag); 5756 } 5757 } 5758 oappend ("%es:" + intel_syntax); 5759 ptr_reg (code, sizeflag); 5760} 5761 5762static void 5763OP_DSreg (int code, int sizeflag) 5764{ 5765 if (intel_syntax) 5766 { 5767 switch (codep[-1]) 5768 { 5769 case 0x6f: /* outsw/outsl */ 5770 intel_operand_size (z_mode, sizeflag); 5771 break; 5772 case 0xa5: /* movsw/movsl/movsq */ 5773 case 0xa7: /* cmpsw/cmpsl/cmpsq */ 5774 case 0xad: /* lodsw/lodsl/lodsq */ 5775 intel_operand_size (v_mode, sizeflag); 5776 break; 5777 default: 5778 intel_operand_size (b_mode, sizeflag); 5779 } 5780 } 5781 if ((prefixes 5782 & (PREFIX_CS 5783 | PREFIX_DS 5784 | PREFIX_SS 5785 | PREFIX_ES 5786 | PREFIX_FS 5787 | PREFIX_GS)) == 0) 5788 prefixes |= PREFIX_DS; 5789 append_seg (); 5790 ptr_reg (code, sizeflag); 5791} 5792 5793static void 5794OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5795{ 5796 int add = 0; 5797 if (rex & REX_R) 5798 { 5799 USED_REX (REX_R); 5800 add = 8; 5801 } 5802 else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK)) 5803 { 5804 used_prefixes |= PREFIX_LOCK; 5805 add = 8; 5806 } 5807 sprintf (scratchbuf, "%%cr%d", modrm.reg + add); 5808 oappend (scratchbuf + intel_syntax); 5809} 5810 5811static void 5812OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5813{ 5814 int add = 0; 5815 USED_REX (REX_R); 5816 if (rex & REX_R) 5817 add = 8; 5818 if (intel_syntax) 5819 sprintf (scratchbuf, "db%d", modrm.reg + add); 5820 else 5821 sprintf (scratchbuf, "%%db%d", modrm.reg + add); 5822 oappend (scratchbuf); 5823} 5824 5825static void 5826OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5827{ 5828 sprintf (scratchbuf, "%%tr%d", modrm.reg); 5829 oappend (scratchbuf + intel_syntax); 5830} 5831 5832static void 5833OP_R (int bytemode, int sizeflag) 5834{ 5835 if (modrm.mod == 3) 5836 OP_E (bytemode, sizeflag); 5837 else 5838 BadOp (); 5839} 5840 5841static void 5842OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5843{ 5844 used_prefixes |= (prefixes & PREFIX_DATA); 5845 if (prefixes & PREFIX_DATA) 5846 { 5847 int add = 0; 5848 USED_REX (REX_R); 5849 if (rex & REX_R) 5850 add = 8; 5851 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add); 5852 } 5853 else 5854 sprintf (scratchbuf, "%%mm%d", modrm.reg); 5855 oappend (scratchbuf + intel_syntax); 5856} 5857 5858static void 5859OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5860{ 5861 int add = 0; 5862 USED_REX (REX_R); 5863 if (rex & REX_R) 5864 add = 8; 5865 sprintf (scratchbuf, "%%xmm%d", modrm.reg + add); 5866 oappend (scratchbuf + intel_syntax); 5867} 5868 5869static void 5870OP_EM (int bytemode, int sizeflag) 5871{ 5872 if (modrm.mod != 3) 5873 { 5874 if (intel_syntax && bytemode == v_mode) 5875 { 5876 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5877 used_prefixes |= (prefixes & PREFIX_DATA); 5878 } 5879 OP_E (bytemode, sizeflag); 5880 return; 5881 } 5882 5883 /* Skip mod/rm byte. */ 5884 MODRM_CHECK; 5885 codep++; 5886 used_prefixes |= (prefixes & PREFIX_DATA); 5887 if (prefixes & PREFIX_DATA) 5888 { 5889 int add = 0; 5890 5891 USED_REX (REX_B); 5892 if (rex & REX_B) 5893 add = 8; 5894 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add); 5895 } 5896 else 5897 sprintf (scratchbuf, "%%mm%d", modrm.rm); 5898 oappend (scratchbuf + intel_syntax); 5899} 5900 5901/* cvt* are the only instructions in sse2 which have 5902 both SSE and MMX operands and also have 0x66 prefix 5903 in their opcode. 0x66 was originally used to differentiate 5904 between SSE and MMX instruction(operands). So we have to handle the 5905 cvt* separately using OP_EMC and OP_MXC */ 5906static void 5907OP_EMC (int bytemode, int sizeflag) 5908{ 5909 if (modrm.mod != 3) 5910 { 5911 if (intel_syntax && bytemode == v_mode) 5912 { 5913 bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; 5914 used_prefixes |= (prefixes & PREFIX_DATA); 5915 } 5916 OP_E (bytemode, sizeflag); 5917 return; 5918 } 5919 5920 /* Skip mod/rm byte. */ 5921 MODRM_CHECK; 5922 codep++; 5923 used_prefixes |= (prefixes & PREFIX_DATA); 5924 sprintf (scratchbuf, "%%mm%d", modrm.rm); 5925 oappend (scratchbuf + intel_syntax); 5926} 5927 5928static void 5929OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 5930{ 5931 used_prefixes |= (prefixes & PREFIX_DATA); 5932 sprintf (scratchbuf, "%%mm%d", modrm.reg); 5933 oappend (scratchbuf + intel_syntax); 5934} 5935 5936static void 5937OP_EX (int bytemode, int sizeflag) 5938{ 5939 int add = 0; 5940 if (modrm.mod != 3) 5941 { 5942 OP_E (bytemode, sizeflag); 5943 return; 5944 } 5945 USED_REX (REX_B); 5946 if (rex & REX_B) 5947 add = 8; 5948 5949 /* Skip mod/rm byte. */ 5950 MODRM_CHECK; 5951 codep++; 5952 sprintf (scratchbuf, "%%xmm%d", modrm.rm + add); 5953 oappend (scratchbuf + intel_syntax); 5954} 5955 5956static void 5957OP_MS (int bytemode, int sizeflag) 5958{ 5959 if (modrm.mod == 3) 5960 OP_EM (bytemode, sizeflag); 5961 else 5962 BadOp (); 5963} 5964 5965static void 5966OP_XS (int bytemode, int sizeflag) 5967{ 5968 if (modrm.mod == 3) 5969 OP_EX (bytemode, sizeflag); 5970 else 5971 BadOp (); 5972} 5973 5974static void 5975OP_M (int bytemode, int sizeflag) 5976{ 5977 if (modrm.mod == 3) 5978 /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst,invept,invvpid modrm */ 5979 BadOp (); 5980 else 5981 OP_E (bytemode, sizeflag); 5982} 5983 5984static void 5985OP_0f07 (int bytemode, int sizeflag) 5986{ 5987 if (modrm.mod != 3 || modrm.rm != 0) 5988 BadOp (); 5989 else 5990 OP_E (bytemode, sizeflag); 5991} 5992 5993static void 5994OP_0fae (int bytemode, int sizeflag) 5995{ 5996 if (modrm.mod == 3) 5997 { 5998 if (modrm.reg == 7) 5999 strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); 6000 else if (modrm.reg == 6) 6001 strcpy (obuf + strlen (obuf) - sizeof ("xsaveopt") + 1, "mfence"); 6002 else if (modrm.reg == 5) 6003 strcpy (obuf + strlen (obuf) - sizeof ("xrstor") + 1, "lfence"); 6004 6005 if (modrm.reg < 5 || modrm.rm != 0) 6006 { 6007 BadOp (); /* bad sfence, mfence, or lfence */ 6008 return; 6009 } 6010 bytemode = 0; 6011 } 6012 6013 OP_E (bytemode, sizeflag); 6014} 6015 6016/* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in 6017 32bit mode and "xchg %rax,%rax" in 64bit mode. */ 6018 6019static void 6020NOP_Fixup1 (int bytemode, int sizeflag) 6021{ 6022 if ((prefixes & PREFIX_DATA) != 0 6023 || (rex != 0 6024 && rex != 0x48 6025 && address_mode == mode_64bit)) 6026 OP_REG (bytemode, sizeflag); 6027 else 6028 strcpy (obuf, "nop"); 6029} 6030 6031static void 6032NOP_Fixup2 (int bytemode, int sizeflag) 6033{ 6034 if ((prefixes & PREFIX_DATA) != 0 6035 || (rex != 0 6036 && rex != 0x48 6037 && address_mode == mode_64bit)) 6038 OP_IMREG (bytemode, sizeflag); 6039} 6040 6041static const char *const Suffix3DNow[] = { 6042/* 00 */ NULL, NULL, NULL, NULL, 6043/* 04 */ NULL, NULL, NULL, NULL, 6044/* 08 */ NULL, NULL, NULL, NULL, 6045/* 0C */ "pi2fw", "pi2fd", NULL, NULL, 6046/* 10 */ NULL, NULL, NULL, NULL, 6047/* 14 */ NULL, NULL, NULL, NULL, 6048/* 18 */ NULL, NULL, NULL, NULL, 6049/* 1C */ "pf2iw", "pf2id", NULL, NULL, 6050/* 20 */ NULL, NULL, NULL, NULL, 6051/* 24 */ NULL, NULL, NULL, NULL, 6052/* 28 */ NULL, NULL, NULL, NULL, 6053/* 2C */ NULL, NULL, NULL, NULL, 6054/* 30 */ NULL, NULL, NULL, NULL, 6055/* 34 */ NULL, NULL, NULL, NULL, 6056/* 38 */ NULL, NULL, NULL, NULL, 6057/* 3C */ NULL, NULL, NULL, NULL, 6058/* 40 */ NULL, NULL, NULL, NULL, 6059/* 44 */ NULL, NULL, NULL, NULL, 6060/* 48 */ NULL, NULL, NULL, NULL, 6061/* 4C */ NULL, NULL, NULL, NULL, 6062/* 50 */ NULL, NULL, NULL, NULL, 6063/* 54 */ NULL, NULL, NULL, NULL, 6064/* 58 */ NULL, NULL, NULL, NULL, 6065/* 5C */ NULL, NULL, NULL, NULL, 6066/* 60 */ NULL, NULL, NULL, NULL, 6067/* 64 */ NULL, NULL, NULL, NULL, 6068/* 68 */ NULL, NULL, NULL, NULL, 6069/* 6C */ NULL, NULL, NULL, NULL, 6070/* 70 */ NULL, NULL, NULL, NULL, 6071/* 74 */ NULL, NULL, NULL, NULL, 6072/* 78 */ NULL, NULL, NULL, NULL, 6073/* 7C */ NULL, NULL, NULL, NULL, 6074/* 80 */ NULL, NULL, NULL, NULL, 6075/* 84 */ NULL, NULL, NULL, NULL, 6076/* 88 */ NULL, NULL, "pfnacc", NULL, 6077/* 8C */ NULL, NULL, "pfpnacc", NULL, 6078/* 90 */ "pfcmpge", NULL, NULL, NULL, 6079/* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", 6080/* 98 */ NULL, NULL, "pfsub", NULL, 6081/* 9C */ NULL, NULL, "pfadd", NULL, 6082/* A0 */ "pfcmpgt", NULL, NULL, NULL, 6083/* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", 6084/* A8 */ NULL, NULL, "pfsubr", NULL, 6085/* AC */ NULL, NULL, "pfacc", NULL, 6086/* B0 */ "pfcmpeq", NULL, NULL, NULL, 6087/* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw", 6088/* B8 */ NULL, NULL, NULL, "pswapd", 6089/* BC */ NULL, NULL, NULL, "pavgusb", 6090/* C0 */ NULL, NULL, NULL, NULL, 6091/* C4 */ NULL, NULL, NULL, NULL, 6092/* C8 */ NULL, NULL, NULL, NULL, 6093/* CC */ NULL, NULL, NULL, NULL, 6094/* D0 */ NULL, NULL, NULL, NULL, 6095/* D4 */ NULL, NULL, NULL, NULL, 6096/* D8 */ NULL, NULL, NULL, NULL, 6097/* DC */ NULL, NULL, NULL, NULL, 6098/* E0 */ NULL, NULL, NULL, NULL, 6099/* E4 */ NULL, NULL, NULL, NULL, 6100/* E8 */ NULL, NULL, NULL, NULL, 6101/* EC */ NULL, NULL, NULL, NULL, 6102/* F0 */ NULL, NULL, NULL, NULL, 6103/* F4 */ NULL, NULL, NULL, NULL, 6104/* F8 */ NULL, NULL, NULL, NULL, 6105/* FC */ NULL, NULL, NULL, NULL, 6106}; 6107 6108static void 6109OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6110{ 6111 const char *mnemonic; 6112 6113 (void) FETCH_DATA (the_info, codep + 1); 6114 /* AMD 3DNow! instructions are specified by an opcode suffix in the 6115 place where an 8-bit immediate would normally go. ie. the last 6116 byte of the instruction. */ 6117 obufp = obuf + strlen (obuf); 6118 mnemonic = Suffix3DNow[*codep++ & 0xff]; 6119 if (mnemonic) 6120 oappend (mnemonic); 6121 else 6122 { 6123 /* Since a variable sized modrm/sib chunk is between the start 6124 of the opcode (0x0f0f) and the opcode suffix, we need to do 6125 all the modrm processing first, and don't know until now that 6126 we have a bad opcode. This necessitates some cleaning up. */ 6127 op_out[0][0] = '\0'; 6128 op_out[1][0] = '\0'; 6129 BadOp (); 6130 } 6131} 6132 6133static const char *simd_cmp_op[] = { 6134 "eq", 6135 "lt", 6136 "le", 6137 "unord", 6138 "neq", 6139 "nlt", 6140 "nle", 6141 "ord" 6142}; 6143 6144static void 6145OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) 6146{ 6147 unsigned int cmp_type; 6148 6149 (void) FETCH_DATA (the_info, codep + 1); 6150 obufp = obuf + strlen (obuf); 6151 cmp_type = *codep++ & 0xff; 6152 if (cmp_type < 8) 6153 { 6154 char suffix1 = 'p', suffix2 = 's'; 6155 used_prefixes |= (prefixes & PREFIX_REPZ); 6156 if (prefixes & PREFIX_REPZ) 6157 suffix1 = 's'; 6158 else 6159 { 6160 used_prefixes |= (prefixes & PREFIX_DATA); 6161 if (prefixes & PREFIX_DATA) 6162 suffix2 = 'd'; 6163 else 6164 { 6165 used_prefixes |= (prefixes & PREFIX_REPNZ); 6166 if (prefixes & PREFIX_REPNZ) 6167 suffix1 = 's', suffix2 = 'd'; 6168 } 6169 } 6170 sprintf (scratchbuf, "cmp%s%c%c", 6171 simd_cmp_op[cmp_type], suffix1, suffix2); 6172 used_prefixes |= (prefixes & PREFIX_REPZ); 6173 oappend (scratchbuf); 6174 } 6175 else 6176 { 6177 /* We have a bad extension byte. Clean up. */ 6178 op_out[0][0] = '\0'; 6179 op_out[1][0] = '\0'; 6180 BadOp (); 6181 } 6182} 6183 6184static void 6185SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) 6186{ 6187 /* Change movlps/movhps to movhlps/movlhps for 2 register operand 6188 forms of these instructions. */ 6189 if (modrm.mod == 3) 6190 { 6191 char *p = obuf + strlen (obuf); 6192 *(p + 1) = '\0'; 6193 *p = *(p - 1); 6194 *(p - 1) = *(p - 2); 6195 *(p - 2) = *(p - 3); 6196 *(p - 3) = extrachar; 6197 } 6198} 6199 6200static void 6201PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6202{ 6203 if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1) 6204 { 6205 /* Override "sidt". */ 6206 size_t olen = strlen (obuf); 6207 char *p = obuf + olen - 4; 6208 const char **names = (address_mode == mode_64bit 6209 ? names64 : names32); 6210 6211 /* We might have a suffix when disassembling with -Msuffix. */ 6212 if (*p == 'i') 6213 --p; 6214 6215 /* Remove "addr16/addr32" if we aren't in Intel mode. */ 6216 if (!intel_syntax 6217 && (prefixes & PREFIX_ADDR) 6218 && olen >= (4 + 7) 6219 && *(p - 1) == ' ' 6220 && CONST_STRNEQ (p - 7, "addr") 6221 && (CONST_STRNEQ (p - 3, "16") 6222 || CONST_STRNEQ (p - 3, "32"))) 6223 p -= 7; 6224 6225 if (modrm.rm) 6226 { 6227 /* mwait %eax,%ecx */ 6228 strcpy (p, "mwait"); 6229 if (!intel_syntax) 6230 strcpy (op_out[0], names[0]); 6231 } 6232 else 6233 { 6234 /* monitor %eax,%ecx,%edx" */ 6235 strcpy (p, "monitor"); 6236 if (!intel_syntax) 6237 { 6238 const char **op1_names; 6239 if (!(prefixes & PREFIX_ADDR)) 6240 op1_names = (address_mode == mode_16bit 6241 ? names16 : names); 6242 else 6243 { 6244 op1_names = (address_mode != mode_32bit 6245 ? names32 : names16); 6246 used_prefixes |= PREFIX_ADDR; 6247 } 6248 strcpy (op_out[0], op1_names[0]); 6249 strcpy (op_out[2], names[2]); 6250 } 6251 } 6252 if (!intel_syntax) 6253 { 6254 strcpy (op_out[1], names[1]); 6255 two_source_ops = 1; 6256 } 6257 6258 codep++; 6259 } 6260 else if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 3) 6261 { 6262 size_t olen = strlen (obuf); 6263 char *p = obuf + olen - 4; 6264 if (*codep == 0xca) 6265 strcpy (p, "clac"); 6266 else if (*codep == 0xcb) 6267 strcpy (p, "stac"); 6268 codep++; 6269 } 6270 else 6271 OP_M (0, sizeflag); 6272} 6273 6274static void 6275XCR_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6276{ 6277 if (modrm.mod == 3 && modrm.reg == 2 && modrm.rm <= 1) 6278 { 6279 /* Override "lgdt". */ 6280 size_t olen = strlen (obuf); 6281 char *p = obuf + olen - 4; 6282 6283 /* We might have a suffix when disassembling with -Msuffix. */ 6284 if (*p == 'i') 6285 --p; 6286 6287 /* Remove "addr16/addr32" if we aren't in Intel mode. */ 6288 if (!intel_syntax 6289 && (prefixes & PREFIX_ADDR) 6290 && olen >= (4 + 7) 6291 && *(p - 1) == ' ' 6292 && CONST_STRNEQ (p - 7, "addr") 6293 && (CONST_STRNEQ (p - 3, "16") 6294 || CONST_STRNEQ (p - 3, "32"))) 6295 p -= 7; 6296 6297 if (modrm.rm) 6298 { 6299 strcpy (p, "xsetbv"); 6300 } 6301 else 6302 { 6303 strcpy (p, "xgetbv"); 6304 } 6305 6306 codep++; 6307 } 6308 else 6309 OP_M (0, sizeflag); 6310} 6311static void 6312SVME_Fixup (int bytemode, int sizeflag) 6313{ 6314 const char *alt; 6315 char *p; 6316 6317 switch (*codep) 6318 { 6319 case 0xd8: 6320 alt = "vmrun"; 6321 break; 6322 case 0xd9: 6323 alt = "vmmcall"; 6324 break; 6325 case 0xda: 6326 alt = "vmload"; 6327 break; 6328 case 0xdb: 6329 alt = "vmsave"; 6330 break; 6331 case 0xdc: 6332 alt = "stgi"; 6333 break; 6334 case 0xdd: 6335 alt = "clgi"; 6336 break; 6337 case 0xde: 6338 alt = "skinit"; 6339 break; 6340 case 0xdf: 6341 alt = "invlpga"; 6342 break; 6343 default: 6344 OP_M (bytemode, sizeflag); 6345 return; 6346 } 6347 /* Override "lidt". */ 6348 p = obuf + strlen (obuf) - 4; 6349 /* We might have a suffix. */ 6350 if (*p == 'i') 6351 --p; 6352 strcpy (p, alt); 6353 if (!(prefixes & PREFIX_ADDR)) 6354 { 6355 ++codep; 6356 return; 6357 } 6358 used_prefixes |= PREFIX_ADDR; 6359 switch (*codep++) 6360 { 6361 case 0xdf: 6362 strcpy (op_out[1], names32[1]); 6363 two_source_ops = 1; 6364 /* Fall through. */ 6365 case 0xd8: 6366 case 0xda: 6367 case 0xdb: 6368 *obufp++ = open_char; 6369 if (address_mode == mode_64bit || (sizeflag & AFLAG)) 6370 alt = names32[0]; 6371 else 6372 alt = names16[0]; 6373 strcpy (obufp, alt); 6374 obufp += strlen (alt); 6375 *obufp++ = close_char; 6376 *obufp = '\0'; 6377 break; 6378 } 6379} 6380 6381static void 6382INVLPG_Fixup (int bytemode, int sizeflag) 6383{ 6384 const char *alt; 6385 6386 switch (*codep) 6387 { 6388 case 0xf8: 6389 alt = "swapgs"; 6390 break; 6391 case 0xf9: 6392 alt = "rdtscp"; 6393 break; 6394 default: 6395 OP_M (bytemode, sizeflag); 6396 return; 6397 } 6398 /* Override "invlpg". */ 6399 strcpy (obuf + strlen (obuf) - 6, alt); 6400 codep++; 6401} 6402 6403static void 6404BadOp (void) 6405{ 6406 /* Throw away prefixes and 1st. opcode byte. */ 6407 codep = insn_codep + 1; 6408 oappend ("(bad)"); 6409} 6410 6411static void 6412VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) 6413{ 6414 if (modrm.mod == 3 6415 && modrm.reg == 0 6416 && modrm.rm >=1 6417 && modrm.rm <= 4) 6418 { 6419 /* Override "sgdt". */ 6420 char *p = obuf + strlen (obuf) - 4; 6421 6422 /* We might have a suffix when disassembling with -Msuffix. */ 6423 if (*p == 'g') 6424 --p; 6425 6426 switch (modrm.rm) 6427 { 6428 case 1: 6429 strcpy (p, "vmcall"); 6430 break; 6431 case 2: 6432 strcpy (p, "vmlaunch"); 6433 break; 6434 case 3: 6435 strcpy (p, "vmresume"); 6436 break; 6437 case 4: 6438 strcpy (p, "vmxoff"); 6439 break; 6440 } 6441 6442 codep++; 6443 } 6444 else 6445 OP_E (0, sizeflag); 6446} 6447 6448static void 6449OP_VMX (int bytemode, int sizeflag) 6450{ 6451 if (modrm.mod == 3) 6452 { 6453 strcpy (obuf, "rdrand"); 6454 OP_E (v_mode, sizeflag); 6455 } 6456 else 6457 { 6458 used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ)); 6459 if (prefixes & PREFIX_DATA) 6460 strcpy (obuf, "vmclear"); 6461 else if (prefixes & PREFIX_REPZ) 6462 strcpy (obuf, "vmxon"); 6463 else 6464 strcpy (obuf, "vmptrld"); 6465 OP_E (bytemode, sizeflag); 6466 } 6467} 6468 6469static void 6470REP_Fixup (int bytemode, int sizeflag) 6471{ 6472 /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs, 6473 lods and stos. */ 6474 size_t ilen = 0; 6475 6476 if (prefixes & PREFIX_REPZ) 6477 switch (*insn_codep) 6478 { 6479 case 0x6e: /* outsb */ 6480 case 0x6f: /* outsw/outsl */ 6481 case 0xa4: /* movsb */ 6482 case 0xa5: /* movsw/movsl/movsq */ 6483 if (!intel_syntax) 6484 ilen = 5; 6485 else 6486 ilen = 4; 6487 break; 6488 case 0xaa: /* stosb */ 6489 case 0xab: /* stosw/stosl/stosq */ 6490 case 0xac: /* lodsb */ 6491 case 0xad: /* lodsw/lodsl/lodsq */ 6492 if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS)) 6493 ilen = 5; 6494 else 6495 ilen = 4; 6496 break; 6497 case 0x6c: /* insb */ 6498 case 0x6d: /* insl/insw */ 6499 if (!intel_syntax) 6500 ilen = 4; 6501 else 6502 ilen = 3; 6503 break; 6504 default: 6505 abort (); 6506 break; 6507 } 6508 6509 if (ilen != 0) 6510 { 6511 size_t olen; 6512 char *p; 6513 6514 olen = strlen (obuf); 6515 p = obuf + olen - ilen - 1 - 4; 6516 /* Handle "repz [addr16|addr32]". */ 6517 if ((prefixes & PREFIX_ADDR)) 6518 p -= 1 + 6; 6519 6520 memmove (p + 3, p + 4, olen - (p + 3 - obuf)); 6521 } 6522 6523 switch (bytemode) 6524 { 6525 case al_reg: 6526 case eAX_reg: 6527 case indir_dx_reg: 6528 OP_IMREG (bytemode, sizeflag); 6529 break; 6530 case eDI_reg: 6531 OP_ESreg (bytemode, sizeflag); 6532 break; 6533 case eSI_reg: 6534 OP_DSreg (bytemode, sizeflag); 6535 break; 6536 default: 6537 abort (); 6538 break; 6539 } 6540} 6541 6542static void 6543CMPXCHG8B_Fixup (int bytemode, int sizeflag) 6544{ 6545 USED_REX (REX_W); 6546 if (rex & REX_W) 6547 { 6548 /* Change cmpxchg8b to cmpxchg16b. */ 6549 char *p = obuf + strlen (obuf) - 2; 6550 strcpy (p, "16b"); 6551 bytemode = o_mode; 6552 } 6553 OP_M (bytemode, sizeflag); 6554} 6555 6556static void 6557XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED) 6558{ 6559 sprintf (scratchbuf, "%%xmm%d", reg); 6560 oappend (scratchbuf + intel_syntax); 6561} 6562 6563static void 6564CRC32_Fixup (int bytemode, int sizeflag) 6565{ 6566 /* Add proper suffix to "crc32". */ 6567 char *p = obuf + strlen (obuf); 6568 6569 switch (bytemode) 6570 { 6571 case b_mode: 6572 if (intel_syntax) 6573 break; 6574 6575 *p++ = 'b'; 6576 break; 6577 case v_mode: 6578 if (intel_syntax) 6579 break; 6580 6581 USED_REX (REX_W); 6582 if (rex & REX_W) 6583 *p++ = 'q'; 6584 else if (sizeflag & DFLAG) 6585 *p++ = 'l'; 6586 else 6587 *p++ = 'w'; 6588 used_prefixes |= (prefixes & PREFIX_DATA); 6589 break; 6590 default: 6591 oappend (INTERNAL_DISASSEMBLER_ERROR); 6592 break; 6593 } 6594 *p = '\0'; 6595 6596 if (modrm.mod == 3) 6597 { 6598 int add; 6599 6600 /* Skip mod/rm byte. */ 6601 MODRM_CHECK; 6602 codep++; 6603 6604 USED_REX (REX_B); 6605 add = (rex & REX_B) ? 8 : 0; 6606 if (bytemode == b_mode) 6607 { 6608 USED_REX (0); 6609 if (rex) 6610 oappend (names8rex[modrm.rm + add]); 6611 else 6612 oappend (names8[modrm.rm + add]); 6613 } 6614 else 6615 { 6616 USED_REX (REX_W); 6617 if (rex & REX_W) 6618 oappend (names64[modrm.rm + add]); 6619 else if ((prefixes & PREFIX_DATA)) 6620 oappend (names16[modrm.rm + add]); 6621 else 6622 oappend (names32[modrm.rm + add]); 6623 } 6624 } 6625 else 6626 OP_E (bytemode, sizeflag); 6627} 6628