12007-07-03 Nathan Sidwell <nathan@codesourcery.com> 2 3 * m68k-dis.c (fetch_arg): Add E. Replace length switch with 4 direct masking. 5 (print_ins_arg): Add j & K operand types. 6 (match_insn_m68k): Check and skip initial '.' arg character. 7 (m68k_scan_mask): Likewise. 8 * m68k-opc.c (m68k_opcodes): Add coprocessor instructions. 9 102007-07-02 Alan Modra <amodra@bigpond.net.au> 11 12 * Makefile.am: Run "make dep-am". 13 * Makefile.in: Regenerate. 14 * aclocal.m4: Regenerate. 15 * config.in: Regenerate. 16 * po/POTFILES.in: Regenerate. 17 * po/opcodes.pot: Regenerate. 18 192007-06-30 H.J. Lu <hongjiu.lu@intel.com> 20 21 * aclocal.m4: Regenerated. 22 * Makefile.in: Likewise. 23 242007-06-29 H.J. Lu <hongjiu.lu@intel.com> 25 26 * i386-reg.tbl: Remove spaces before comments. 27 282007-06-29 M R Swami Reddy <MR.Swami.Reddy@nsc.com> 29 30 * cr16-opc.c: New file. 31 * cr16-dis.c: New file. 32 * Makefile.am: Entries for cr16. 33 * Makefile.in: Regenerate. 34 * cofigure.in: Add cr16 target information. 35 * configure : Regenerate. 36 * disassemble.c: Add cr16 target information. 37 382007-06-28 H.J. Lu <hongjiu.lu@intel.com> 39 40 * Makefile.am (HFILES): Add i386-opc.h and i386-tbl.h. 41 (CFILES): Add i386-gen.c. 42 (i386-gen): New rule. 43 (i386-gen.o): Likewise. 44 (i386-tbl.h): Likewise. 45 Run "make dep-am". 46 * Makefile.in: Regenerated. 47 48 * i386-gen.c: New file. 49 * i386-opc.tbl: Likewise. 50 * i386-reg.tbl: Likewise. 51 * i386-tbl.h: Likewise. 52 53 * i386-opc.c: Include "i386-tbl.h". 54 (i386_optab): Removed. 55 (i386_regtab): Likewise. 56 (i386_regtab_size): Likewise. 57 582007-06-26 Paul Brook <paul@codesourcery.com> 59 60 * arm-dis.c (coprocessor_opcodes): Add fmxr/fmrx mvfr0/mvfr1. 61 622007-06-25 H.J. Lu <hongjiu.lu@intel.com> 63 64 * i386-opc.h (regKludge): Renamed to ... 65 (RegKludge): This. 66 67 * i386-opc.c (i386_optab): Replace regKludge with RegKludge. 68 692007-06-23 H.J. Lu <hongjiu.lu@intel.com> 70 71 PR binutils/4667 72 * i386-dis.c (EX): Removed. 73 (EMd): New. 74 (EMq): Likewise. 75 (EXd): Likewise. 76 (EXq): Likewise. 77 (EXx): Likewise. 78 (PREGRP93...PREGRP97): Likewise. 79 (dis386_twobyte): Updated. 80 (prefix_user_table): Updated. Add PREGRP93...PREGRP97. 81 (OP_EX): Remove Intel syntax handling. 82 832007-06-18 Nathan Sidwell <nathan@codesourcery.com> 84 85 * m68k-opc.c (m68k_opcodes): Add wdebugl variants. 86 872007-06-14 H.J. Lu <hongjiu.lu@intel.com> 88 89 * Makefile.am (ACLOCAL_AMFLAGS): Add -I ../config -I ../bfd. 90 91 * acinclude.m4: Removed. 92 93 * Makefile.in: Regenerated. 94 * doc/Makefile.in: Likewise. 95 * aclocal.m4: Likewise. 96 * configure: Likewise. 97 982007-06-05 Paul Brook <paul@codesourcery.com> 99 100 * arm-dis.c (thumb32_opcodes): Display writeback ldrd/strd addresses. 101 1022007-05-24 Steve Ellcey <sje@cup.hp.com> 103 104 * Makefile.in: Regnerate. 105 * configure: Regenerate. 106 * aclocal.m4: Regenerate. 107 1082007-05-18 Alan Modra <amodra@bigpond.net.au> 109 110 * ppc-dis.c (print_insn_powerpc): Don't skip all operands 111 after setting skip_optional. 112 1132007-05-16 Peter Bergner <bergner@vnet.ibm.com> 114 115 * ppc-dis.c (operand_value_powerpc, skip_optional_operands): New. 116 (print_insn_powerpc): Use the new operand_value_powerpc and 117 skip_optional_operands functions to omit or print all optional 118 operands as a group. 119 * ppc-opc.c (BFF, W, XFL_L, XWRA_MASK): New. 120 (XFL_MASK): Delete L and W bits from the mask. 121 (mtfsfi, mtfsfi.): Replace use of BF with BFF. Relpace use of XRA_MASK 122 with XWRA_MASK. Use W. 123 (mtfsf, mtfsf.): Use XFL_L and W. 124 1252007-05-14 H.J. Lu <hongjiu.lu@intel.com> 126 127 PR binutils/4502 128 * i386-dis.c (Suffix3DNow): Replace "pfmulhrw" with "pmulhrw". 129 1302007-05-10 H.J. Lu <hongjiu.lu@intel.com> 131 132 * i386-opc.h (ShortForm): Redefined. 133 (Jump): Likewise. 134 (JumpDword): Likewise. 135 (JumpByte): Likewise. 136 (JumpInterSegment): Likewise. 137 (FloatMF): Likewise. 138 (FloatR): Likewise. 139 (FloatD): Likewise. 140 (Size16): Likewise. 141 (Size32): Likewise. 142 (Size64): Likewise. 143 (IgnoreSize): Likewise. 144 (DefaultSize): Likewise. 145 (No_bSuf): Likewise. 146 (No_wSuf): Likewise. 147 (No_lSuf): Likewise. 148 (No_sSuf): Likewise. 149 (No_qSuf): Likewise. 150 (No_xSuf): Likewise. 151 (FWait): Likewise. 152 (IsString): Likewise. 153 (regKludge): Likewise. 154 (IsPrefix): Likewise. 155 (ImmExt): Likewise. 156 (NoRex64): Likewise. 157 (Rex64): Likewise. 158 (Ugh): Likewise. 159 1602007-05-07 H.J. Lu <hongjiu.lu@intel.com> 161 162 * i386-dis.c (threebyte_0x38_uses_DATA_prefix): Correct entries 163 for some SSE4 instructions. 164 (threebyte_0x3a_uses_DATA_prefix): Likewise. 165 1662007-05-03 H.J. Lu <hongjiu.lu@intel.com> 167 168 * i386-dis.c (CRC32_Fixup): Don't print suffix in Intel mode. 169 170 * i386-opc.c (i386_optab): Remove IgnoreSize and correct operand 171 type for crc32. 172 1732007-05-01 H.J. Lu <hongjiu.lu@intel.com> 174 175 * i386-dis.c (CRC32_Fixup): Properly handle Intel mode and 176 check data size prefix in 16bit mode. 177 178 * i386-opc.c (i386_optab): Default crc32 to non-8bit and 179 support Intel mode. 180 1812007-04-30 Mark Salter <msalter@redhat.com> 182 183 * frv-desc.c: Regenerate. 184 * frv-desc.h: Regenerate. 185 1862007-04-30 Alan Modra <amodra@bigpond.net.au> 187 188 PR 4436 189 * ppc-opc.c (powerpc_operands): Correct bitm for second entry of MBE. 190 1912007-04-27 H.J. Lu <hongjiu.lu@intel.com> 192 193 * i386-dis.c (modrm): Put reg before rm. 194 1952007-04-26 H.J. Lu <hongjiu.lu@intel.com> 196 197 PR binutils/4430 198 * i386-dis.c (print_displacement): New. 199 (OP_E): Call print_displacement instead of print_operand_value 200 to output displacement when either base or index exist. Print 201 the explicit zero displacement in 16bit mode. 202 2032007-04-26 H.J. Lu <hongjiu.lu@intel.com> 204 205 PR binutils/4429 206 * i386-dis.c (print_insn): Also swap the order of op_riprel 207 when swapping op_index. Break when the RIP relative address 208 is printed. 209 (OP_E): Properly handle RIP relative addressing and print the 210 explicit zero displacement for Intel mode. 211 2122007-04-27 Alan Modra <amodra@bigpond.net.au> 213 214 * Makefile.am: Run "make dep-am". 215 * Makefile.in: Regenerate. 216 * ns32k-dis.c: Include sysdep.h first. 217 2182007-04-24 Andreas Krebbel <krebbel1@de.ibm.com> 219 220 * opcodes/s390-opc.c (MASK_SSF_RRDRD): Fourth nybble belongs to the 221 opcode. 222 * opcodes/s390-opc.txt (pfpo, ectg, csst): Add new z9-ec instructions. 223 2242007-04-24 Nick Clifton <nickc@redhat.com> 225 226 * arm-dis.c (print_insn): Initialise type. 227 2282007-04-24 Alan Modra <amodra@bigpond.net.au> 229 230 * cgen-types.h: Include bfd_stdint.h, not stdint.h. 231 * Makefile.am: Run "make dep-am". 232 * Makefile.in: Regenerate. 233 2342007-04-23 Nathan Sidwell <nathan@codesourcery.com> 235 236 * m68k-opc.c: Mark mcfisa_c instructions. 237 2382007-04-21 Richard Earnshaw <rearnsha@arm.com> 239 240 * arm-dis.c (arm_opcodes): Disassemble to unified syntax. 241 (thumb_opcodes): Add missing white space in adr. 242 (arm_decode_shift): New parameter, print_shift. Only decode the 243 shift parameter if set. Adjust callers. 244 (print_insn_arm): Support for operand type q with no shift decode. 245 2462007-04-21 Alan Modra <amodra@bigpond.net.au> 247 248 * i386-opc.c (i386_float_regtab, i386_float_regtab_size): Delete. 249 Move contents to.. 250 (i386_regtab): ..here. 251 * i386-opc.h (i386_float_regtab, i386_float_regtab_size): Delete. 252 253 * ppc-opc.c (powerpc_operands): Delete duplicate entries. 254 (BA_MASK, FXM_MASK, STRM_MASK, VA_MASK, VB_MASK, VC_MASK): Delete. 255 (VD_MASK, WS_MASK, MTMSRD_L, XRT_L): Delete. 256 (powerpc_opcodes): Replace uses of MTMSRD_L and XRT_L. 257 2582007-04-20 Nathan Sidwell <nathan@codesourcery.com> 259 260 * m68k-dis.c (print_insn_arg): Show c04 as rambar0 and c05 as 261 rambar1. 262 2632007-04-20 Alan Modra <amodra@bigpond.net.au> 264 265 * ppc-dis.c (print_insn_powerpc): Adjust for struct powerpc_operand 266 change. 267 * ppc-opc.c (powerpc_operands): Replace bit count with bit mask 268 in all entries. Add PPC_OPERAND_SIGNED to DE entry. Remove 269 references to following deleted functions. 270 (insert_bd, extract_bd, insert_dq, extract_dq): Delete. 271 (insert_ds, extract_ds, insert_de, extract_de): Delete. 272 (insert_des, extract_des, insert_li, extract_li): Delete. 273 (insert_nb, insert_rsq, insert_rtq, insert_ev2, extract_ev2): Delete. 274 (insert_ev4, extract_ev4, insert_ev8, extract_ev8): Delete. 275 (num_powerpc_operands): New constant. 276 (XSPRG_MASK): Remove entire SPRG field. 277 (powerpc_opcodes <bcctre, bcctrel>): Use XLBB_MASK not XLYBB_MASK. 278 2792007-04-20 Alan Modra <amodra@bigpond.net.au> 280 281 * ppc-opc.c (DCM, DGM, TE, RMC, R, SP, S): Correct shift. 282 (Z2_MASK): Define. 283 (powerpc_opcodes): Use Z2_MASK in all insns taking RMC operand. 284 2852007-04-20 Richard Earnshaw <rearnsha@arm.com> 286 287 * arm-dis.c (print_insn): Only look for a mapping symbol in the section 288 being disassembled. 289 2902007-04-19 Alan Modra <amodra@bigpond.net.au> 291 292 * Makefile.am: Run "make dep-am". 293 * Makefile.in: Regenerate. 294 * po/POTFILES.in: Regenerate. 295 2962007-04-19 Alan Modra <amodra@bigpond.net.au> 297 298 * ppc-opc.c (powerpc_opcodes): Add cctpl, cctpm, cctph, db8cyc, 299 db10cyc, db12cyc, db16cyc. 300 3012007-04-19 Nathan Froyd <froydnj@codesourcery.com> 302 303 * ppc-opc.c (powerpc_opcodes): Recognize three-operand tlbsxe. 304 3052007-04-18 H.J. Lu <hongjiu.lu@intel.com> 306 307 * i386-dis.c (CRC32_Fixup): New. 308 (PREGRP85, PREGRP86, PREGRP87, PREGRP88, PREGRP89, PREGRP90, 309 PREGRP91): New. 310 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4.2. 311 (threebyte_0x3a_uses_DATA_prefix): Likewise. 312 (prefix_user_table): Add PREGRP85, PREGRP86, PREGRP87, 313 PREGRP88, PREGRP89, PREGRP90 and PREGRP91. 314 (three_byte_table): Likewise. 315 316 * i386-opc.c (i386_optab): Add SSE4.2 opcodes. 317 318 * i386-opc.h (CpuSSE4_2): New. 319 (CpuSSE4): Likewise. 320 (CpuUnknownFlags): Add CpuSSE4_2. 321 3222007-04-18 H.J. Lu <hongjiu.lu@intel.com> 323 324 * i386-dis.c (XMM_Fixup): New. 325 (Edqb): New. 326 (Edqd): New. 327 (XMM0): New. 328 (dqb_mode): New. 329 (dqd_mode): New. 330 (PREGRP39 ... PREGRP85): New. 331 (threebyte_0x38_uses_DATA_prefix): Updated for SSE4. 332 (threebyte_0x3a_uses_DATA_prefix): Likewise. 333 (prefix_user_table): Add PREGRP39 ... PREGRP85. 334 (three_byte_table): Likewise. 335 (putop): Handle 'K'. 336 (intel_operand_size): Handle dqb_mode, dqd_mode): 337 (OP_E): Likewise. 338 (OP_G): Likewise. 339 340 * i386-opc.c (i386_optab): Add SSE4.1 opcodes. 341 342 * i386-opc.h (CpuSSE4_1): New. 343 (CpuUnknownFlags): Add CpuSSE4_1. 344 (regKludge): Update comment. 345 3462007-04-18 Matthias Klose <doko@ubuntu.com> 347 348 * Makefile.am (libopcodes_la_LDFLAGS): Use bfd soversion. 349 * Makefile.in: Regenerate. 350 3512007-04-14 Steve Ellcey <sje@cup.hp.com> 352 353 * Makefile.am: Add ACLOCAL_AMFLAGS. 354 * Makefile.in: Regenerate. 355 3562007-04-13 H.J. Lu <hongjiu.lu@intel.com> 357 358 * i386-dis.c: Remove trailing white spaces. 359 * i386-opc.c: Likewise. 360 * i386-opc.h: Likewise. 361 3622007-04-11 H.J. Lu <hongjiu.lu@intel.com> 363 364 PR binutils/4333 365 * i386-dis.c (GRP1a): New. 366 (GRP1b ... GRPPADLCK2): Update index. 367 (dis386): Use GRP1a for entry 0x8f. 368 (mod, rm, reg): Removed. Replaced by ... 369 (modrm): This. 370 (grps): Add GRP1a. 371 3722007-04-09 Kazu Hirata <kazu@codesourcery.com> 373 374 * m68k-dis.c (print_insn_m68k): Restore info->fprintf_func and 375 info->print_address_func if longjmp is called. 376 3772007-03-29 DJ Delorie <dj@redhat.com> 378 379 * m32c-desc.c: Regenerate. 380 * m32c-dis.c: Regenerate. 381 * m32c-opc.c: Regenerate. 382 3832007-03-28 H.J. Lu <hongjiu.lu@intel.com> 384 385 * i386-opc.c (i386_optab): Change InvMem to RegMem for mov and 386 movq. Remove InvMem from sldt, smsw and str. 387 388 * i386-opc.h (InvMem): Renamed to ... 389 (RegMem): Update comments. 390 (AnyMem): Remove InvMem. 391 3922007-03-27 Paul Brook <paul@codesourcery.com> 393 394 * arm-dis.c (thumb_opcodes): Add entry for undefined insns (0xbe??). 395 3962007-03-24 Paul Brook <paul@codesourcery.com> 397 398 * arm-dis.c (coprocessor_opcodes): Remove superfluous 0x. 399 (print_insn_coprocessor): Handle %<bitfield>x. 400 4012007-03-24 Paul Brook <paul@codesourcery.com> 402 Mark Shinwell <shinwell@codesourcery.com> 403 404 * arm-dis.c (arm_opcodes): Print SRS base register. 405 4062007-03-23 H.J. Lu <hongjiu.lu@intel.com> 407 408 * i386-dis.c (prefix_name): Replace rex64XYZ with rex.WRXB. 409 410 * i386-opc.c (i386_optab): Add rex.wrxb. 411 4122007-03-21 H.J. Lu <hongjiu.lu@intel.com> 413 414 * i386-dis.c (REX_MODE64): Remove definition. 415 (REX_EXTX): Likewise. 416 (REX_EXTY): Likewise. 417 (REX_EXTZ): Likewise. 418 (USED_REX): Use REX_OPCODE instead of 0x40. 419 Replace REX_MODE64, REX_EXTX, REX_EXTY and REX_EXTZ with REX_W, 420 REX_R, REX_X and REX_B respectively. 421 4222007-03-21 H.J. Lu <hongjiu.lu@intel.com> 423 424 PR binutils/4218 425 * i386-dis.c (PREGRP38): New. 426 (dis386): Use PREGRP38 for 0x90. 427 (prefix_user_table): Add PREGRP38. 428 (print_insn): Set uses_REPZ_prefix to 1 for pause. 429 (NOP_Fixup1): Properly handle REX bits. 430 (NOP_Fixup2): Likewise. 431 432 * i386-opc.c (i386_optab): Allow %eax with xchg in 64bit. 433 Allow register with nop. 434 4352007-03-20 DJ Delorie <dj@redhat.com> 436 437 * m32c-asm.c: Regenerate. 438 * m32c-desc.c: Regenerate. 439 * m32c-desc.h: Regenerate. 440 * m32c-dis.h: Regenerate. 441 * m32c-ibld.c: Regenerate. 442 * m32c-opc.c: Regenerate. 443 * m32c-opc.h: Regenerate. 444 4452007-03-15 H.J. Lu <hongjiu.lu@intel.com> 446 447 * i386-opc.c: Include "libiberty.h". 448 (i386_regtab): Remove the last entry. 449 (i386_regtab_size): New. 450 (i386_float_regtab_size): Likewise. 451 452 * i386-opc.h (i386_regtab_size): New. 453 (i386_float_regtab_size): Likewise. 454 4552007-03-15 H.J. Lu <hongjiu.lu@intel.com> 456 457 * Makefile.am (CFILES): Add i386-opc.c. 458 (ALL_MACHINES): Add i386-opc.lo. 459 Run "make dep-am". 460 * Makefile.in: Regenerated. 461 462 * configure.in: Add i386-opc.lo for bfd_i386_arch. 463 * configure: Regenerated. 464 465 * i386-dis.c: Include "opcode/i386.h". 466 (MAXLEN): Renamed to MAX_MNEM_SIZE. Remove definition. 467 (FWAIT_OPCODE): Remove definition. 468 (UNIXWARE_COMPAT): Renamed to SYSV386_COMPAT. Remove definition. 469 (MAX_OPERANDS): Remove definition. 470 471 * i386-opc.c: New file. 472 * i386-opc.h: Likewise. 473 4742007-03-15 H.J. Lu <hongjiu.lu@intel.com> 475 476 * Makefile.in: Regenerated. 477 4782007-03-09 H.J. Lu <hongjiu.lu@intel.com> 479 480 * i386-dis.c (OP_Rd): Renamed to ... 481 (OP_R): This. 482 (Rd): Updated. 483 (Rm): Likewise. 484 4852007-03-08 Alan Modra <amodra@bigpond.net.au> 486 487 * fr30-asm.c: Regenerate. 488 * frv-asm.c: Regenerate. 489 * ip2k-asm.c: Regenerate. 490 * iq2000-asm.c: Regenerate. 491 * m32c-asm.c: Regenerate. 492 * m32r-asm.c: Regenerate. 493 * m32r-dis.c: Regenerate. 494 * mt-asm.c: Regenerate. 495 * mt-ibld.c: Regenerate. 496 * mt-opc.c: Regenerate. 497 * openrisc-asm.c: Regenerate. 498 * xc16x-asm.c: Regenerate. 499 * xstormy16-asm.c: Regenerate. 500 501 * Makefile.am: Run "make dep-am". 502 * Makefile.in: Regenerate. 503 * po/POTFILES.in: Regenerate. 504 5052007-03-06 Andreas Krebbel <krebbel1@de.ibm.com> 506 507 * opcodes/s390-opc.c (INSTR_RRE_FR, INSTR_RRF_F0FF2, INSTR_RRF_F0FR, 508 INSTR_RRF_UUFF, INSTR_RRF_0UFF, INSTR_RRF_FFFU, INSTR_RRR_F0FF): New 509 instruction formats added. 510 (MASK_RRE_FR, MASK_RRF_F0FF2, MASK_RRF_F0FR, MASK_RRF_UUFF, 511 MASK_RRF_0UFF, MASK_RRF_FFFU, MASK_RRR_F0FF): New instruction format 512 masks added. 513 * opcodes/s390-opc.txt (lpdfr - tgxt): Decimal floating point 514 instructions added. 515 * opcodes/s390-mkopc.c (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added. 516 (main): z9-ec cpu type option added. 517 * include/opcode/s390.h (s390_opcode_cpu_val): S390_OPCODE_Z9_EC added. 518 5192007-02-22 DJ Delorie <dj@redhat.com> 520 521 * s390-opc.c (INSTR_SS_L2RDRD): New. 522 (MASK_SS_L2RDRD): New. 523 * s390-opc.txt (pka): Use it. 524 5252007-02-20 Thiemo Seufer <ths@mips.com> 526 Chao-Ying Fu <fu@mips.com> 527 528 * mips-dis.c (mips_arch_choices): Add DSP R2 support. 529 (print_insn_args): Add support for balign instruction. 530 * mips-opc.c (D33): New shortcut for DSP R2 instructions. 531 (mips_builtin_opcodes): Add DSP R2 instructions. 532 5332007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> 534 535 * s390-opc.c (INSTR_RRF_U0FR, MASK_RRF_U0FR): Removed. 536 (INSTR_RRF_U0RF, MASK_RRF_U0RF): Added. 537 * s390-opc.txt (cfxbr, cfdbr, cfebr, cgebr, cgdbr, cgxbr, cger, cgdr, 538 cgxr, cfxr, cfdr, cfer): Instruction type set to INSTR_RRF_U0RF. 539 5402007-02-19 Andreas Krebbel <krebbel1@de.ibm.com> 541 542 * s390-opc.txt ("efpc", "sfpc"): Set to RRE_RR_OPT instruction type. 543 * s390-opc.c (s390_operands): Add RO_28 as optional gpr. 544 (INSTR_RRE_RR_OPT, MASK_RRE_RR_OPT): New instruction type for efpc 545 and sfpc. 546 5472007-02-16 Nick Clifton <nickc@redhat.com> 548 549 PR binutils/4045 550 * avr-dis.c (comment_start): New variable, contains the prefix to 551 use when printing addresses in comments. 552 (print_insn_avr): Set comment_start to an empty space if there is 553 no symbol table available as the generic address printing code 554 will prefix the numeric value of the address with 0x. 555 5562007-02-13 H.J. Lu <hongjiu.lu@intel.com> 557 558 * i386-dis.c: Updated to use an array of MAX_OPERANDS operands 559 in struct dis386. 560 5612007-02-05 Dave Brolley <brolley@redhat.com> 562 Richard Sandiford <rsandifo@redhat.com> 563 DJ Delorie <dj@redhat.com> 564 Graydon Hoare <graydon@redhat.com> 565 Frank Ch. Eigler <fche@redhat.com> 566 Ben Elliston <bje@redhat.com> 567 568 * Makefile.am (HFILES): Add mep-desc.h mep-opc.h. 569 (CFILES): Add mep-*.c 570 (ALL_MACHINES): Add mep-*.lo. 571 (CLEANFILES): Add stamp-mep. 572 (CGEN_CPUS): Add mep. 573 (MEP_DEPS): New variable. 574 (mep-*): New targets. 575 * configure.in: Handle bfd_mep_arch. 576 * disassemble.c (ARCH_mep): New macro. 577 (disassembler): Handle bfd_arch_mep. 578 (disassemble_init_for_target): Likewise. 579 * mep-*: New files for Toshiba Media Processor (MeP). 580 * Makefile.in: Regenerated. 581 * configure: Regenerated. 582 5832007-02-05 H.J. Lu <hongjiu.lu@intel.com> 584 585 * i386-dis.c (OP_J): Undo the last change. Properly handle 64K 586 wrap around within the same segment in 16bit mode. 587 5882007-02-02 H.J. Lu <hongjiu.lu@intel.com> 589 590 * i386-dis.c (OP_J): Mask to 16bit only if there is a data16 591 prefix. 592 5932007-02-02 H.J. Lu <hongjiu.lu@intel.com> 594 595 * avr-dis.c (avr_operand): Correct PR number in comment. 596 5972007-02-02 H.J. Lu <hongjiu.lu@intel.com> 598 599 * disassemble.c (disassembler_usage): Call 600 print_i386_disassembler_options for i386 disassembler. 601 602 * i386-dis.c (print_i386_disassembler_options): New. 603 (print_insn): Support the new addr64 option. 604 6052007-02-02 Hiroki Kaminaga <kaminaga@sm.sony.co.jp> 606 607 * ppc-dis.c (powerpc_dialect): Handle ppc440. 608 * ppc-dis.c (print_ppc_disassembler_options): Note the -M440 can 609 be used. 610 6112007-02-02 Alan Modra <amodra@bigpond.net.au> 612 613 * ppc-opc.c (insert_bdm): -Many comment. 614 (valid_bo): Add "extract" param. Accept both powerpc and power4 615 BO fields when disassembling with -Many. 616 (insert_bo, extract_bo, insert_boe, extract_boe): Adjust valid_bo call. 617 6182007-01-08 Kazu Hirata <kazu@codesourcery.com> 619 620 * m68k-opc.c (m68k_opcodes): Replace cpu32 with 621 cpu32 | fido_a except on tbl instructions. 622 6232007-01-04 Paul Brook <paul@codesourcery.com> 624 625 * arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries. 626 6272007-01-04 Andreas Schwab <schwab@suse.de> 628 629 * m68k-opc.c: Fix encoding of signed bit in the cpu32 tbls insns. 630 6312007-01-04 Julian Brown <julian@codesourcery.com> 632 633 * arm-dis.c (neon_opcode): Fix disassembly for vshl, vqshl, vrshl, 634 vqrshl instructions. 635 636For older changes see ChangeLog-2006 637 638Local Variables: 639mode: change-log 640left-margin: 8 641fill-column: 74 642version-control: never 643End: 644