1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 1997 Per Fogelstrom, Opsycon AB and RTMX Inc, USA.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 *    must display the following acknowledgement:
16 *	This product includes software developed under OpenBSD by
17 *	Per Fogelstrom Opsycon AB for RTMX Inc, North Carolina, USA.
18 * 4. The name of the author may not be used to endorse or promote products
19 *    derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 *	$NetBSD: pio.h,v 1.1 1998/05/15 10:15:54 tsubai Exp $
34 *	$OpenBSD: pio.h,v 1.1 1997/10/13 10:53:47 pefo Exp $
35 * $FreeBSD$
36 */
37
38#ifndef _MACHINE_PIO_H_
39#define	_MACHINE_PIO_H_
40/*
41 * I/O macros.
42 */
43
44/*
45 * Use sync so that bus space operations cannot sneak out the bottom of
46 * mutex-protected sections (mutex release does not guarantee completion of
47 * accesses to caching-inhibited memory on some systems)
48 */
49#define powerpc_iomb() __asm __volatile("sync" : : : "memory")
50
51static __inline void
52__outb(volatile u_int8_t *a, u_int8_t v)
53{
54	*a = v;
55	powerpc_iomb();
56}
57
58static __inline void
59__outw(volatile u_int16_t *a, u_int16_t v)
60{
61	*a = v;
62	powerpc_iomb();
63}
64
65static __inline void
66__outl(volatile u_int32_t *a, u_int32_t v)
67{
68	*a = v;
69	powerpc_iomb();
70}
71
72static __inline void
73__outll(volatile u_int64_t *a, u_int64_t v)
74{
75	*a = v;
76	powerpc_iomb();
77}
78
79static __inline void
80__outwrb(volatile u_int16_t *a, u_int16_t v)
81{
82	__asm__ volatile("sthbrx %0, 0, %1" :: "r"(v), "r"(a));
83	powerpc_iomb();
84}
85
86static __inline void
87__outlrb(volatile u_int32_t *a, u_int32_t v)
88{
89	__asm__ volatile("stwbrx %0, 0, %1" :: "r"(v), "r"(a));
90	powerpc_iomb();
91}
92
93static __inline u_int8_t
94__inb(volatile u_int8_t *a)
95{
96	u_int8_t _v_;
97
98	_v_ = *a;
99	powerpc_iomb();
100	return _v_;
101}
102
103static __inline u_int16_t
104__inw(volatile u_int16_t *a)
105{
106	u_int16_t _v_;
107
108	_v_ = *a;
109	powerpc_iomb();
110	return _v_;
111}
112
113static __inline u_int32_t
114__inl(volatile u_int32_t *a)
115{
116	u_int32_t _v_;
117
118	_v_ = *a;
119	powerpc_iomb();
120	return _v_;
121}
122
123static __inline u_int64_t
124__inll(volatile u_int64_t *a)
125{
126	u_int64_t _v_;
127
128	_v_ = *a;
129	powerpc_iomb();
130	return _v_;
131}
132
133static __inline u_int16_t
134__inwrb(volatile u_int16_t *a)
135{
136	u_int16_t _v_;
137
138	__asm__ volatile("lhbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
139	powerpc_iomb();
140	return _v_;
141}
142
143static __inline u_int32_t
144__inlrb(volatile u_int32_t *a)
145{
146	u_int32_t _v_;
147
148	__asm__ volatile("lwbrx %0, 0, %1" : "=r"(_v_) : "r"(a));
149	powerpc_iomb();
150	return _v_;
151}
152
153#define	outb(a,v)	(__outb((volatile u_int8_t *)(a), v))
154#define	out8(a,v)	outb(a,v)
155#define	outw(a,v)	(__outw((volatile u_int16_t *)(a), v))
156#define	out16(a,v)	outw(a,v)
157#define	outl(a,v)	(__outl((volatile u_int32_t *)(a), v))
158#define	out32(a,v)	outl(a,v)
159#define	outll(a,v)	(__outll((volatile u_int64_t *)(a), v))
160#define	out64(a,v)	outll(a,v)
161#define	inb(a)		(__inb((volatile u_int8_t *)(a)))
162#define	in8(a)		inb(a)
163#define	inw(a)		(__inw((volatile u_int16_t *)(a)))
164#define	in16(a)		inw(a)
165#define	inl(a)		(__inl((volatile u_int32_t *)(a)))
166#define	in32(a)		inl(a)
167#define	inll(a)		(__inll((volatile u_int64_t *)(a)))
168#define	in64(a)		inll(a)
169
170#define	out8rb(a,v)	outb(a,v)
171#define	outwrb(a,v)	(__outwrb((volatile u_int16_t *)(a), v))
172#define	out16rb(a,v)	outwrb(a,v)
173#define	outlrb(a,v)	(__outlrb((volatile u_int32_t *)(a), v))
174#define	out32rb(a,v)	outlrb(a,v)
175#define	in8rb(a)	inb(a)
176#define	inwrb(a)	(__inwrb((volatile u_int16_t *)(a)))
177#define	in16rb(a)	inwrb(a)
178#define	inlrb(a)	(__inlrb((volatile u_int32_t *)(a)))
179#define	in32rb(a)	inlrb(a)
180
181static __inline void
182__outsb(volatile u_int8_t *a, const u_int8_t *s, size_t c)
183{
184	while (c--)
185		*a = *s++;
186	powerpc_iomb();
187}
188
189static __inline void
190__outsw(volatile u_int16_t *a, const u_int16_t *s, size_t c)
191{
192	while (c--)
193		*a = *s++;
194	powerpc_iomb();
195}
196
197static __inline void
198__outsl(volatile u_int32_t *a, const u_int32_t *s, size_t c)
199{
200	while (c--)
201		*a = *s++;
202	powerpc_iomb();
203}
204
205static __inline void
206__outsll(volatile u_int64_t *a, const u_int64_t *s, size_t c)
207{
208	while (c--)
209		*a = *s++;
210	powerpc_iomb();
211}
212
213static __inline void
214__outswrb(volatile u_int16_t *a, const u_int16_t *s, size_t c)
215{
216	while (c--)
217		__asm__ volatile("sthbrx %0, 0, %1" :: "r"(*s++), "r"(a));
218	powerpc_iomb();
219}
220
221static __inline void
222__outslrb(volatile u_int32_t *a, const u_int32_t *s, size_t c)
223{
224	while (c--)
225		__asm__ volatile("stwbrx %0, 0, %1" :: "r"(*s++), "r"(a));
226	powerpc_iomb();
227}
228
229static __inline void
230__insb(volatile u_int8_t *a, u_int8_t *d, size_t c)
231{
232	while (c--)
233		*d++ = *a;
234	powerpc_iomb();
235}
236
237static __inline void
238__insw(volatile u_int16_t *a, u_int16_t *d, size_t c)
239{
240	while (c--)
241		*d++ = *a;
242	powerpc_iomb();
243}
244
245static __inline void
246__insl(volatile u_int32_t *a, u_int32_t *d, size_t c)
247{
248	while (c--)
249		*d++ = *a;
250	powerpc_iomb();
251}
252
253static __inline void
254__insll(volatile u_int64_t *a, u_int64_t *d, size_t c)
255{
256	while (c--)
257		*d++ = *a;
258	powerpc_iomb();
259}
260
261static __inline void
262__inswrb(volatile u_int16_t *a, u_int16_t *d, size_t c)
263{
264	while (c--)
265		__asm__ volatile("lhbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
266	powerpc_iomb();
267}
268
269static __inline void
270__inslrb(volatile u_int32_t *a, u_int32_t *d, size_t c)
271{
272	while (c--)
273		__asm__ volatile("lwbrx %0, 0, %1" : "=r"(*d++) : "r"(a));
274	powerpc_iomb();
275}
276
277#define	outsb(a,s,c)	(__outsb((volatile u_int8_t *)(a), s, c))
278#define	outs8(a,s,c)	outsb(a,s,c)
279#define	outsw(a,s,c)	(__outsw((volatile u_int16_t *)(a), s, c))
280#define	outs16(a,s,c)	outsw(a,s,c)
281#define	outsl(a,s,c)	(__outsl((volatile u_int32_t *)(a), s, c))
282#define	outs32(a,s,c)	outsl(a,s,c)
283#define	outsll(a,s,c)	(__outsll((volatile u_int64_t *)(a), s, c))
284#define	outs64(a,s,c)	outsll(a,s,c)
285#define	insb(a,d,c)	(__insb((volatile u_int8_t *)(a), d, c))
286#define	ins8(a,d,c)	insb(a,d,c)
287#define	insw(a,d,c)	(__insw((volatile u_int16_t *)(a), d, c))
288#define	ins16(a,d,c)	insw(a,d,c)
289#define	insl(a,d,c)	(__insl((volatile u_int32_t *)(a), d, c))
290#define	ins32(a,d,c)	insl(a,d,c)
291#define	insll(a,d,c)	(__insll((volatile u_int64_t *)(a), d, c))
292#define	ins64(a,d,c)	insll(a,d,c)
293
294#define	outs8rb(a,s,c)	outsb(a,s,c)
295#define	outswrb(a,s,c)	(__outswrb((volatile u_int16_t *)(a), s, c))
296#define	outs16rb(a,s,c)	outswrb(a,s,c)
297#define	outslrb(a,s,c)	(__outslrb((volatile u_int32_t *)(a), s, c))
298#define	outs32rb(a,s,c)	outslrb(a,s,c)
299#define	ins8rb(a,d,c)	insb(a,d,c)
300#define	inswrb(a,d,c)	(__inswrb((volatile u_int16_t *)(a), d, c))
301#define	ins16rb(a,d,c)	inswrb(a,d,c)
302#define	inslrb(a,d,c)	(__inslrb((volatile u_int32_t *)(a), d, c))
303#define	ins32rb(a,d,c)	inslrb(a,d,c)
304
305#endif /*_MACHINE_PIO_H_*/
306