1# 2# This file adds to the values in AR933X_BASE.hints 3# 4# $FreeBSD$ 5 6# mdiobus on arge1 7hint.argemdio.0.at="nexus0" 8hint.argemdio.0.maddr=0x1a000000 9hint.argemdio.0.msize=0x1000 10hint.argemdio.0.order=0 11 12# There's no need to set the ar933x GMAC configuration bits. 13# This just creates a switch instance and correctly uses it. 14 15# Embedded Atheros Switch 16hint.arswitch.0.at="mdio0" 17 18# XXX this should really say it's an AR933x switch, as there 19# are some vlan specific differences here! 20hint.arswitch.0.is_7240=1 21hint.arswitch.0.numphys=4 22hint.arswitch.0.phy4cpu=1 # phy 4 is a "CPU" separate PHY 23hint.arswitch.0.is_rgmii=0 24hint.arswitch.0.is_gmii=1 # arge1 <-> switch PHY is GMII 25 26# arge0 - MII, autoneg, phy(4) 27hint.arge.0.phymask=0x10 # PHY4 28hint.arge.0.mdio=mdioproxy1 # .. off of the switch mdiobus 29hint.arge.0.eeprommac=0x1fff0000 30 31# arge1 - GMII, 1000/full 32hint.arge.1.phymask=0x0 # No directly mapped PHYs 33hint.arge.1.media=1000 34hint.arge.1.fduplex=1 35hint.arge.1.eeprommac=0x1fff0006 36 37# Where the ART is - last 64k in the flash 38# 0x9fff1000 ? 39hint.ath.0.eepromaddr=0x1fff0000 40hint.ath.0.eepromsize=16384 41 42# The board 4MiB flash layout in uboot env: 43# 44# 256k(u-boot),64k(u-boot-env),2752k(rootfs),896k(uImage),64k(NVRAM),64k(ART) 45 46# However, it boots from 0x9f050000, which is the front of the flsah! 47# Thus the kernel/rootfs are switched around. 48 49# 256KB 50hint.map.0.at="flash/spi0" 51hint.map.0.start=0x00000000 52hint.map.0.end=0x00040000 53hint.map.0.name="uboot" 54hint.map.0.readonly=1 55 56# 64KB 57hint.map.1.at="flash/spi0" 58hint.map.1.start=0x00040000 59hint.map.1.end=0x00050000 60hint.map.1.name="uboot-env" 61hint.map.1.readonly=1 62 63# 3648KB 64hint.map.2.at="flash/spi0" 65hint.map.2.start=0x00050000 66hint.map.2.end=0x003e0000 67hint.map.2.name="kernel" 68hint.map.2.readonly=1 69 70# 64K NVRAM 71hint.map.3.at="flash/spi0" 72hint.map.3.start=0x003e0000 73hint.map.3.end=0x003f0000 74hint.map.3.name="cfg" 75hint.map.3.readonly=0 76 77# 64K ART 78hint.map.4.at="flash/spi0" 79hint.map.4.start=0x003f0000 80hint.map.4.end=0x00400000 81hint.map.4.name="art" 82hint.map.4.readonly=1 83 84# GPIO specific configuration block 85 86# Don't flip on anything that isn't already enabled. 87# This includes leaving the SPI CS1/CS2 pins as GPIO pins as they're 88# not used here. 89hint.gpio.0.function_set=0x00000000 90hint.gpio.0.function_clear=0x00000000 91 92# These are the GPIO LEDs and buttons which can be software controlled. 93#hint.gpio.0.pinmask=0x001c02ae 94#hint.gpio.0.pinmask=0x00001803 95 96# XXX TODO: the button and LEDs! 97