1/*- 2 * SPDX-License-Identifier: BSD-4-Clause 3 * 4 * Copyright (c) 1997, 1998, 1999, 2000 5 * Bill Paul <wpaul@ee.columbia.edu>. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. All advertising materials mentioning features or use of this software 16 * must display the following acknowledgement: 17 * This product includes software developed by Bill Paul. 18 * 4. Neither the name of the author nor the names of any co-contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 26 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 27 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 28 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 29 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 30 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 31 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 32 * THE POSSIBILITY OF SUCH DAMAGE. 33 * 34 * $FreeBSD$ 35 */ 36 37/* 38 * Definitions for the CATC Netmate II USB to ethernet controller. 39 */ 40 41/* Vendor specific control commands. */ 42#define CUE_CMD_RESET 0xF4 43#define CUE_CMD_GET_MACADDR 0xF2 44#define CUE_CMD_WRITEREG 0xFA 45#define CUE_CMD_READREG 0xFB 46#define CUE_CMD_READSRAM 0xF1 47#define CUE_CMD_WRITESRAM 0xFC 48/* Internal registers. */ 49#define CUE_TX_BUFCNT 0x20 50#define CUE_RX_BUFCNT 0x21 51#define CUE_ADVANCED_OPMODES 0x22 52#define CUE_TX_BUFPKTS 0x23 53#define CUE_RX_BUFPKTS 0x24 54#define CUE_RX_MAXCHAIN 0x25 55#define CUE_ETHCTL 0x60 56#define CUE_ETHSTS 0x61 57#define CUE_PAR5 0x62 58#define CUE_PAR4 0x63 59#define CUE_PAR3 0x64 60#define CUE_PAR2 0x65 61#define CUE_PAR1 0x66 62#define CUE_PAR0 0x67 63/* Error counters, all 16 bits wide. */ 64#define CUE_TX_SINGLECOLL 0x69 65#define CUE_TX_MULTICOLL 0x6B 66#define CUE_TX_EXCESSCOLL 0x6D 67#define CUE_RX_FRAMEERR 0x6F 68#define CUE_LEDCTL 0x81 69/* Advenced operating mode register. */ 70#define CUE_AOP_SRAMWAITS 0x03 71#define CUE_AOP_EMBED_RXLEN 0x08 72#define CUE_AOP_RXCOMBINE 0x10 73#define CUE_AOP_TXCOMBINE 0x20 74#define CUE_AOP_EVEN_PKT_READS 0x40 75#define CUE_AOP_LOOPBK 0x80 76/* Ethernet control register. */ 77#define CUE_ETHCTL_RX_ON 0x01 78#define CUE_ETHCTL_LINK_POLARITY 0x02 79#define CUE_ETHCTL_LINK_FORCE_OK 0x04 80#define CUE_ETHCTL_MCAST_ON 0x08 81#define CUE_ETHCTL_PROMISC 0x10 82/* Ethernet status register. */ 83#define CUE_ETHSTS_NO_CARRIER 0x01 84#define CUE_ETHSTS_LATECOLL 0x02 85#define CUE_ETHSTS_EXCESSCOLL 0x04 86#define CUE_ETHSTS_TXBUF_AVAIL 0x08 87#define CUE_ETHSTS_BAD_POLARITY 0x10 88#define CUE_ETHSTS_LINK_OK 0x20 89/* LED control register. */ 90#define CUE_LEDCTL_BLINK_1X 0x00 91#define CUE_LEDCTL_BLINK_2X 0x01 92#define CUE_LEDCTL_BLINK_QUARTER_ON 0x02 93#define CUE_LEDCTL_BLINK_QUARTER_OFF 0x03 94#define CUE_LEDCTL_OFF 0x04 95#define CUE_LEDCTL_FOLLOW_LINK 0x08 96 97/* 98 * Address in ASIC's internal SRAM where the multicast hash table lives. 99 * The table is 64 bytes long, giving us a 512-bit table. We have to set 100 * the bit that corresponds to the broadcast address in order to enable 101 * reception of broadcast frames. 102 */ 103#define CUE_MCAST_TABLE_ADDR 0xFA80 104 105#define CUE_TIMEOUT 1000 106#define CUE_MIN_FRAMELEN 60 107#define CUE_RX_FRAMES 1 108#define CUE_TX_FRAMES 1 109 110#define CUE_CTL_READ 0x01 111#define CUE_CTL_WRITE 0x02 112 113#define CUE_CONFIG_IDX 0 /* config number 1 */ 114#define CUE_IFACE_IDX 0 115 116/* The interrupt endpoint is currently unused by the CATC part. */ 117enum { 118 CUE_BULK_DT_WR, 119 CUE_BULK_DT_RD, 120 CUE_N_TRANSFER, 121}; 122 123struct cue_softc { 124 struct usb_ether sc_ue; 125 struct mtx sc_mtx; 126 struct usb_xfer *sc_xfer[CUE_N_TRANSFER]; 127 128 int sc_flags; 129#define CUE_FLAG_LINK 0x0001 /* got a link */ 130}; 131 132#define CUE_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx) 133#define CUE_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx) 134#define CUE_LOCK_ASSERT(_sc, t) mtx_assert(&(_sc)->sc_mtx, t) 135