1/*
2 * Copyright (c) 2018-2019 Cavium, Inc.
3 * All rights reserved.
4 *
5 *  Redistribution and use in source and binary forms, with or without
6 *  modification, are permitted provided that the following conditions
7 *  are met:
8 *
9 *  1. Redistributions of source code must retain the above copyright
10 *     notice, this list of conditions and the following disclaimer.
11 *  2. Redistributions in binary form must reproduce the above copyright
12 *     notice, this list of conditions and the following disclaimer in the
13 *     documentation and/or other materials provided with the distribution.
14 *
15 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
16 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
19 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
20 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
21 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
22 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
23 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
24 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 *  POSSIBILITY OF SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 *
29 */
30
31#ifndef __QLNXR_USER_H__
32#define __QLNXR_USER_H__
33
34#define QLNXR_ABI_VERSION		(7)
35#define QLNXR_BE_ROCE_ABI_VERSION	(1)
36
37/* user kernel communication data structures. */
38
39struct qlnxr_alloc_ucontext_resp {
40	u64 db_pa;
41	u32 db_size;
42
43	uint32_t max_send_wr;
44	uint32_t max_recv_wr;
45	uint32_t max_srq_wr;
46	uint32_t sges_per_send_wr;
47	uint32_t sges_per_recv_wr;
48	uint32_t sges_per_srq_wr;
49	int max_cqes;
50	uint8_t dpm_enabled;
51	uint8_t wids_enabled;
52	uint16_t wid_count;
53};
54
55struct qlnxr_alloc_pd_ureq {
56	u64 rsvd1;
57};
58
59struct qlnxr_alloc_pd_uresp {
60	u32 pd_id;
61};
62
63struct qlnxr_create_cq_ureq {
64	uint64_t addr;		/* user space virtual address of CQ buffer */
65	size_t len;		/* size of CQ buffer */
66};
67
68struct qlnxr_create_cq_uresp {
69	u32 db_offset;
70	u16 icid;
71};
72
73struct qlnxr_create_qp_ureq {
74	u32 qp_handle_hi;
75	u32 qp_handle_lo;
76
77	/* SQ */
78	uint64_t sq_addr;	/* user space virtual address of SQ buffer */
79	size_t sq_len;		/* length of SQ buffer */
80
81	/* RQ */
82	uint64_t rq_addr;	/* user space virtual address of RQ buffer */
83	size_t rq_len;		/* length of RQ buffer */
84};
85
86struct qlnxr_create_qp_uresp {
87	u32 qp_id;
88	int atomic_supported;
89
90	/* SQ*/
91	u32 sq_db_offset;
92	u16 sq_icid;
93
94	/* RQ */
95	u32 rq_db_offset;
96	u16 rq_icid;
97
98	u32 rq_db2_offset;
99};
100
101struct qlnxr_create_srq_ureq {
102	/* user space virtual address of producer pair */
103	uint64_t prod_pair_addr;
104	uint64_t srq_addr;	/* user space virtual address of SQ buffer */
105	size_t srq_len;		/* length of SQ buffer */
106};
107
108struct qlnxr_create_srq_uresp {
109	u16 srq_id;
110};
111
112#endif	/* #ifndef __QLNXR_USER_H__ */
113