1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2005 John Baldwin <jhb@FreeBSD.org>
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25 * SUCH DAMAGE.
26 */
27
28#include <sys/cdefs.h>
29__FBSDID("$FreeBSD$");
30
31/*
32 * Simple driver for PCI VGA display devices.  Drivers such as agp(4) and
33 * drm(4) should attach as children of this device.
34 *
35 * XXX: The vgapci name is a hack until we somehow merge the isa vga driver
36 * in or rename it.
37 */
38
39#include <sys/param.h>
40#include <sys/bus.h>
41#include <sys/kernel.h>
42#include <sys/module.h>
43#include <sys/rman.h>
44#include <sys/sysctl.h>
45#include <sys/systm.h>
46
47#if defined(__amd64__) || defined(__i386__)
48#include <vm/vm.h>
49#include <vm/pmap.h>
50#endif
51
52#include <dev/pci/pcireg.h>
53#include <dev/pci/pcivar.h>
54
55#include <compat/x86bios/x86bios.h> /* To re-POST the card. */
56
57struct vga_resource {
58	struct resource	*vr_res;
59	int	vr_refs;
60};
61
62struct vga_pci_softc {
63	device_t	vga_msi_child;	/* Child driver using MSI. */
64	struct vga_resource vga_bars[PCIR_MAX_BAR_0 + 1];
65	struct vga_resource vga_bios;
66};
67
68SYSCTL_DECL(_hw_pci);
69
70static struct vga_resource *lookup_res(struct vga_pci_softc *sc, int rid);
71static struct resource *vga_pci_alloc_resource(device_t dev, device_t child,
72    int type, int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
73    u_int flags);
74static int	vga_pci_release_resource(device_t dev, device_t child, int type,
75    int rid, struct resource *r);
76
77int vga_pci_default_unit = -1;
78SYSCTL_INT(_hw_pci, OID_AUTO, default_vgapci_unit, CTLFLAG_RDTUN,
79    &vga_pci_default_unit, -1, "Default VGA-compatible display");
80
81int
82vga_pci_is_boot_display(device_t dev)
83{
84	int unit;
85	device_t pcib;
86	uint16_t config;
87
88	/* Check that the given device is a video card */
89	if ((pci_get_class(dev) != PCIC_DISPLAY &&
90	    (pci_get_class(dev) != PCIC_OLD ||
91	     pci_get_subclass(dev) != PCIS_OLD_VGA)))
92		return (0);
93
94	unit = device_get_unit(dev);
95
96	if (vga_pci_default_unit >= 0) {
97		/*
98		 * The boot display device was determined by a previous
99		 * call to this function, or the user forced it using
100		 * the hw.pci.default_vgapci_unit tunable.
101		 */
102		return (vga_pci_default_unit == unit);
103	}
104
105	/*
106	 * The primary video card used as a boot display must have the
107	 * "I/O" and "Memory Address Space Decoding" bits set in its
108	 * Command register.
109	 *
110	 * Furthermore, if the card is attached to a bridge, instead of
111	 * the root PCI bus, the bridge must have the "VGA Enable" bit
112	 * set in its Control register.
113	 */
114
115	pcib = device_get_parent(device_get_parent(dev));
116	if (device_get_devclass(device_get_parent(pcib)) ==
117	    devclass_find("pci")) {
118		/*
119		 * The parent bridge is a PCI-to-PCI bridge: check the
120		 * value of the "VGA Enable" bit.
121		 */
122		config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2);
123		if ((config & PCIB_BCR_VGA_ENABLE) == 0)
124			return (0);
125	}
126
127	config = pci_read_config(dev, PCIR_COMMAND, 2);
128	if ((config & (PCIM_CMD_PORTEN | PCIM_CMD_MEMEN)) == 0)
129		return (0);
130
131	/*
132	 * Disable interrupts until a chipset driver is loaded for
133	 * this PCI device. Else unhandled display adapter interrupts
134	 * might freeze the CPU.
135	 */
136	pci_write_config(dev, PCIR_COMMAND, config | PCIM_CMD_INTxDIS, 2);
137
138	/* This video card is the boot display: record its unit number. */
139	vga_pci_default_unit = unit;
140	device_set_flags(dev, 1);
141
142	return (1);
143}
144
145static void
146vga_pci_reset(device_t dev)
147{
148	int ps;
149	/*
150	 * FLR is unsupported on GPUs so attempt a power-management reset by cycling
151	 * the device in/out of D3 state.
152	 * PCI spec says we can only go into D3 state from D0 state.
153	 * Transition from D[12] into D0 before going to D3 state.
154	 */
155	ps = pci_get_powerstate(dev);
156	if (ps != PCI_POWERSTATE_D0 && ps != PCI_POWERSTATE_D3)
157		pci_set_powerstate(dev, PCI_POWERSTATE_D0);
158	if (pci_get_powerstate(dev) != PCI_POWERSTATE_D3)
159		pci_set_powerstate(dev, PCI_POWERSTATE_D3);
160	pci_set_powerstate(dev, ps);
161}
162
163void *
164vga_pci_map_bios(device_t dev, size_t *size)
165{
166	struct vga_resource *vr;
167	struct resource *res;
168	device_t pcib;
169	uint32_t rom_addr;
170	uint16_t config;
171	volatile unsigned char *bios;
172	int i, rid, found;
173
174#if defined(__amd64__) || defined(__i386__)
175	if (vga_pci_is_boot_display(dev)) {
176		/*
177		 * On x86, the System BIOS copy the default display
178		 * device's Video BIOS at a fixed location in system
179		 * memory (0xC0000, 128 kBytes long) at boot time.
180		 *
181		 * We use this copy for the default boot device, because
182		 * the original ROM may not be valid after boot.
183		 */
184
185		*size = VGA_PCI_BIOS_SHADOW_SIZE;
186		return (pmap_mapbios(VGA_PCI_BIOS_SHADOW_ADDR, *size));
187	}
188#endif
189
190	pcib = device_get_parent(device_get_parent(dev));
191	if (device_get_devclass(device_get_parent(pcib)) ==
192	    devclass_find("pci")) {
193		/*
194		 * The parent bridge is a PCI-to-PCI bridge: check the
195		 * value of the "VGA Enable" bit.
196		 */
197		config = pci_read_config(pcib, PCIR_BRIDGECTL_1, 2);
198		if ((config & PCIB_BCR_VGA_ENABLE) == 0) {
199			config |= PCIB_BCR_VGA_ENABLE;
200			pci_write_config(pcib, PCIR_BRIDGECTL_1, config, 2);
201		}
202	}
203
204	switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) {
205	case PCIM_HDRTYPE_BRIDGE:
206		rid = PCIR_BIOS_1;
207		break;
208	case PCIM_HDRTYPE_CARDBUS:
209		rid = 0;
210		break;
211	default:
212		rid = PCIR_BIOS;
213		break;
214	}
215	if (rid == 0)
216		return (NULL);
217	res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0,
218	    ~0, 1, RF_ACTIVE);
219
220	if (res == NULL) {
221		device_printf(dev, "vga_pci_alloc_resource failed\n");
222		return (NULL);
223	}
224	bios = rman_get_virtual(res);
225	*size = rman_get_size(res);
226	for (found = i = 0; i < hz; i++) {
227		found = (bios[0] == 0x55 && bios[1] == 0xaa);
228		if (found)
229			break;
230		pause("vgabios", 1);
231	}
232	if (found)
233		return (__DEVOLATILE(void *, bios));
234	if (bootverbose)
235		device_printf(dev, "initial ROM mapping failed -- resetting\n");
236
237	/*
238	 * Enable ROM decode
239	 */
240	vga_pci_reset(dev);
241	rom_addr = pci_read_config(dev, rid, 4);
242	rom_addr &= 0x7ff;
243	rom_addr |= rman_get_start(res) | 0x1;
244	pci_write_config(dev, rid, rom_addr, 4);
245	vr = lookup_res(device_get_softc(dev), rid);
246	vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid,
247	    vr->vr_res);
248
249	/*
250	 * re-allocate
251	 */
252	res = vga_pci_alloc_resource(dev, NULL, SYS_RES_MEMORY, &rid, 0,
253	    ~0, 1, RF_ACTIVE);
254	if (res == NULL) {
255		device_printf(dev, "vga_pci_alloc_resource failed\n");
256		return (NULL);
257	}
258	bios = rman_get_virtual(res);
259	*size = rman_get_size(res);
260	for (found = i = 0; i < 3*hz; i++) {
261		found = (bios[0] == 0x55 && bios[1] == 0xaa);
262		if (found)
263			break;
264		pause("vgabios", 1);
265	}
266	if (found)
267		return (__DEVOLATILE(void *, bios));
268	device_printf(dev, "ROM mapping failed\n");
269	vr = lookup_res(device_get_softc(dev), rid);
270	vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid,
271	    vr->vr_res);
272	return (NULL);
273}
274
275void
276vga_pci_unmap_bios(device_t dev, void *bios)
277{
278	struct vga_resource *vr;
279	int rid;
280
281	if (bios == NULL) {
282		return;
283	}
284
285#if defined(__amd64__) || defined(__i386__)
286	if (vga_pci_is_boot_display(dev)) {
287		/* We mapped the BIOS shadow copy located at 0xC0000. */
288		pmap_unmapdev((vm_offset_t)bios, VGA_PCI_BIOS_SHADOW_SIZE);
289
290		return;
291	}
292#endif
293	switch(pci_read_config(dev, PCIR_HDRTYPE, 1)) {
294	case PCIM_HDRTYPE_BRIDGE:
295		rid = PCIR_BIOS_1;
296		break;
297	case PCIM_HDRTYPE_CARDBUS:
298		rid = 0;
299		break;
300	default:
301		rid = PCIR_BIOS;
302		break;
303	}
304	if (rid == 0)
305		return;
306	/*
307	 * Look up the PCIR_BIOS resource in our softc.  It should match
308	 * the address we returned previously.
309	 */
310	vr = lookup_res(device_get_softc(dev), rid);
311	KASSERT(vr->vr_res != NULL, ("vga_pci_unmap_bios: bios not mapped"));
312	KASSERT(rman_get_virtual(vr->vr_res) == bios,
313	    ("vga_pci_unmap_bios: mismatch"));
314	vga_pci_release_resource(dev, NULL, SYS_RES_MEMORY, rid,
315	    vr->vr_res);
316}
317
318int
319vga_pci_repost(device_t dev)
320{
321#if defined(__amd64__) || defined(__i386__)
322	x86regs_t regs;
323
324	if (!vga_pci_is_boot_display(dev))
325		return (EINVAL);
326
327	if (x86bios_get_orm(VGA_PCI_BIOS_SHADOW_ADDR) == NULL)
328		return (ENOTSUP);
329
330	x86bios_init_regs(&regs);
331
332	regs.R_AH = pci_get_bus(dev);
333	regs.R_AL = (pci_get_slot(dev) << 3) | (pci_get_function(dev) & 0x07);
334	regs.R_DL = 0x80;
335
336	device_printf(dev, "REPOSTing\n");
337	x86bios_call(&regs, X86BIOS_PHYSTOSEG(VGA_PCI_BIOS_SHADOW_ADDR + 3),
338	    X86BIOS_PHYSTOOFF(VGA_PCI_BIOS_SHADOW_ADDR + 3));
339
340	x86bios_get_intr(0x10);
341
342	return (0);
343#else
344	return (ENOTSUP);
345#endif
346}
347
348static int
349vga_pci_probe(device_t dev)
350{
351
352	switch (pci_get_class(dev)) {
353	case PCIC_DISPLAY:
354		break;
355	case PCIC_OLD:
356		if (pci_get_subclass(dev) != PCIS_OLD_VGA)
357			return (ENXIO);
358		break;
359	default:
360		return (ENXIO);
361	}
362
363	/* Probe default display. */
364	vga_pci_is_boot_display(dev);
365
366	device_set_desc(dev, "VGA-compatible display");
367	return (BUS_PROBE_GENERIC);
368}
369
370static int
371vga_pci_attach(device_t dev)
372{
373
374	bus_generic_probe(dev);
375
376	/* Always create a drm child for now to make it easier on drm. */
377	device_add_child(dev, "drm", -1);
378	device_add_child(dev, "drmn", -1);
379	bus_generic_attach(dev);
380
381	if (vga_pci_is_boot_display(dev))
382		device_printf(dev, "Boot video device\n");
383
384	return (0);
385}
386
387static int
388vga_pci_suspend(device_t dev)
389{
390
391	return (bus_generic_suspend(dev));
392}
393
394static int
395vga_pci_detach(device_t dev)
396{
397	int error;
398
399	error = bus_generic_detach(dev);
400	if (error == 0)
401		error = device_delete_children(dev);
402	return (error);
403}
404
405static int
406vga_pci_resume(device_t dev)
407{
408
409	return (bus_generic_resume(dev));
410}
411
412/* Bus interface. */
413
414static int
415vga_pci_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
416{
417
418	return (BUS_READ_IVAR(device_get_parent(dev), dev, which, result));
419}
420
421static int
422vga_pci_write_ivar(device_t dev, device_t child, int which, uintptr_t value)
423{
424
425	return (EINVAL);
426}
427
428static int
429vga_pci_setup_intr(device_t dev, device_t child, struct resource *irq,
430    int flags, driver_filter_t *filter, driver_intr_t *intr, void *arg,
431    void **cookiep)
432{
433	return (BUS_SETUP_INTR(device_get_parent(dev), dev, irq, flags,
434	    filter, intr, arg, cookiep));
435}
436
437static int
438vga_pci_teardown_intr(device_t dev, device_t child, struct resource *irq,
439    void *cookie)
440{
441	return (BUS_TEARDOWN_INTR(device_get_parent(dev), dev, irq, cookie));
442}
443
444static struct vga_resource *
445lookup_res(struct vga_pci_softc *sc, int rid)
446{
447	int bar;
448
449	if (rid == PCIR_BIOS)
450		return (&sc->vga_bios);
451	bar = PCI_RID2BAR(rid);
452	if (bar >= 0 && bar <= PCIR_MAX_BAR_0)
453		return (&sc->vga_bars[bar]);
454	return (NULL);
455}
456
457static struct resource *
458vga_pci_alloc_resource(device_t dev, device_t child, int type, int *rid,
459    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags)
460{
461	struct vga_resource *vr;
462
463	switch (type) {
464	case SYS_RES_MEMORY:
465	case SYS_RES_IOPORT:
466		/*
467		 * For BARs, we cache the resource so that we only allocate it
468		 * from the PCI bus once.
469		 */
470		vr = lookup_res(device_get_softc(dev), *rid);
471		if (vr == NULL)
472			return (NULL);
473		if (vr->vr_res == NULL)
474			vr->vr_res = bus_alloc_resource(dev, type, rid, start,
475			    end, count, flags);
476		if (vr->vr_res != NULL)
477			vr->vr_refs++;
478		return (vr->vr_res);
479	}
480	return (bus_alloc_resource(dev, type, rid, start, end, count, flags));
481}
482
483static int
484vga_pci_release_resource(device_t dev, device_t child, int type, int rid,
485    struct resource *r)
486{
487	struct vga_resource *vr;
488	int error;
489
490	switch (type) {
491	case SYS_RES_MEMORY:
492	case SYS_RES_IOPORT:
493		/*
494		 * For BARs, we release the resource from the PCI bus
495		 * when the last child reference goes away.
496		 */
497		vr = lookup_res(device_get_softc(dev), rid);
498		if (vr == NULL)
499			return (EINVAL);
500		if (vr->vr_res == NULL)
501			return (EINVAL);
502		KASSERT(vr->vr_res == r, ("vga_pci resource mismatch"));
503		if (vr->vr_refs > 1) {
504			vr->vr_refs--;
505			return (0);
506		}
507		KASSERT(vr->vr_refs > 0,
508		    ("vga_pci resource reference count underflow"));
509		error = bus_release_resource(dev, type, rid, r);
510		if (error == 0) {
511			vr->vr_res = NULL;
512			vr->vr_refs = 0;
513		}
514		return (error);
515	}
516
517	return (bus_release_resource(dev, type, rid, r));
518}
519
520/* PCI interface. */
521
522static uint32_t
523vga_pci_read_config(device_t dev, device_t child, int reg, int width)
524{
525
526	return (pci_read_config(dev, reg, width));
527}
528
529static void
530vga_pci_write_config(device_t dev, device_t child, int reg,
531    uint32_t val, int width)
532{
533
534	pci_write_config(dev, reg, val, width);
535}
536
537static int
538vga_pci_enable_busmaster(device_t dev, device_t child)
539{
540
541	return (pci_enable_busmaster(dev));
542}
543
544static int
545vga_pci_disable_busmaster(device_t dev, device_t child)
546{
547
548	return (pci_disable_busmaster(dev));
549}
550
551static int
552vga_pci_enable_io(device_t dev, device_t child, int space)
553{
554
555	device_printf(dev, "child %s requested pci_enable_io\n",
556	    device_get_nameunit(child));
557	return (pci_enable_io(dev, space));
558}
559
560static int
561vga_pci_disable_io(device_t dev, device_t child, int space)
562{
563
564	device_printf(dev, "child %s requested pci_disable_io\n",
565	    device_get_nameunit(child));
566	return (pci_disable_io(dev, space));
567}
568
569static int
570vga_pci_get_vpd_ident(device_t dev, device_t child, const char **identptr)
571{
572
573	return (pci_get_vpd_ident(dev, identptr));
574}
575
576static int
577vga_pci_get_vpd_readonly(device_t dev, device_t child, const char *kw,
578    const char **vptr)
579{
580
581	return (pci_get_vpd_readonly(dev, kw, vptr));
582}
583
584static int
585vga_pci_set_powerstate(device_t dev, device_t child, int state)
586{
587
588	device_printf(dev, "child %s requested pci_set_powerstate\n",
589	    device_get_nameunit(child));
590	return (pci_set_powerstate(dev, state));
591}
592
593static int
594vga_pci_get_powerstate(device_t dev, device_t child)
595{
596
597	device_printf(dev, "child %s requested pci_get_powerstate\n",
598	    device_get_nameunit(child));
599	return (pci_get_powerstate(dev));
600}
601
602static int
603vga_pci_assign_interrupt(device_t dev, device_t child)
604{
605
606	device_printf(dev, "child %s requested pci_assign_interrupt\n",
607	    device_get_nameunit(child));
608	return (PCI_ASSIGN_INTERRUPT(device_get_parent(dev), dev));
609}
610
611static int
612vga_pci_find_cap(device_t dev, device_t child, int capability,
613    int *capreg)
614{
615
616	return (pci_find_cap(dev, capability, capreg));
617}
618
619static int
620vga_pci_find_next_cap(device_t dev, device_t child, int capability,
621    int start, int *capreg)
622{
623
624	return (pci_find_next_cap(dev, capability, start, capreg));
625}
626
627static int
628vga_pci_find_extcap(device_t dev, device_t child, int capability,
629    int *capreg)
630{
631
632	return (pci_find_extcap(dev, capability, capreg));
633}
634
635static int
636vga_pci_find_next_extcap(device_t dev, device_t child, int capability,
637    int start, int *capreg)
638{
639
640	return (pci_find_next_extcap(dev, capability, start, capreg));
641}
642
643static int
644vga_pci_find_htcap(device_t dev, device_t child, int capability,
645    int *capreg)
646{
647
648	return (pci_find_htcap(dev, capability, capreg));
649}
650
651static int
652vga_pci_find_next_htcap(device_t dev, device_t child, int capability,
653    int start, int *capreg)
654{
655
656	return (pci_find_next_htcap(dev, capability, start, capreg));
657}
658
659static int
660vga_pci_alloc_msi(device_t dev, device_t child, int *count)
661{
662	struct vga_pci_softc *sc;
663	int error;
664
665	sc = device_get_softc(dev);
666	if (sc->vga_msi_child != NULL)
667		return (EBUSY);
668	error = pci_alloc_msi(dev, count);
669	if (error == 0)
670		sc->vga_msi_child = child;
671	return (error);
672}
673
674static int
675vga_pci_alloc_msix(device_t dev, device_t child, int *count)
676{
677	struct vga_pci_softc *sc;
678	int error;
679
680	sc = device_get_softc(dev);
681	if (sc->vga_msi_child != NULL)
682		return (EBUSY);
683	error = pci_alloc_msix(dev, count);
684	if (error == 0)
685		sc->vga_msi_child = child;
686	return (error);
687}
688
689static int
690vga_pci_remap_msix(device_t dev, device_t child, int count,
691    const u_int *vectors)
692{
693	struct vga_pci_softc *sc;
694
695	sc = device_get_softc(dev);
696	if (sc->vga_msi_child != child)
697		return (ENXIO);
698	return (pci_remap_msix(dev, count, vectors));
699}
700
701static int
702vga_pci_release_msi(device_t dev, device_t child)
703{
704	struct vga_pci_softc *sc;
705	int error;
706
707	sc = device_get_softc(dev);
708	if (sc->vga_msi_child != child)
709		return (ENXIO);
710	error = pci_release_msi(dev);
711	if (error == 0)
712		sc->vga_msi_child = NULL;
713	return (error);
714}
715
716static int
717vga_pci_msi_count(device_t dev, device_t child)
718{
719
720	return (pci_msi_count(dev));
721}
722
723static int
724vga_pci_msix_count(device_t dev, device_t child)
725{
726
727	return (pci_msix_count(dev));
728}
729
730static bus_dma_tag_t
731vga_pci_get_dma_tag(device_t bus, device_t child)
732{
733
734	return (bus_get_dma_tag(bus));
735}
736
737static device_method_t vga_pci_methods[] = {
738	/* Device interface */
739	DEVMETHOD(device_probe,		vga_pci_probe),
740	DEVMETHOD(device_attach,	vga_pci_attach),
741	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
742	DEVMETHOD(device_suspend,	vga_pci_suspend),
743	DEVMETHOD(device_detach,	vga_pci_detach),
744	DEVMETHOD(device_resume,	vga_pci_resume),
745
746	/* Bus interface */
747	DEVMETHOD(bus_read_ivar,	vga_pci_read_ivar),
748	DEVMETHOD(bus_write_ivar,	vga_pci_write_ivar),
749	DEVMETHOD(bus_setup_intr,	vga_pci_setup_intr),
750	DEVMETHOD(bus_teardown_intr,	vga_pci_teardown_intr),
751	DEVMETHOD(bus_alloc_resource,	vga_pci_alloc_resource),
752	DEVMETHOD(bus_release_resource,	vga_pci_release_resource),
753	DEVMETHOD(bus_activate_resource, bus_generic_activate_resource),
754	DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
755	DEVMETHOD(bus_get_dma_tag,	vga_pci_get_dma_tag),
756
757	/* PCI interface */
758	DEVMETHOD(pci_read_config,	vga_pci_read_config),
759	DEVMETHOD(pci_write_config,	vga_pci_write_config),
760	DEVMETHOD(pci_enable_busmaster,	vga_pci_enable_busmaster),
761	DEVMETHOD(pci_disable_busmaster, vga_pci_disable_busmaster),
762	DEVMETHOD(pci_enable_io,	vga_pci_enable_io),
763	DEVMETHOD(pci_disable_io,	vga_pci_disable_io),
764	DEVMETHOD(pci_get_vpd_ident,	vga_pci_get_vpd_ident),
765	DEVMETHOD(pci_get_vpd_readonly,	vga_pci_get_vpd_readonly),
766	DEVMETHOD(pci_get_powerstate,	vga_pci_get_powerstate),
767	DEVMETHOD(pci_set_powerstate,	vga_pci_set_powerstate),
768	DEVMETHOD(pci_assign_interrupt,	vga_pci_assign_interrupt),
769	DEVMETHOD(pci_find_cap,		vga_pci_find_cap),
770	DEVMETHOD(pci_find_next_cap,	vga_pci_find_next_cap),
771	DEVMETHOD(pci_find_extcap,	vga_pci_find_extcap),
772	DEVMETHOD(pci_find_next_extcap,	vga_pci_find_next_extcap),
773	DEVMETHOD(pci_find_htcap,	vga_pci_find_htcap),
774	DEVMETHOD(pci_find_next_htcap,	vga_pci_find_next_htcap),
775	DEVMETHOD(pci_alloc_msi,	vga_pci_alloc_msi),
776	DEVMETHOD(pci_alloc_msix,	vga_pci_alloc_msix),
777	DEVMETHOD(pci_remap_msix,	vga_pci_remap_msix),
778	DEVMETHOD(pci_release_msi,	vga_pci_release_msi),
779	DEVMETHOD(pci_msi_count,	vga_pci_msi_count),
780	DEVMETHOD(pci_msix_count,	vga_pci_msix_count),
781	{ 0, 0 }
782};
783
784static driver_t vga_pci_driver = {
785	"vgapci",
786	vga_pci_methods,
787	sizeof(struct vga_pci_softc),
788};
789
790static devclass_t vga_devclass;
791
792DRIVER_MODULE(vgapci, pci, vga_pci_driver, vga_devclass, 0, 0);
793MODULE_DEPEND(vgapci, x86bios, 1, 1, 1);
794