1/*
2 * Copyright (c) 2017 Stormshield.
3 * Copyright (c) 2017 Semihalf.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
18 * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
19 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
20 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
21 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
23 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
24 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
25 * POSSIBILITY OF SUCH DAMAGE.
26 *
27 * $FreeBSD$
28 *
29 */
30
31#ifndef _IF_MVNETAVAR_H_
32#define	_IF_MVNETAVAR_H_
33#include <net/if.h>
34
35#define	MVNETA_HWHEADER_SIZE		2	/* Marvell Header */
36#define	MVNETA_ETHER_SIZE		22	/* Maximum ether size */
37#define	MVNETA_A370_MAX_CSUM_MTU	1600	/* Max frame len for TX csum */
38#define	MVNETA_A3700_MAX_CSUM_MTU	9600
39
40#define	MVNETA_MAX_FRAME		(MJUM9BYTES)
41
42/*
43 * Default limit of queue length
44 *
45 * queue 0 is lowest priority and queue 7 is highest priority.
46 * IP packet is received on queue 7 by default.
47 */
48#define	MVNETA_TX_RING_CNT	512
49#define	MVNETA_RX_RING_CNT	256
50
51#define	MVNETA_BUFRING_SIZE	1024
52
53#define	MVNETA_PACKET_OFFSET	64
54
55#define	MVNETA_RXTH_COUNT	128
56#define	MVNETA_RX_REFILL_COUNT	8
57#define	MVNETA_TX_RECLAIM_COUNT	32
58
59/*
60 * Device Register access
61 */
62#define	MVNETA_READ(sc, reg) \
63	bus_read_4((sc)->res[0], (reg))
64#define	MVNETA_WRITE(sc, reg, val) \
65	bus_write_4((sc)->res[0], (reg), (val))
66
67#define	MVNETA_READ_REGION(sc, reg, val, c) \
68	bus_read_region_4((sc)->res[0], (reg), (val), (c))
69#define	MVNETA_WRITE_REGION(sc, reg, val, c) \
70	bus_write_region_4((sc)->res[0], (reg), (val), (c))
71
72#define	MVNETA_READ_MIB(sc, reg) \
73	bus_read_4((sc)->res[0], MVNETA_PORTMIB_BASE + (reg))
74
75#define	MVNETA_IS_LINKUP(sc) \
76	(MVNETA_READ((sc), MVNETA_PSR) & MVNETA_PSR_LINKUP)
77
78#define	MVNETA_IS_QUEUE_SET(queues, q) \
79	((((queues) >> (q)) & 0x1))
80
81/*
82 * EEE: Lower Power Idle config
83 * Default timer is duration of MTU sized frame transmission.
84 * The timer can be negotiated by LLDP protocol, but we have no
85 * support.
86 */
87#define	MVNETA_LPI_TS		(ETHERMTU * 8 / 1000) /* [us] */
88#define	MVNETA_LPI_TW		(ETHERMTU * 8 / 1000) /* [us] */
89#define	MVNETA_LPI_LI		(ETHERMTU * 8 / 1000) /* [us] */
90
91/*
92 * DMA Descriptor
93 *
94 * the ethernet device has 8 rx/tx DMA queues. each of queue has its own
95 * decriptor list. descriptors are simply index by counter inside the device.
96 */
97#define	MVNETA_TX_SEGLIMIT	32
98
99#define	MVNETA_QUEUE_IDLE	1
100#define	MVNETA_QUEUE_WORKING	2
101#define	MVNETA_QUEUE_DISABLED	3
102
103struct mvneta_buf {
104	struct mbuf *	m;	/* pointer to related mbuf */
105	bus_dmamap_t	dmap;
106};
107
108struct mvneta_rx_ring {
109	int				queue_status;
110	/* Real descriptors array. shared by RxDMA */
111	struct mvneta_rx_desc		*desc;
112	bus_dmamap_t			desc_map;
113	bus_addr_t			desc_pa;
114
115	/* Virtual address of the RX buffer */
116	void 				*rxbuf_virt_addr[MVNETA_RX_RING_CNT];
117
118	/* Managment entries for each of descritors */
119	struct mvneta_buf		rxbuf[MVNETA_RX_RING_CNT];
120
121	/* locks */
122	struct mtx			ring_mtx;
123
124	/* Index */
125	int				dma;
126	int				cpu;
127
128	/* Limit */
129	int				queue_th_received;
130	int				queue_th_time; /* [Tclk] */
131
132	/* LRO */
133	struct lro_ctrl			lro;
134	boolean_t			lro_enabled;
135	/* Is this queue out of mbuf */
136	boolean_t			needs_refill;
137} __aligned(CACHE_LINE_SIZE);
138
139struct mvneta_tx_ring {
140	/* Index of this queue */
141	int				qidx;
142	/* IFNET pointer */
143	struct ifnet			*ifp;
144	/* Ring buffer for IFNET */
145	struct buf_ring			*br;
146	/* Real descriptors array. shared by TxDMA */
147	struct mvneta_tx_desc		*desc;
148	bus_dmamap_t			desc_map;
149	bus_addr_t			desc_pa;
150
151	/* Managment entries for each of descritors */
152	struct mvneta_buf		txbuf[MVNETA_TX_RING_CNT];
153
154	/* locks */
155	struct mtx			ring_mtx;
156
157	/* Index */
158	int				used;
159	int				dma;
160	int				cpu;
161
162	/* watchdog */
163#define	MVNETA_WATCHDOG_TXCOMP	(hz / 10) /* 100ms */
164#define	MVNETA_WATCHDOG	(10 * hz) /* 10s */
165	int				watchdog_time;
166	int				queue_status;
167	boolean_t			queue_hung;
168
169	/* Task */
170	struct task			task;
171	struct taskqueue		*taskq;
172
173	/* Stats */
174	uint32_t			drv_error;
175} __aligned(CACHE_LINE_SIZE);
176
177static __inline int
178tx_counter_adv(int ctr, int n)
179{
180
181	ctr += n;
182	while (__predict_false(ctr >= MVNETA_TX_RING_CNT))
183		ctr -= MVNETA_TX_RING_CNT;
184
185	return (ctr);
186}
187
188static __inline int
189rx_counter_adv(int ctr, int n)
190{
191
192	ctr += n;
193	while (__predict_false(ctr >= MVNETA_RX_RING_CNT))
194		ctr -= MVNETA_RX_RING_CNT;
195
196	return (ctr);
197}
198
199/*
200 * Timeout control
201 */
202#define	MVNETA_PHY_TIMEOUT	10000	/* msec */
203#define	RX_DISABLE_TIMEOUT	0x1000000 /* times */
204#define	TX_DISABLE_TIMEOUT	0x1000000 /* times */
205#define	TX_FIFO_EMPTY_TIMEOUT	0x1000000 /* times */
206
207/*
208 * Debug
209 */
210#define	KASSERT_SC_MTX(sc) \
211    KASSERT(mtx_owned(&(sc)->mtx), ("SC mutex not owned"))
212#define	KASSERT_BM_MTX(sc) \
213    KASSERT(mtx_owned(&(sc)->bm.bm_mtx), ("BM mutex not owned"))
214#define	KASSERT_RX_MTX(sc, q) \
215    KASSERT(mtx_owned(&(sc)->rx_ring[(q)].ring_mtx),\
216        ("RX mutex not owned"))
217#define	KASSERT_TX_MTX(sc, q) \
218    KASSERT(mtx_owned(&(sc)->tx_ring[(q)].ring_mtx),\
219        ("TX mutex not owned"))
220
221/*
222 * sysctl(9) parameters
223 */
224struct mvneta_sysctl_queue {
225	struct mvneta_softc	*sc;
226	int			rxtx;
227	int			queue;
228};
229#define	MVNETA_SYSCTL_RX		0
230#define	MVNETA_SYSCTL_TX		1
231
232struct mvneta_sysctl_mib {
233	struct mvneta_softc	*sc;
234	int			index;
235	uint64_t		counter;
236};
237
238enum mvneta_phy_mode {
239	MVNETA_PHY_QSGMII,
240	MVNETA_PHY_SGMII,
241	MVNETA_PHY_RGMII,
242	MVNETA_PHY_RGMII_ID
243};
244
245/*
246 * Ethernet Device main context
247 */
248DECLARE_CLASS(mvneta_driver);
249
250struct mvneta_softc {
251	device_t	dev;
252	uint32_t	version;
253	/*
254	 * mtx must be held by interface functions to/from
255	 * other frameworks. interrupt hander, sysctl hander,
256	 * ioctl hander, and so on.
257	 */
258	struct mtx	mtx;
259	struct resource *res[2];
260	void            *ih_cookie[1];
261
262	struct ifnet	*ifp;
263	uint32_t        mvneta_if_flags;
264	uint32_t        mvneta_media;
265	uint32_t	tx_csum_limit;
266	uint32_t	rx_frame_size;
267
268	int			phy_attached;
269	enum mvneta_phy_mode	phy_mode;
270	int			phy_addr;
271	int			phy_speed;	/* PHY speed */
272	boolean_t		phy_fdx;	/* Full duplex mode */
273	boolean_t		autoneg;	/* Autonegotiation status */
274	boolean_t		use_inband_status;	/* In-band link status */
275
276	/*
277	 * Link State control
278	 */
279	boolean_t	linkup;
280        device_t        miibus;
281	struct mii_data *mii;
282	uint8_t		enaddr[ETHER_ADDR_LEN];
283	struct ifmedia	mvneta_ifmedia;
284
285	bus_dma_tag_t	rx_dtag;
286	bus_dma_tag_t	rxbuf_dtag;
287	bus_dma_tag_t	tx_dtag;
288	bus_dma_tag_t	txmbuf_dtag;
289	struct mvneta_rx_ring		rx_ring[MVNETA_RX_QNUM_MAX];
290	struct mvneta_tx_ring		tx_ring[MVNETA_TX_QNUM_MAX];
291
292	/*
293	 * Maintance clock
294	 */
295	struct callout		tick_ch;
296
297	int cf_lpi;
298	int cf_fc;
299	int debug;
300
301	/*
302	 * Sysctl interfaces
303	 */
304	struct mvneta_sysctl_queue sysctl_rx_queue[MVNETA_RX_QNUM_MAX];
305	struct mvneta_sysctl_queue sysctl_tx_queue[MVNETA_TX_QNUM_MAX];
306
307	/*
308	 * MIB counter
309	 */
310	struct mvneta_sysctl_mib sysctl_mib[MVNETA_PORTMIB_NOCOUNTER];
311	uint64_t counter_pdfc;
312	uint64_t counter_pofc;
313	uint32_t counter_watchdog;		/* manual reset when clearing mib */
314	uint32_t counter_watchdog_mib;	/* reset after each mib update */
315};
316#define	MVNETA_RX_RING(sc, q) \
317    (&(sc)->rx_ring[(q)])
318#define	MVNETA_TX_RING(sc, q) \
319    (&(sc)->tx_ring[(q)])
320
321int mvneta_attach(device_t);
322
323#ifdef FDT
324int mvneta_fdt_mac_address(struct mvneta_softc *, uint8_t *);
325#endif
326
327#endif /* _IF_MVNETAVAR_H_ */
328