1/* SPDX-License-Identifier: BSD-3-Clause */
2/*  Copyright (c) 2021, Intel Corporation
3 *  All rights reserved.
4 *
5 *  Redistribution and use in source and binary forms, with or without
6 *  modification, are permitted provided that the following conditions are met:
7 *
8 *   1. Redistributions of source code must retain the above copyright notice,
9 *      this list of conditions and the following disclaimer.
10 *
11 *   2. Redistributions in binary form must reproduce the above copyright
12 *      notice, this list of conditions and the following disclaimer in the
13 *      documentation and/or other materials provided with the distribution.
14 *
15 *   3. Neither the name of the Intel Corporation nor the names of its
16 *      contributors may be used to endorse or promote products derived from
17 *      this software without specific prior written permission.
18 *
19 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
21 *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
22 *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
23 *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24 *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25 *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26 *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27 *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28 *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29 *  POSSIBILITY OF SUCH DAMAGE.
30 */
31/*$FreeBSD$*/
32
33#ifndef _ICE_SBQ_CMD_H_
34#define _ICE_SBQ_CMD_H_
35
36/* This header file defines the Sideband Queue commands, error codes and
37 * descriptor format. It is shared between Firmware and Software.
38 */
39
40/* Sideband Queue command structure and opcodes */
41enum ice_sbq_opc {
42	/* Sideband Queue commands */
43	ice_sbq_opc_neigh_dev_req			= 0x0C00,
44	ice_sbq_opc_neigh_dev_ev			= 0x0C01
45};
46
47/* Sideband Queue descriptor. Indirect command
48 * and non posted
49 */
50struct ice_sbq_cmd_desc {
51	__le16 flags;
52	__le16 opcode;
53	__le16 datalen;
54	__le16 cmd_retval;
55
56	/* Opaque message data */
57	__le32 cookie_high;
58	__le32 cookie_low;
59
60	union {
61		__le16 cmd_len;
62		__le16 cmpl_len;
63	} param0;
64
65	u8 reserved[6];
66	__le32 addr_high;
67	__le32 addr_low;
68};
69
70struct ice_sbq_evt_desc {
71	__le16 flags;
72	__le16 opcode;
73	__le16 datalen;
74	__le16 cmd_retval;
75	u8 data[24];
76};
77
78enum ice_sbq_msg_dev {
79	rmn_0	= 0x02,
80	rmn_1	= 0x03,
81	rmn_2	= 0x04,
82	cgu	= 0x06
83};
84
85enum ice_sbq_msg_opcode {
86	ice_sbq_msg_rd	= 0x00,
87	ice_sbq_msg_wr	= 0x01
88};
89
90#define ICE_SBQ_MSG_FLAGS	0x40
91#define ICE_SBQ_MSG_SBE_FBE	0x0F
92
93struct ice_sbq_msg_req {
94	u8 dest_dev;
95	u8 src_dev;
96	u8 opcode;
97	u8 flags;
98	u8 sbe_fbe;
99	u8 func_id;
100	__le16 msg_addr_low;
101	__le32 msg_addr_high;
102	__le32 data;
103};
104
105struct ice_sbq_msg_cmpl {
106	u8 dest_dev;
107	u8 src_dev;
108	u8 opcode;
109	u8 flags;
110	__le32 data;
111};
112
113/* Internal struct */
114struct ice_sbq_msg_input {
115	u8 dest_dev;
116	u8 opcode;
117	u16 msg_addr_low;
118	u32 msg_addr_high;
119	u32 data;
120};
121#endif /* _ICE_SBQ_CMD_H_ */
122