1/*- 2 * Copyright (c) 2011-2012 Semihalf. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29#ifndef IF_DTSEC_H_ 30#define IF_DTSEC_H_ 31 32/** 33 * @group dTSEC common API. 34 * @{ 35 */ 36#define DTSEC_MODE_REGULAR 0 37#define DTSEC_MODE_INDEPENDENT 1 38 39#define DTSEC_LOCK(sc) mtx_lock(&(sc)->sc_lock) 40#define DTSEC_UNLOCK(sc) mtx_unlock(&(sc)->sc_lock) 41#define DTSEC_LOCK_ASSERT(sc) mtx_assert(&(sc)->sc_lock, MA_OWNED) 42#define DTSEC_MII_LOCK(sc) mtx_lock(&(sc)->sc_mii_lock) 43#define DTSEC_MII_UNLOCK(sc) mtx_unlock(&(sc)->sc_mii_lock) 44 45enum eth_dev_type { 46 ETH_DTSEC = 0x1, 47 ETH_10GSEC = 0x2 48}; 49 50struct dtsec_softc { 51 /* XXX MII bus requires that struct ifnet is first!!! */ 52 struct ifnet *sc_ifnet; 53 54 device_t sc_dev; 55 struct resource *sc_mem; 56 struct mtx sc_lock; 57 int sc_mode; 58 59 /* Methods */ 60 int (*sc_port_rx_init) 61 (struct dtsec_softc *sc, int unit); 62 int (*sc_port_tx_init) 63 (struct dtsec_softc *sc, int unit); 64 void (*sc_start_locked) 65 (struct dtsec_softc *sc); 66 67 /* dTSEC data */ 68 enum eth_dev_type sc_eth_dev_type; 69 uint8_t sc_eth_id; /* Ethernet ID within its frame manager */ 70 uintptr_t sc_mac_mem_offset; 71 e_EnetMode sc_mac_enet_mode; 72 int sc_mac_mdio_irq; 73 uint8_t sc_mac_addr[6]; 74 int sc_port_rx_hw_id; 75 int sc_port_tx_hw_id; 76 uint32_t sc_port_tx_qman_chan; 77 int sc_phy_addr; 78 bool sc_hidden; 79 device_t sc_mdio; 80 81 /* Params from fman_bus driver */ 82 vm_offset_t sc_fm_base; 83 t_Handle sc_fmh; 84 t_Handle sc_muramh; 85 86 t_Handle sc_mach; 87 t_Handle sc_rxph; 88 t_Handle sc_txph; 89 90 /* MII data */ 91 struct mii_data *sc_mii; 92 device_t sc_mii_dev; 93 struct mtx sc_mii_lock; 94 95 struct callout sc_tick_callout; 96 97 /* RX Pool */ 98 t_Handle sc_rx_pool; 99 uint8_t sc_rx_bpid; 100 uma_zone_t sc_rx_zone; 101 char sc_rx_zname[64]; 102 103 /* RX Frame Queue */ 104 t_Handle sc_rx_fqr; 105 uint32_t sc_rx_fqid; 106 107 /* TX Frame Queue */ 108 t_Handle sc_tx_fqr; 109 bool sc_tx_fqr_full; 110 t_Handle sc_tx_conf_fqr; 111 uint32_t sc_tx_conf_fqid; 112 113 /* Frame Info Zone */ 114 uma_zone_t sc_fi_zone; 115 char sc_fi_zname[64]; 116}; 117/** @} */ 118 119 120/** 121 * @group dTSEC FMan PORT API. 122 * @{ 123 */ 124enum dtsec_fm_port_params { 125 FM_PORT_LIODN_BASE = 0, 126 FM_PORT_LIODN_OFFSET = 0, 127 FM_PORT_MEM_ID = 0, 128 FM_PORT_MEM_ATTR = MEMORY_ATTR_CACHEABLE, 129 FM_PORT_BUFFER_SIZE = MCLBYTES, 130}; 131 132e_FmPortType dtsec_fm_port_rx_type(enum eth_dev_type type); 133void dtsec_fm_port_rx_exception_callback(t_Handle app, 134 e_FmPortExceptions exception); 135void dtsec_fm_port_tx_exception_callback(t_Handle app, 136 e_FmPortExceptions exception); 137e_FmPortType dtsec_fm_port_tx_type(enum eth_dev_type type); 138/** @} */ 139 140 141/** 142 * @group dTSEC bus interface. 143 * @{ 144 */ 145int dtsec_attach(device_t dev); 146int dtsec_detach(device_t dev); 147int dtsec_suspend(device_t dev); 148int dtsec_resume(device_t dev); 149int dtsec_shutdown(device_t dev); 150int dtsec_miibus_readreg(device_t dev, int phy, int reg); 151int dtsec_miibus_writereg(device_t dev, int phy, int reg, 152 int value); 153void dtsec_miibus_statchg(device_t dev); 154/** @} */ 155 156#endif /* IF_DTSEC_H_ */ 157