1// SPDX-License-Identifier: GPL-2.0 2// 3// Copyright (C) 2015-2018 Y Soft Corporation, a.s. 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/interrupt-controller/irq.h> 7#include <dt-bindings/input/input.h> 8#include <dt-bindings/pwm/pwm.h> 9 10/ { 11 backlight: backlight { 12 compatible = "pwm-backlight"; 13 pwms = <&pwm1 0 500000 PWM_POLARITY_INVERTED>; 14 brightness-levels = <0 32 64 128 255>; 15 default-brightness-level = <32>; 16 num-interpolated-steps = <8>; 17 power-supply = <&sw2_reg>; 18 status = "disabled"; 19 }; 20 21 lcd_display: display { 22 compatible = "fsl,imx-parallel-display"; 23 #address-cells = <1>; 24 #size-cells = <0>; 25 interface-pix-fmt = "rgb24"; 26 pinctrl-names = "default"; 27 pinctrl-0 = <&pinctrl_ipu1>; 28 status = "disabled"; 29 30 port@0 { 31 reg = <0>; 32 33 lcd_display_in: endpoint { 34 remote-endpoint = <&ipu1_di0_disp0>; 35 }; 36 }; 37 38 port@1 { 39 reg = <1>; 40 41 lcd_display_out: endpoint { 42 remote-endpoint = <&lcd_panel_in>; 43 }; 44 }; 45 }; 46 47 panel: panel { 48 compatible = "dataimage,scf0700c48ggu18"; 49 power-supply = <&sw2_reg>; 50 status = "disabled"; 51 52 port { 53 lcd_panel_in: endpoint { 54 remote-endpoint = <&lcd_display_out>; 55 }; 56 }; 57 }; 58 59 reg_pcie: regulator-pcie { 60 compatible = "regulator-fixed"; 61 pinctrl-names = "default"; 62 pinctrl-0 = <&pinctrl_pcie_reg>; 63 regulator-name = "MPCIE_3V3"; 64 regulator-min-microvolt = <3300000>; 65 regulator-max-microvolt = <3300000>; 66 gpio = <&gpio3 19 GPIO_ACTIVE_HIGH>; 67 enable-active-high; 68 status = "disabled"; 69 }; 70 71 reg_usb_h1_vbus: regulator-usb-h1-vbus { 72 compatible = "regulator-fixed"; 73 pinctrl-names = "default"; 74 pinctrl-0 = <&pinctrl_usbh1_vbus>; 75 regulator-name = "usb_h1_vbus"; 76 regulator-min-microvolt = <5000000>; 77 regulator-max-microvolt = <5000000>; 78 gpio = <&gpio1 29 GPIO_ACTIVE_HIGH>; 79 enable-active-high; 80 status = "disabled"; 81 }; 82 83 reg_usb_otg_vbus: regulator-usb-otg-vbus { 84 compatible = "regulator-fixed"; 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_usbotg_vbus>; 87 regulator-name = "usb_otg_vbus"; 88 regulator-min-microvolt = <5000000>; 89 regulator-max-microvolt = <5000000>; 90 gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 status = "okay"; 93 }; 94}; 95 96&fec { 97 pinctrl-names = "default"; 98 pinctrl-0 = <&pinctrl_enet>; 99 phy-mode = "rgmii-id"; 100 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 101 phy-reset-duration = <20>; 102 phy-supply = <&sw2_reg>; 103 phy-handle = <ðphy0>; 104 status = "okay"; 105 106 mdio { 107 #address-cells = <1>; 108 #size-cells = <0>; 109 110 phy_port2: phy@1 { 111 reg = <1>; 112 }; 113 114 phy_port3: phy@2 { 115 reg = <2>; 116 }; 117 118 switch@10 { 119 compatible = "qca,qca8334"; 120 reg = <10>; 121 122 switch_ports: ports { 123 #address-cells = <1>; 124 #size-cells = <0>; 125 126 ethphy0: port@0 { 127 reg = <0>; 128 label = "cpu"; 129 phy-mode = "rgmii-id"; 130 ethernet = <&fec>; 131 132 fixed-link { 133 speed = <1000>; 134 full-duplex; 135 }; 136 }; 137 138 port@2 { 139 reg = <2>; 140 label = "eth2"; 141 phy-handle = <&phy_port2>; 142 }; 143 144 port@3 { 145 reg = <3>; 146 label = "eth1"; 147 phy-handle = <&phy_port3>; 148 }; 149 }; 150 }; 151 }; 152}; 153 154&hdmi { 155 pinctrl-names = "default"; 156 pinctrl-0 = <&pinctrl_hdmi_cec>; 157 ddc-i2c-bus = <&i2c2>; 158 status = "disabled"; 159}; 160 161&i2c2 { 162 clock-frequency = <100000>; 163 pinctrl-names = "default"; 164 pinctrl-0 = <&pinctrl_i2c2>; 165 status = "okay"; 166 167 pmic@8 { 168 compatible = "fsl,pfuze200"; 169 pinctrl-names = "default"; 170 pinctrl-0 = <&pinctrl_pmic>; 171 reg = <0x8>; 172 173 regulators { 174 sw1a_reg: sw1ab { 175 regulator-min-microvolt = <300000>; 176 regulator-max-microvolt = <1875000>; 177 regulator-boot-on; 178 regulator-always-on; 179 regulator-ramp-delay = <6250>; 180 }; 181 182 sw2_reg: sw2 { 183 regulator-min-microvolt = <800000>; 184 regulator-max-microvolt = <3300000>; 185 regulator-boot-on; 186 regulator-always-on; 187 }; 188 189 sw3a_reg: sw3a { 190 regulator-min-microvolt = <400000>; 191 regulator-max-microvolt = <1975000>; 192 regulator-boot-on; 193 regulator-always-on; 194 }; 195 196 sw3b_reg: sw3b { 197 regulator-min-microvolt = <400000>; 198 regulator-max-microvolt = <1975000>; 199 regulator-boot-on; 200 regulator-always-on; 201 }; 202 203 swbst_reg: swbst { 204 regulator-min-microvolt = <5000000>; 205 regulator-max-microvolt = <5150000>; 206 }; 207 208 vgen1_reg: vgen1 { 209 regulator-min-microvolt = <800000>; 210 regulator-max-microvolt = <1550000>; 211 }; 212 213 vgen2_reg: vgen2 { 214 regulator-min-microvolt = <800000>; 215 regulator-max-microvolt = <1550000>; 216 }; 217 218 vgen3_reg: vgen3 { 219 regulator-min-microvolt = <1800000>; 220 regulator-max-microvolt = <3300000>; 221 regulator-always-on; 222 }; 223 224 vgen4_reg: vgen4 { 225 regulator-min-microvolt = <1800000>; 226 regulator-max-microvolt = <3300000>; 227 regulator-always-on; 228 }; 229 230 vgen5_reg: vgen5 { 231 regulator-min-microvolt = <1800000>; 232 regulator-max-microvolt = <3300000>; 233 regulator-always-on; 234 }; 235 236 vgen6_reg: vgen6 { 237 regulator-min-microvolt = <1800000>; 238 regulator-max-microvolt = <3300000>; 239 regulator-always-on; 240 }; 241 242 vref_reg: vrefddr { 243 regulator-boot-on; 244 regulator-always-on; 245 }; 246 247 vsnvs_reg: vsnvs { 248 regulator-min-microvolt = <1000000>; 249 regulator-max-microvolt = <3000000>; 250 regulator-boot-on; 251 regulator-always-on; 252 }; 253 }; 254 }; 255 256 leds: led-controller@30 { 257 compatible = "ti,lp5562"; 258 reg = <0x30>; 259 clock-mode = /bits/ 8 <1>; 260 status = "disabled"; 261 262 chan0 { 263 chan-name = "R"; 264 led-cur = /bits/ 8 <0x20>; 265 max-cur = /bits/ 8 <0x60>; 266 }; 267 268 chan1 { 269 chan-name = "G"; 270 led-cur = /bits/ 8 <0x20>; 271 max-cur = /bits/ 8 <0x60>; 272 }; 273 274 chan2 { 275 chan-name = "B"; 276 led-cur = /bits/ 8 <0x20>; 277 max-cur = /bits/ 8 <0x60>; 278 }; 279 280 chan3 { 281 chan-name = "W"; 282 led-cur = /bits/ 8 <0x0>; 283 max-cur = /bits/ 8 <0x0>; 284 }; 285 }; 286 287 eeprom@57 { 288 compatible = "atmel,24c128"; 289 reg = <0x57>; 290 pagesize = <64>; 291 status = "okay"; 292 }; 293 294 touchscreen: touchscreen@5c { 295 compatible = "pixcir,pixcir_tangoc"; 296 reg = <0x5c>; 297 pinctrl-0 = <&pinctrl_touch>; 298 interrupt-parent = <&gpio4>; 299 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 300 attb-gpio = <&gpio4 5 GPIO_ACTIVE_HIGH>; 301 reset-gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>; 302 touchscreen-size-x = <800>; 303 touchscreen-size-y = <480>; 304 status = "disabled"; 305 }; 306}; 307 308&i2c3 { 309 clock-frequency = <100000>; 310 pinctrl-names = "default"; 311 pinctrl-0 = <&pinctrl_i2c3>; 312 status = "okay"; 313 314 oled: oled@3d { 315 compatible = "solomon,ssd1305fb-i2c"; 316 reg = <0x3d>; 317 solomon,height = <64>; 318 solomon,width = <128>; 319 solomon,page-offset = <0>; 320 solomon,prechargep2 = <15>; 321 reset-gpios = <&gpio_oled 1 GPIO_ACTIVE_LOW>; 322 vbat-supply = <&sw2_reg>; 323 status = "disabled"; 324 }; 325 326 gpio_oled: gpio@41 { 327 compatible = "nxp,pca9536"; 328 gpio-controller; 329 #gpio-cells = <2>; 330 reg = <0x41>; 331 vcc-supply = <&sw2_reg>; 332 status = "disabled"; 333 }; 334 335 touchkeys: keys@5a { 336 compatible = "fsl,mpr121-touchkey"; 337 reg = <0x5a>; 338 vdd-supply = <&sw2_reg>; 339 autorepeat; 340 linux,keycodes = <KEY_1>, <KEY_2>, <KEY_3>, <KEY_4>, <KEY_5>, 341 <KEY_6>, <KEY_7>, <KEY_8>, <KEY_9>, 342 <KEY_BACKSPACE>, <KEY_0>, <KEY_ENTER>; 343 poll-interval = <50>; 344 status = "disabled"; 345 }; 346}; 347 348&iomuxc { 349 pinctrl_enet: enetgrp { 350 fsl,pins = < 351 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b020 352 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b020 353 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b020 354 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b020 355 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b020 356 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b020 357 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b020 358 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b020 359 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b020 360 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b020 361 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b020 362 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b020 363 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b020 364 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b020 365 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b010 366 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x1b010 367 MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b098 368 >; 369 }; 370 371 pinctrl_hdmi_cec: hdmicecgrp { 372 fsl,pins = < 373 MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1b898 374 >; 375 }; 376 377 pinctrl_i2c2: i2c2grp { 378 fsl,pins = < 379 MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b899 380 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b899 381 >; 382 }; 383 384 pinctrl_i2c3: i2c3grp { 385 fsl,pins = < 386 MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b899 387 MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b899 388 >; 389 }; 390 391 pinctrl_ipu1: ipu1grp { 392 fsl,pins = < 393 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 394 MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 395 MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 396 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 397 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 398 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 399 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 400 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 401 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 402 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 403 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 404 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 405 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 406 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 407 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 408 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 409 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 410 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 411 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 412 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 413 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 414 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 415 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 416 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 417 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 418 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 419 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 420 >; 421 }; 422 423 pinctrl_pcie: pciegrp { 424 fsl,pins = < 425 MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b098 426 MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b098 427 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b098 428 >; 429 }; 430 431 pinctrl_pcie_reg: pciereggrp { 432 fsl,pins = < 433 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x1b098 434 >; 435 }; 436 437 pinctrl_pmic: pmicgrp { 438 fsl,pins = < 439 MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x1b098 440 >; 441 }; 442 443 pinctrl_pwm1: pwm1grp { 444 fsl,pins = < 445 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x8 446 >; 447 }; 448 449 pinctrl_touch: touchgrp { 450 fsl,pins = < 451 MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x1b098 452 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b098 453 >; 454 }; 455 456 pinctrl_uart1: uart1grp { 457 fsl,pins = < 458 MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0a8 459 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0a8 460 >; 461 }; 462 463 pinctrl_uart2: uart2grp { 464 fsl,pins = < 465 MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b098 466 MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b098 467 >; 468 }; 469 470 pinctrl_usbh1: usbh1grp { 471 fsl,pins = < 472 MX6QDL_PAD_EIM_D30__USB_H1_OC 0x1b098 473 >; 474 }; 475 476 pinctrl_usbh1_vbus: usbh1-vbus { 477 fsl,pins = < 478 MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x98 479 >; 480 }; 481 482 pinctrl_usbotg: usbotggrp { 483 fsl,pins = < 484 MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1b098 485 MX6QDL_PAD_EIM_D21__USB_OTG_OC 0x1b098 486 >; 487 }; 488 489 pinctrl_usbotg_vbus: usbotg-vbus { 490 fsl,pins = < 491 MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x98 492 >; 493 }; 494 495 pinctrl_usdhc3: usdhc3grp { 496 fsl,pins = < 497 MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x1b018 498 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x1b018 499 MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 500 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 501 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 502 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 503 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 504 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 505 >; 506 }; 507 508 pinctrl_usdhc4: usdhc4grp { 509 fsl,pins = < 510 MX6QDL_PAD_SD4_CMD__SD4_CMD 0x1f069 511 MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10069 512 MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17069 513 MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17069 514 MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17069 515 MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17069 516 MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17069 517 MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17069 518 MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17069 519 MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17069 520 >; 521 }; 522 523 pinctrl_wdog: wdoggrp { 524 fsl,pins = < 525 MX6QDL_PAD_GPIO_1__WDOG2_B 0x1b0b0 526 >; 527 }; 528}; 529 530&ipu1_di0_disp0 { 531 remote-endpoint = <&lcd_display_in>; 532}; 533 534&pcie { 535 pinctrl-names = "default"; 536 pinctrl-0 = <&pinctrl_pcie>; 537 reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>; 538 vpcie-supply = <®_pcie>; 539 status = "disabled"; 540}; 541 542&pwm1 { 543 pinctrl-names = "default"; 544 pinctrl-0 = <&pinctrl_pwm1>; 545 status = "disabled"; 546}; 547 548&uart1 { 549 pinctrl-names = "default"; 550 pinctrl-0 = <&pinctrl_uart1>; 551 status = "okay"; 552}; 553 554&uart2 { 555 pinctrl-names = "default"; 556 pinctrl-0 = <&pinctrl_uart2>; 557 status = "okay"; 558}; 559 560&usbh1 { 561 pinctrl-names = "default"; 562 pinctrl-0 = <&pinctrl_usbh1>; 563 vbus-supply = <®_usb_h1_vbus>; 564 over-current-active-low; 565 status = "disabled"; 566}; 567 568&usbotg { 569 pinctrl-names = "default"; 570 pinctrl-0 = <&pinctrl_usbotg>; 571 vbus-supply = <®_usb_otg_vbus>; 572 over-current-active-low; 573 srp-disable; 574 hnp-disable; 575 adp-disable; 576 status = "okay"; 577}; 578 579&usbphy1 { 580 fsl,tx-d-cal = <106>; 581 status = "okay"; 582}; 583 584&usbphy2 { 585 fsl,tx-d-cal = <109>; 586 status = "disabled"; 587}; 588 589&usdhc3 { 590 pinctrl-names = "default"; 591 pinctrl-0 = <&pinctrl_usdhc3>; 592 bus-width = <4>; 593 cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>; 594 wp-gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>; 595 no-1-8-v; 596 keep-power-in-suspend; 597 wakeup-source; 598 vmmc-supply = <&sw2_reg>; 599 status = "disabled"; 600}; 601 602&usdhc4 { 603 pinctrl-names = "default"; 604 pinctrl-0 = <&pinctrl_usdhc4>; 605 bus-width = <8>; 606 non-removable; 607 no-1-8-v; 608 keep-power-in-suspend; 609 vmmc-supply = <&sw2_reg>; 610 status = "okay"; 611}; 612 613&wdog1 { 614 status = "disabled"; 615}; 616 617&wdog2 { 618 pinctrl-names = "default"; 619 pinctrl-0 = <&pinctrl_wdog>; 620 fsl,ext-reset-output; 621 status = "okay"; 622}; 623