1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2/* 3 * Copyright (c) 2016 Protonic Holland 4 */ 5 6/dts-v1/; 7#include "imx6dl.dtsi" 8#include "imx6qdl-prti6q.dtsi" 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/leds/common.h> 11#include <dt-bindings/sound/fsl-imx-audmux.h> 12 13/ { 14 model = "Protonic VT7"; 15 compatible = "prt,prtvt7", "fsl,imx6dl"; 16 17 memory@10000000 { 18 device_type = "memory"; 19 reg = <0x10000000 0x20000000>; 20 }; 21 22 backlight_lcd: backlight-lcd { 23 compatible = "pwm-backlight"; 24 pinctrl-names = "default"; 25 pinctrl-0 = <&pinctrl_backlight>; 26 pwms = <&pwm1 0 500000>; 27 brightness-levels = <0 20 81 248 1000>; 28 default-brightness-level = <20>; 29 num-interpolated-steps = <21>; 30 power-supply = <®_bl_12v0>; 31 enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 32 }; 33 34 keys { 35 compatible = "gpio-keys"; 36 autorepeat; 37 38 esc { 39 label = "GPIO Key ESC"; 40 linux,code = <KEY_ESC>; 41 gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>; 42 }; 43 44 up { 45 label = "GPIO Key UP"; 46 linux,code = <KEY_UP>; 47 gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>; 48 }; 49 50 down { 51 label = "GPIO Key DOWN"; 52 linux,code = <KEY_DOWN>; 53 gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>; 54 }; 55 56 enter { 57 label = "GPIO Key Enter"; 58 linux,code = <KEY_ENTER>; 59 gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>; 60 }; 61 62 cycle { 63 label = "GPIO Key CYCLE"; 64 linux,code = <KEY_CYCLEWINDOWS>; 65 gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>; 66 }; 67 68 f1 { 69 label = "GPIO Key F1"; 70 linux,code = <KEY_F1>; 71 gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>; 72 }; 73 74 f2 { 75 label = "GPIO Key F2"; 76 linux,code = <KEY_F2>; 77 gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>; 78 }; 79 80 f3 { 81 label = "GPIO Key F3"; 82 linux,code = <KEY_F3>; 83 gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>; 84 }; 85 86 f4 { 87 label = "GPIO Key F4"; 88 linux,code = <KEY_F4>; 89 gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>; 90 }; 91 92 f5 { 93 label = "GPIO Key F5"; 94 linux,code = <KEY_F5>; 95 gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>; 96 }; 97 98 f6 { 99 label = "GPIO Key F6"; 100 linux,code = <KEY_F6>; 101 gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>; 102 }; 103 104 f7 { 105 label = "GPIO Key F7"; 106 linux,code = <KEY_F7>; 107 gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>; 108 }; 109 110 f8 { 111 label = "GPIO Key F8"; 112 linux,code = <KEY_F8>; 113 gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>; 114 }; 115 116 f9 { 117 label = "GPIO Key F9"; 118 linux,code = <KEY_F9>; 119 gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>; 120 }; 121 122 f10 { 123 label = "GPIO Key F10"; 124 linux,code = <KEY_F10>; 125 gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>; 126 }; 127 }; 128 129 leds { 130 compatible = "gpio-leds"; 131 pinctrl-names = "default"; 132 pinctrl-0 = <&pinctrl_leds>; 133 134 led-debug0 { 135 function = LED_FUNCTION_STATUS; 136 gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 137 linux,default-trigger = "heartbeat"; 138 }; 139 }; 140 141 reg_bl_12v0: regulator-bl-12v0 { 142 compatible = "regulator-fixed"; 143 pinctrl-names = "default"; 144 pinctrl-0 = <&pinctrl_reg_bl_12v0>; 145 regulator-name = "bl-12v0"; 146 regulator-min-microvolt = <12000000>; 147 regulator-max-microvolt = <12000000>; 148 gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; 149 enable-active-high; 150 }; 151 152 reg_1v8: regulator-1v8 { 153 compatible = "regulator-fixed"; 154 regulator-name = "1v8"; 155 regulator-min-microvolt = <1800000>; 156 regulator-max-microvolt = <1800000>; 157 }; 158 159 sound { 160 compatible = "simple-audio-card"; 161 simple-audio-card,name = "prti6q-sgtl5000"; 162 simple-audio-card,format = "i2s"; 163 simple-audio-card,widgets = 164 "Microphone", "Microphone Jack", 165 "Line", "Line In Jack", 166 "Headphone", "Headphone Jack", 167 "Speaker", "External Speaker"; 168 simple-audio-card,routing = 169 "MIC_IN", "Microphone Jack", 170 "LINE_IN", "Line In Jack", 171 "Headphone Jack", "HP_OUT", 172 "External Speaker", "LINE_OUT"; 173 174 simple-audio-card,cpu { 175 sound-dai = <&ssi1>; 176 system-clock-frequency = <0>; 177 }; 178 179 simple-audio-card,codec { 180 sound-dai = <&sgtl5000>; 181 bitclock-master; 182 frame-master; 183 }; 184 }; 185}; 186 187&audmux { 188 pinctrl-names = "default"; 189 pinctrl-0 = <&pinctrl_audmux>; 190 status = "okay"; 191 192 mux-ssi1 { 193 fsl,audmux-port = <0>; 194 fsl,port-config = < 195 IMX_AUDMUX_V2_PTCR_SYN 0 196 IMX_AUDMUX_V2_PTCR_TFSEL(2) 0 197 IMX_AUDMUX_V2_PTCR_TCSEL(2) 0 198 IMX_AUDMUX_V2_PTCR_TFSDIR 0 199 IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2) 200 >; 201 }; 202 203 mux-pins3 { 204 fsl,audmux-port = <2>; 205 fsl,port-config = < 206 IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0) 207 0 IMX_AUDMUX_V2_PDCR_TXRXEN 208 >; 209 }; 210}; 211 212&can1 { 213 pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>; 214}; 215 216&clks { 217 assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>; 218 assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>; 219}; 220 221&ecspi2 { 222 cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>; 223 pinctrl-names = "default"; 224 pinctrl-0 = <&pinctrl_ecspi2>; 225 status = "okay"; 226}; 227 228&i2c1 { 229 sgtl5000: audio-codec@a { 230 compatible = "fsl,sgtl5000"; 231 reg = <0xa>; 232 pinctrl-names = "default"; 233 pinctrl-0 = <&pinctrl_codec>; 234 #sound-dai-cells = <0>; 235 clocks = <&clks 201>; 236 VDDA-supply = <®_3v3>; 237 VDDIO-supply = <®_3v3>; 238 VDDD-supply = <®_1v8>; 239 }; 240}; 241 242&i2c3 { 243 rtc@51 { 244 compatible = "nxp,pcf8563"; 245 reg = <0x51>; 246 }; 247 248 gpio_pca: gpio@74 { 249 compatible = "nxp,pca9539"; 250 reg = <0x74>; 251 interrupts-extended = <&gpio4 5 IRQ_TYPE_LEVEL_LOW>; 252 #gpio-cells = <2>; 253 gpio-controller; 254 }; 255}; 256 257&ipu1 { 258 pinctrl-names = "default"; 259 pinctrl-0 = <&pinctrl_ipu1_csi0>; 260 status = "okay"; 261}; 262 263&pwm1 { 264 #pwm-cells = <2>; 265 pinctrl-names = "default"; 266 pinctrl-0 = <&pinctrl_pwm1>; 267 status = "okay"; 268}; 269 270&snvs_poweroff { 271 status = "okay"; 272}; 273 274&snvs_pwrkey { 275 status = "okay"; 276}; 277 278&ssi1 { 279 #sound-dai-cells = <0>; 280 fsl,mode = "ac97-slave"; 281 status = "okay"; 282}; 283 284&usbh1 { 285 status = "disabled"; 286}; 287 288&vpu { 289 status = "disabled"; 290}; 291 292&iomuxc { 293 pinctrl_audmux: audmuxgrp { 294 fsl,pins = < 295 MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0 296 MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 297 MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 298 MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 299 MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 300 >; 301 }; 302 303 pinctrl_backlight: backlightgrp { 304 fsl,pins = < 305 MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0 306 >; 307 }; 308 309 pinctrl_can1phy: can1phy { 310 fsl,pins = < 311 /* CAN1_SR */ 312 MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070 313 /* CAN1_TERM */ 314 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 315 >; 316 }; 317 318 pinctrl_codec: codecgrp { 319 fsl,pins = < 320 /* AUDIO_nRESET */ 321 MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x1f0b0 322 >; 323 }; 324 325 pinctrl_ecspi2: ecspi2grp { 326 fsl,pins = < 327 MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 328 MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 329 MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 330 MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 331 >; 332 }; 333 334 pinctrl_ipu1_csi0: ipu1csi0grp { 335 fsl,pins = < 336 MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b0 337 MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b0 338 MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b0 339 MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b0 340 MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b0 341 MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b0 342 MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b0 343 MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b0 344 MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x1b0b0 345 /* ITU656_nRESET */ 346 MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x1b0b0 347 /* ITU656_nPDN */ 348 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b0 349 >; 350 }; 351 352 pinctrl_ipu1_disp: ipudisp1grp { 353 fsl,pins = < 354 MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0xb0 355 MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0xb0 356 357 MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0xb0 358 MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0xb0 359 MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0xb0 360 MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0xb0 361 MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0xb0 362 MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0xb0 363 MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0xb0 364 MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0xb0 365 366 MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0xb0 367 MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0xb0 368 MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0xb0 369 MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0xb0 370 MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0xb0 371 MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0xb0 372 MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0xb0 373 MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0xb0 374 375 MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0xb0 376 MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0xb0 377 MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0xb0 378 MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0xb0 379 MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0xb0 380 MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0xb0 381 MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0xb0 382 MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0xb0 383 >; 384 }; 385 386 pinctrl_leds: ledsgrp { 387 fsl,pins = < 388 MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 389 >; 390 }; 391 392 pinctrl_pwm1: pwm1grp { 393 fsl,pins = < 394 MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b0 395 >; 396 }; 397 398 pinctrl_reg_bl_12v0: 12blgrp { 399 fsl,pins = < 400 MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x1b0b0 401 >; 402 }; 403 404 pinctrl_tsc: tscgrp { 405 406 fsl,pins = < 407 MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b0 408 MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0 409 >; 410 }; 411}; 412