1/*-
2 * Copyright (c) 2016 Michal Meloun <mmel@FreeBSD.org>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#include "opt_platform.h"
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD$");
31
32#include <sys/param.h>
33#include <sys/bus.h>
34#include <sys/devmap.h>
35#include <sys/lock.h>
36#include <sys/reboot.h>
37#include <sys/systm.h>
38
39#include <vm/vm.h>
40
41#include <machine/bus.h>
42#include <machine/fdt.h>
43#include <machine/intr.h>
44#include <machine/machdep.h>
45#include <machine/platformvar.h>
46
47#include <dev/ofw/openfirm.h>
48
49#include <arm/nvidia/tegra124/tegra124_mp.h>
50
51#include "platform_if.h"
52
53#define	PMC_PHYSBASE		0x7000e400
54#define	PMC_SIZE		0x400
55#define	PMC_CONTROL_REG		0x0
56#define	PMC_SCRATCH0		0x50
57#define	 PMC_SCRATCH0_MODE_RECOVERY	(1 << 31)
58#define	 PMC_SCRATCH0_MODE_BOOTLOADER	(1 << 30)
59#define	 PMC_SCRATCH0_MODE_RCM		(1 << 1)
60#define	 PMC_SCRATCH0_MODE_MASK		(PMC_SCRATCH0_MODE_RECOVERY | \
61					PMC_SCRATCH0_MODE_BOOTLOADER | \
62					PMC_SCRATCH0_MODE_RCM)
63
64static platform_attach_t tegra124_attach;
65static platform_devmap_init_t tegra124_devmap_init;
66static platform_late_init_t tegra124_late_init;
67static platform_cpu_reset_t tegra124_cpu_reset;
68
69static int
70tegra124_attach(platform_t plat)
71{
72
73	return (0);
74}
75
76static void
77tegra124_late_init(platform_t plat)
78{
79
80}
81
82/*
83 * Set up static device mappings.
84 *
85 */
86static int
87tegra124_devmap_init(platform_t plat)
88{
89
90	devmap_add_entry(0x70000000, 0x01000000);
91	return (0);
92}
93
94static void
95tegra124_cpu_reset(platform_t plat)
96{
97	bus_space_handle_t pmc;
98	uint32_t reg;
99
100	printf("Resetting...\n");
101	bus_space_map(fdtbus_bs_tag, PMC_PHYSBASE, PMC_SIZE, 0, &pmc);
102
103	reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);
104	reg &= PMC_SCRATCH0_MODE_MASK;
105	bus_space_write_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0,
106	   reg | PMC_SCRATCH0_MODE_BOOTLOADER); 	/* boot to bootloader */
107	bus_space_read_4(fdtbus_bs_tag, pmc, PMC_SCRATCH0);
108
109	reg = bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);
110	spinlock_enter();
111	dsb();
112	bus_space_write_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG, reg | 0x10);
113	bus_space_read_4(fdtbus_bs_tag, pmc, PMC_CONTROL_REG);
114	while(1)
115		;
116
117}
118
119/*
120 * Early putc routine for EARLY_PRINTF support.  To use, add to kernel config:
121 *   option SOCDEV_PA=0x70000000
122 *   option SOCDEV_VA=0x70000000
123 *   option EARLY_PRINTF
124 */
125#if 0
126#ifdef EARLY_PRINTF
127static void
128tegra124_early_putc(int c)
129{
130
131	volatile uint32_t * UART_STAT_REG = (uint32_t *)(0x70006314);
132	volatile uint32_t * UART_TX_REG   = (uint32_t *)(0x70006300);
133	const uint32_t      UART_TXRDY    = (1 << 6);
134	while ((*UART_STAT_REG & UART_TXRDY) == 0)
135		continue;
136	*UART_TX_REG = c;
137}
138early_putc_t *early_putc = tegra124_early_putc;
139#endif
140#endif
141
142static platform_method_t tegra124_methods[] = {
143	PLATFORMMETHOD(platform_attach,		tegra124_attach),
144	PLATFORMMETHOD(platform_devmap_init,	tegra124_devmap_init),
145	PLATFORMMETHOD(platform_late_init,	tegra124_late_init),
146	PLATFORMMETHOD(platform_cpu_reset,	tegra124_cpu_reset),
147
148#ifdef SMP
149	PLATFORMMETHOD(platform_mp_start_ap,	tegra124_mp_start_ap),
150	PLATFORMMETHOD(platform_mp_setmaxid,	tegra124_mp_setmaxid),
151#endif
152	PLATFORMMETHOD_END,
153};
154
155FDT_PLATFORM_DEF(tegra124, "Nvidia Jetson-TK1", 0, "nvidia,jetson-tk1", 120);
156