1/*-
2 * Copyright (c) 2011,2016 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Andrew Turner under
6 * sponsorship from the FreeBSD Foundation.
7 *
8 * Developed by Damjan Marion <damjan.marion@gmail.com>
9 *
10 * Based on OMAP4 GIC code by Ben Gray
11 *
12 * Redistribution and use in source and binary forms, with or without
13 * modification, are permitted provided that the following conditions
14 * are met:
15 * 1. Redistributions of source code must retain the above copyright
16 *    notice, this list of conditions and the following disclaimer.
17 * 2. Redistributions in binary form must reproduce the above copyright
18 *    notice, this list of conditions and the following disclaimer in the
19 *    documentation and/or other materials provided with the distribution.
20 * 3. The name of the company nor the name of the author may be used to
21 *    endorse or promote products derived from this software without specific
22 *    prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 */
36
37#include "opt_platform.h"
38
39#include <sys/cdefs.h>
40__FBSDID("$FreeBSD$");
41
42#include <sys/param.h>
43#include <sys/systm.h>
44#include <sys/bus.h>
45#include <sys/kernel.h>
46#include <sys/module.h>
47
48#include <machine/intr.h>
49
50#include <dev/ofw/openfirm.h>
51#include <dev/ofw/ofw_bus.h>
52#include <dev/ofw/ofw_bus_subr.h>
53
54#include <arm/arm/gic.h>
55#include <arm/arm/gic_common.h>
56
57struct arm_gic_devinfo {
58	struct ofw_bus_devinfo	obdinfo;
59	struct resource_list	rl;
60};
61
62struct arm_gic_fdt_softc {
63	struct arm_gic_softc	base;
64	pcell_t			addr_cells;
65	pcell_t			size_cells;
66};
67
68static device_probe_t gic_fdt_probe;
69static device_attach_t gic_fdt_attach;
70static ofw_bus_get_devinfo_t gic_ofw_get_devinfo;
71static bus_get_resource_list_t gic_fdt_get_resource_list;
72static bool arm_gic_add_children(device_t);
73
74static struct ofw_compat_data compat_data[] = {
75	{"arm,gic",		true},	/* Non-standard, used in FreeBSD dts. */
76	{"arm,gic-400",		true},
77	{"arm,cortex-a15-gic",	true},
78	{"arm,cortex-a9-gic",	true},
79	{"arm,cortex-a7-gic",	true},
80	{"arm,arm11mp-gic",	true},
81	{"brcm,brahma-b15-gic",	true},
82	{"qcom,msm-qgic2",	true},
83	{NULL,			false}
84};
85
86static device_method_t gic_fdt_methods[] = {
87	/* Device interface */
88	DEVMETHOD(device_probe,		gic_fdt_probe),
89	DEVMETHOD(device_attach,	gic_fdt_attach),
90
91	/* Bus interface */
92	DEVMETHOD(bus_get_resource_list,gic_fdt_get_resource_list),
93
94	/* ofw_bus interface */
95	DEVMETHOD(ofw_bus_get_devinfo,	gic_ofw_get_devinfo),
96	DEVMETHOD(ofw_bus_get_compat,	ofw_bus_gen_get_compat),
97	DEVMETHOD(ofw_bus_get_model,	ofw_bus_gen_get_model),
98	DEVMETHOD(ofw_bus_get_name,	ofw_bus_gen_get_name),
99	DEVMETHOD(ofw_bus_get_node,	ofw_bus_gen_get_node),
100	DEVMETHOD(ofw_bus_get_type,	ofw_bus_gen_get_type),
101
102	DEVMETHOD_END,
103};
104
105DEFINE_CLASS_1(gic, gic_fdt_driver, gic_fdt_methods,
106    sizeof(struct arm_gic_fdt_softc), arm_gic_driver);
107
108static devclass_t gic_fdt_devclass;
109
110EARLY_DRIVER_MODULE(gic, simplebus, gic_fdt_driver, gic_fdt_devclass, 0, 0,
111    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
112EARLY_DRIVER_MODULE(gic, ofwbus, gic_fdt_driver, gic_fdt_devclass, 0, 0,
113    BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
114
115static int
116gic_fdt_probe(device_t dev)
117{
118
119	if (!ofw_bus_status_okay(dev))
120		return (ENXIO);
121
122	if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data)
123		return (ENXIO);
124	device_set_desc(dev, "ARM Generic Interrupt Controller");
125	return (BUS_PROBE_DEFAULT);
126}
127
128static int
129gic_fdt_attach(device_t dev)
130{
131	struct arm_gic_fdt_softc *sc = device_get_softc(dev);
132	phandle_t pxref;
133	intptr_t xref;
134	int err;
135
136	sc->base.gic_bus = GIC_BUS_FDT;
137
138	err = arm_gic_attach(dev);
139	if (err != 0)
140		return (err);
141
142	xref = OF_xref_from_node(ofw_bus_get_node(dev));
143
144	/*
145	 * Now, when everything is initialized, it's right time to
146	 * register interrupt controller to interrupt framefork.
147	 */
148	if (intr_pic_register(dev, xref) == NULL) {
149		device_printf(dev, "could not register PIC\n");
150		goto cleanup;
151	}
152
153	/*
154	 * Controller is root if:
155	 * - doesn't have interrupt parent
156	 * - his interrupt parent is this controller
157	 */
158	pxref = ofw_bus_find_iparent(ofw_bus_get_node(dev));
159	if (pxref == 0 || xref == pxref) {
160		if (intr_pic_claim_root(dev, xref, arm_gic_intr, sc,
161		    GIC_LAST_SGI - GIC_FIRST_SGI + 1) != 0) {
162			device_printf(dev, "could not set PIC as a root\n");
163			intr_pic_deregister(dev, xref);
164			goto cleanup;
165		}
166	} else {
167		if (sc->base.gic_res[2] == NULL) {
168			device_printf(dev,
169			    "not root PIC must have defined interrupt\n");
170			intr_pic_deregister(dev, xref);
171			goto cleanup;
172		}
173		if (bus_setup_intr(dev, sc->base.gic_res[2], INTR_TYPE_CLK,
174		    arm_gic_intr, NULL, sc, &sc->base.gic_intrhand)) {
175			device_printf(dev, "could not setup irq handler\n");
176			intr_pic_deregister(dev, xref);
177			goto cleanup;
178		}
179	}
180
181	OF_device_register_xref(xref, dev);
182
183	/* If we have children probe and attach them */
184	if (arm_gic_add_children(dev)) {
185		bus_generic_probe(dev);
186		return (bus_generic_attach(dev));
187	}
188
189	return (0);
190
191cleanup:
192	arm_gic_detach(dev);
193	return(ENXIO);
194}
195
196static struct resource_list *
197gic_fdt_get_resource_list(device_t bus, device_t child)
198{
199	struct arm_gic_devinfo *di;
200
201	di = device_get_ivars(child);
202	KASSERT(di != NULL, ("gic_fdt_get_resource_list: No devinfo"));
203
204	return (&di->rl);
205}
206
207static int
208arm_gic_fill_ranges(phandle_t node, struct arm_gic_fdt_softc *sc)
209{
210	pcell_t host_cells;
211	cell_t *base_ranges;
212	ssize_t nbase_ranges;
213	int i, j, k;
214
215	host_cells = 1;
216	OF_getencprop(OF_parent(node), "#address-cells", &host_cells,
217	    sizeof(host_cells));
218	sc->addr_cells = 2;
219	OF_getencprop(node, "#address-cells", &sc->addr_cells,
220	    sizeof(sc->addr_cells));
221	sc->size_cells = 2;
222	OF_getencprop(node, "#size-cells", &sc->size_cells,
223	    sizeof(sc->size_cells));
224
225	nbase_ranges = OF_getproplen(node, "ranges");
226	if (nbase_ranges < 0)
227		return (-1);
228	sc->base.nranges = nbase_ranges / sizeof(cell_t) /
229	    (sc->addr_cells + host_cells + sc->size_cells);
230	if (sc->base.nranges == 0)
231		return (0);
232
233	sc->base.ranges = malloc(sc->base.nranges * sizeof(sc->base.ranges[0]),
234	    M_DEVBUF, M_WAITOK);
235	base_ranges = malloc(nbase_ranges, M_DEVBUF, M_WAITOK);
236	OF_getencprop(node, "ranges", base_ranges, nbase_ranges);
237
238	for (i = 0, j = 0; i < sc->base.nranges; i++) {
239		sc->base.ranges[i].bus = 0;
240		for (k = 0; k < sc->addr_cells; k++) {
241			sc->base.ranges[i].bus <<= 32;
242			sc->base.ranges[i].bus |= base_ranges[j++];
243		}
244		sc->base.ranges[i].host = 0;
245		for (k = 0; k < host_cells; k++) {
246			sc->base.ranges[i].host <<= 32;
247			sc->base.ranges[i].host |= base_ranges[j++];
248		}
249		sc->base.ranges[i].size = 0;
250		for (k = 0; k < sc->size_cells; k++) {
251			sc->base.ranges[i].size <<= 32;
252			sc->base.ranges[i].size |= base_ranges[j++];
253		}
254	}
255
256	free(base_ranges, M_DEVBUF);
257	return (sc->base.nranges);
258}
259
260static bool
261arm_gic_add_children(device_t dev)
262{
263	struct arm_gic_fdt_softc *sc;
264	struct arm_gic_devinfo *dinfo;
265	phandle_t child, node;
266	device_t cdev;
267
268	sc = device_get_softc(dev);
269	node = ofw_bus_get_node(dev);
270
271	/* If we have no children don't probe for them */
272	child = OF_child(node);
273	if (child == 0)
274		return (false);
275
276	if (arm_gic_fill_ranges(node, sc) < 0) {
277		device_printf(dev, "Have a child, but no ranges\n");
278		return (false);
279	}
280
281	for (; child != 0; child = OF_peer(child)) {
282		dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO);
283
284		if (ofw_bus_gen_setup_devinfo(&dinfo->obdinfo, child) != 0) {
285			free(dinfo, M_DEVBUF);
286			continue;
287		}
288
289		resource_list_init(&dinfo->rl);
290		ofw_bus_reg_to_rl(dev, child, sc->addr_cells,
291		    sc->size_cells, &dinfo->rl);
292
293		cdev = device_add_child(dev, NULL, -1);
294		if (cdev == NULL) {
295			device_printf(dev, "<%s>: device_add_child failed\n",
296			    dinfo->obdinfo.obd_name);
297			resource_list_free(&dinfo->rl);
298			ofw_bus_gen_destroy_devinfo(&dinfo->obdinfo);
299			free(dinfo, M_DEVBUF);
300			continue;
301		}
302		device_set_ivars(cdev, dinfo);
303	}
304
305	return (true);
306}
307
308static const struct ofw_bus_devinfo *
309gic_ofw_get_devinfo(device_t bus __unused, device_t child)
310{
311	struct arm_gic_devinfo *di;
312
313	di = device_get_ivars(child);
314
315	return (&di->obdinfo);
316}
317
318static struct ofw_compat_data gicv2m_compat_data[] = {
319	{"arm,gic-v2m-frame",	true},
320	{NULL,			false}
321};
322
323static int
324arm_gicv2m_fdt_probe(device_t dev)
325{
326
327	if (!ofw_bus_status_okay(dev))
328		return (ENXIO);
329
330	if (!ofw_bus_search_compatible(dev, gicv2m_compat_data)->ocd_data)
331		return (ENXIO);
332
333	device_set_desc(dev, "ARM Generic Interrupt Controller MSI/MSIX");
334	return (BUS_PROBE_DEFAULT);
335}
336
337static int
338arm_gicv2m_fdt_attach(device_t dev)
339{
340	struct arm_gicv2m_softc *sc;
341
342	sc = device_get_softc(dev);
343	sc->sc_xref = OF_xref_from_node(ofw_bus_get_node(dev));
344
345	return (arm_gicv2m_attach(dev));
346}
347
348static device_method_t arm_gicv2m_fdt_methods[] = {
349	/* Device interface */
350	DEVMETHOD(device_probe,		arm_gicv2m_fdt_probe),
351	DEVMETHOD(device_attach,	arm_gicv2m_fdt_attach),
352
353	/* End */
354	DEVMETHOD_END
355};
356
357DEFINE_CLASS_1(gicv2m, arm_gicv2m_fdt_driver, arm_gicv2m_fdt_methods,
358    sizeof(struct arm_gicv2m_softc), arm_gicv2m_driver);
359
360static devclass_t arm_gicv2m_fdt_devclass;
361
362EARLY_DRIVER_MODULE(gicv2m, gic, arm_gicv2m_fdt_driver,
363    arm_gicv2m_fdt_devclass, 0, 0, BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE);
364