1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2011 NetApp, Inc.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY NETAPP, INC ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL NETAPP, INC OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31#ifndef _VMM_LAPIC_H_
32#define	_VMM_LAPIC_H_
33
34struct vm;
35
36bool	lapic_msr(u_int num);
37int	lapic_rdmsr(struct vm *vm, int cpu, u_int msr, uint64_t *rval,
38	    bool *retu);
39int	lapic_wrmsr(struct vm *vm, int cpu, u_int msr, uint64_t wval,
40	    bool *retu);
41
42int	lapic_mmio_read(void *vm, int cpu, uint64_t gpa,
43			uint64_t *rval, int size, void *arg);
44int	lapic_mmio_write(void *vm, int cpu, uint64_t gpa,
45			 uint64_t wval, int size, void *arg);
46
47/*
48 * Signals to the LAPIC that an interrupt at 'vector' needs to be generated
49 * to the 'cpu', the state is recorded in IRR.
50 */
51int	lapic_set_intr(struct vm *vm, int cpu, int vector, bool trig);
52
53#define	LAPIC_TRIG_LEVEL	true
54#define	LAPIC_TRIG_EDGE		false
55static __inline int
56lapic_intr_level(struct vm *vm, int cpu, int vector)
57{
58
59	return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_LEVEL));
60}
61
62static __inline int
63lapic_intr_edge(struct vm *vm, int cpu, int vector)
64{
65
66	return (lapic_set_intr(vm, cpu, vector, LAPIC_TRIG_EDGE));
67}
68
69/*
70 * Triggers the LAPIC local interrupt (LVT) 'vector' on 'cpu'.  'cpu' can
71 * be set to -1 to trigger the interrupt on all CPUs.
72 */
73int	lapic_set_local_intr(struct vm *vm, int cpu, int vector);
74
75int	lapic_intr_msi(struct vm *vm, uint64_t addr, uint64_t msg);
76
77#endif
78