1/*-
2 * SPDX-License-Identifier: BSD-4-Clause
3 *
4 * Copyright (c) 2003 Peter Wemm.
5 * Copyright (c) 1990 Andrew Moore, Talke Studio
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 * 3. All advertising materials mentioning features or use of this software
17 *    must display the following acknowledgement:
18 *	This product includes software developed by the University of
19 *	California, Berkeley and its contributors.
20 * 4. Neither the name of the University nor the names of its contributors
21 *    may be used to endorse or promote products derived from this software
22 *    without specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27 * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 * SUCH DAMAGE.
35 *
36 * 	from: @(#) ieeefp.h 	1.0 (Berkeley) 9/23/93
37 * $FreeBSD$
38 */
39
40#ifndef _MACHINE_IEEEFP_H_
41#define _MACHINE_IEEEFP_H_
42
43/*
44 * Deprecated historical FPU control interface
45 *
46 * IEEE floating point type, constant and function definitions.
47 * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
48 */
49
50#ifndef _SYS_CDEFS_H_
51#error this file needs sys/cdefs.h as a prerequisite
52#endif
53
54/*
55 * Rounding modes.
56 */
57typedef enum {
58	FP_RN=0,	/* round to nearest */
59	FP_RM,		/* round down towards minus infinity */
60	FP_RP,		/* round up towards plus infinity */
61	FP_RZ		/* truncate */
62} fp_rnd_t;
63
64/*
65 * Precision (i.e., rounding precision) modes.
66 */
67typedef enum {
68	FP_PS=0,	/* 24 bit (single-precision) */
69	FP_PRS,		/* reserved */
70	FP_PD,		/* 53 bit (double-precision) */
71	FP_PE		/* 64 bit (extended-precision) */
72} fp_prec_t;
73
74#define fp_except_t	int
75
76/*
77 * Exception bit masks.
78 */
79#define FP_X_INV	0x01	/* invalid operation */
80#define FP_X_DNML	0x02	/* denormal */
81#define FP_X_DZ		0x04	/* zero divide */
82#define FP_X_OFL	0x08	/* overflow */
83#define FP_X_UFL	0x10	/* underflow */
84#define FP_X_IMP	0x20	/* (im)precision */
85#define FP_X_STK	0x40	/* stack fault */
86
87/*
88 * FPU control word bit-field masks.
89 */
90#define FP_MSKS_FLD	0x3f	/* exception masks field */
91#define FP_PRC_FLD	0x300	/* precision control field */
92#define	FP_RND_FLD	0xc00	/* rounding control field */
93
94/*
95 * FPU status word bit-field masks.
96 */
97#define FP_STKY_FLD	0x3f	/* sticky flags field */
98
99/*
100 * SSE mxcsr register bit-field masks.
101 */
102#define	SSE_STKY_FLD	0x3f	/* exception flags */
103#define	SSE_DAZ_FLD	0x40	/* Denormals are zero */
104#define	SSE_MSKS_FLD	0x1f80	/* exception masks field */
105#define	SSE_RND_FLD	0x6000	/* rounding control */
106#define	SSE_FZ_FLD	0x8000	/* flush to zero on underflow */
107
108/*
109 * FPU control word bit-field offsets (shift counts).
110 */
111#define FP_MSKS_OFF	0	/* exception masks offset */
112#define FP_PRC_OFF	8	/* precision control offset */
113#define	FP_RND_OFF	10	/* rounding control offset */
114
115/*
116 * FPU status word bit-field offsets (shift counts).
117 */
118#define FP_STKY_OFF	0	/* sticky flags offset */
119
120/*
121 * SSE mxcsr register bit-field offsets (shift counts).
122 */
123#define	SSE_STKY_OFF	0	/* exception flags offset */
124#define	SSE_DAZ_OFF	6	/* DAZ exception mask offset */
125#define	SSE_MSKS_OFF	7	/* other exception masks offset */
126#define	SSE_RND_OFF	13	/* rounding control offset */
127#define	SSE_FZ_OFF	15	/* flush to zero offset */
128
129#ifdef __GNUCLIKE_ASM
130
131#define	__fldcw(addr)	__asm __volatile("fldcw %0" : : "m" (*(addr)))
132#define	__fldenv(addr)	__asm __volatile("fldenv %0" : : "m" (*(addr)))
133#define	__fnclex()	__asm __volatile("fnclex")
134#define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
135#define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
136#define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
137#define	__ldmxcsr(addr)	__asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
138#define	__stmxcsr(addr)	__asm __volatile("stmxcsr %0" : "=m" (*(addr)))
139
140/*
141 * Load the control word.  Be careful not to trap if there is a currently
142 * unmasked exception (ones that will become freshly unmasked are not a
143 * problem).  This case must be handled by a save/restore of the
144 * environment or even of the full x87 state.  Accessing the environment
145 * is very inefficient, so only do it when necessary.
146 */
147static __inline void
148__fnldcw(unsigned short _cw, unsigned short _newcw)
149{
150	struct {
151		unsigned _cw;
152		unsigned _other[6];
153	} _env;
154	unsigned short _sw;
155
156	if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
157		__fnstsw(&_sw);
158		if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
159			__fnstenv(&_env);
160			_env._cw = _newcw;
161			__fldenv(&_env);
162			return;
163		}
164	}
165	__fldcw(&_newcw);
166}
167
168/*
169 * General notes about conflicting SSE vs FP status bits.
170 * This code assumes that software will not fiddle with the control
171 * bits of the SSE and x87 in such a way to get them out of sync and
172 * still expect this to work.  Break this at your peril.
173 * Because I based this on the i386 port, the x87 state is used for
174 * the fpget*() functions, and is shadowed into the SSE state for
175 * the fpset*() functions.  For dual source fpget*() functions, I
176 * merge the two together.  I think.
177 */
178
179static __inline fp_rnd_t
180__fpgetround(void)
181{
182	unsigned short _cw;
183
184	__fnstcw(&_cw);
185	return ((fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF));
186}
187
188static __inline fp_rnd_t
189__fpsetround(fp_rnd_t _m)
190{
191	fp_rnd_t _p;
192	unsigned _mxcsr;
193	unsigned short _cw, _newcw;
194
195	__fnstcw(&_cw);
196	_p = (fp_rnd_t)((_cw & FP_RND_FLD) >> FP_RND_OFF);
197	_newcw = _cw & ~FP_RND_FLD;
198	_newcw |= (_m << FP_RND_OFF) & FP_RND_FLD;
199	__fnldcw(_cw, _newcw);
200	__stmxcsr(&_mxcsr);
201	_mxcsr &= ~SSE_RND_FLD;
202	_mxcsr |= (_m << SSE_RND_OFF) & SSE_RND_FLD;
203	__ldmxcsr(&_mxcsr);
204	return (_p);
205}
206
207/*
208 * Get or set the rounding precision for x87 arithmetic operations.
209 * There is no equivalent SSE mode or control.
210 */
211
212static __inline fp_prec_t
213__fpgetprec(void)
214{
215	unsigned short _cw;
216
217	__fnstcw(&_cw);
218	return ((fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF));
219}
220
221static __inline fp_prec_t
222__fpsetprec(fp_prec_t _m)
223{
224	fp_prec_t _p;
225	unsigned short _cw, _newcw;
226
227	__fnstcw(&_cw);
228	_p = (fp_prec_t)((_cw & FP_PRC_FLD) >> FP_PRC_OFF);
229	_newcw = _cw & ~FP_PRC_FLD;
230	_newcw |= (_m << FP_PRC_OFF) & FP_PRC_FLD;
231	__fnldcw(_cw, _newcw);
232	return (_p);
233}
234
235/*
236 * Get or set the exception mask.
237 * Note that the x87 mask bits are inverted by the API -- a mask bit of 1
238 * means disable for x87 and SSE, but for fp*mask() it means enable.
239 */
240
241static __inline fp_except_t
242__fpgetmask(void)
243{
244	unsigned short _cw;
245
246	__fnstcw(&_cw);
247	return ((~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF);
248}
249
250static __inline fp_except_t
251__fpsetmask(fp_except_t _m)
252{
253	fp_except_t _p;
254	unsigned _mxcsr;
255	unsigned short _cw, _newcw;
256
257	__fnstcw(&_cw);
258	_p = (~_cw & FP_MSKS_FLD) >> FP_MSKS_OFF;
259	_newcw = _cw & ~FP_MSKS_FLD;
260	_newcw |= (~_m << FP_MSKS_OFF) & FP_MSKS_FLD;
261	__fnldcw(_cw, _newcw);
262	__stmxcsr(&_mxcsr);
263	/* XXX should we clear non-ieee SSE_DAZ_FLD and SSE_FZ_FLD ? */
264	_mxcsr &= ~SSE_MSKS_FLD;
265	_mxcsr |= (~_m << SSE_MSKS_OFF) & SSE_MSKS_FLD;
266	__ldmxcsr(&_mxcsr);
267	return (_p);
268}
269
270static __inline fp_except_t
271__fpgetsticky(void)
272{
273	unsigned _ex, _mxcsr;
274	unsigned short _sw;
275
276	__fnstsw(&_sw);
277	_ex = (_sw & FP_STKY_FLD) >> FP_STKY_OFF;
278	__stmxcsr(&_mxcsr);
279	_ex |= (_mxcsr & SSE_STKY_FLD) >> SSE_STKY_OFF;
280	return ((fp_except_t)_ex);
281}
282
283#endif /* __GNUCLIKE_ASM */
284
285#if !defined(__IEEEFP_NOINLINES__) && defined(__GNUCLIKE_ASM)
286
287#define	fpgetmask()	__fpgetmask()
288#define	fpgetprec()	__fpgetprec()
289#define	fpgetround()	__fpgetround()
290#define	fpgetsticky()	__fpgetsticky()
291#define	fpsetmask(m)	__fpsetmask(m)
292#define	fpsetprec(m)	__fpsetprec(m)
293#define	fpsetround(m)	__fpsetround(m)
294
295#else /* !(!__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM) */
296
297/* Augment the userland declarations. */
298__BEGIN_DECLS
299extern fp_rnd_t    fpgetround(void);
300extern fp_rnd_t    fpsetround(fp_rnd_t);
301extern fp_except_t fpgetmask(void);
302extern fp_except_t fpsetmask(fp_except_t);
303extern fp_except_t fpgetsticky(void);
304extern fp_except_t fpsetsticky(fp_except_t);
305fp_prec_t	fpgetprec(void);
306fp_prec_t	fpsetprec(fp_prec_t);
307__END_DECLS
308
309#endif /* !__IEEEFP_NOINLINES__ && __GNUCLIKE_ASM */
310
311#endif /* !_MACHINE_IEEEFP_H_ */
312