1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2005 Peter Wemm
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30
31#include <sys/cdefs.h>
32__FBSDID("$FreeBSD$");
33
34#include <sys/param.h>
35#include <sys/exec.h>
36#include <sys/fcntl.h>
37#include <sys/imgact.h>
38#include <sys/kernel.h>
39#include <sys/lock.h>
40#include <sys/malloc.h>
41#include <sys/mutex.h>
42#include <sys/mman.h>
43#include <sys/namei.h>
44#include <sys/proc.h>
45#include <sys/procfs.h>
46#include <sys/resourcevar.h>
47#include <sys/systm.h>
48#include <sys/signalvar.h>
49#include <sys/stat.h>
50#include <sys/sx.h>
51#include <sys/syscall.h>
52#include <sys/sysctl.h>
53#include <sys/sysent.h>
54#include <sys/vnode.h>
55
56#include <vm/vm.h>
57#include <vm/vm_kern.h>
58#include <vm/vm_param.h>
59#include <vm/pmap.h>
60#include <vm/vm_map.h>
61#include <vm/vm_object.h>
62#include <vm/vm_extern.h>
63
64#include <compat/freebsd32/freebsd32_util.h>
65#include <compat/freebsd32/freebsd32_proto.h>
66#include <machine/fpu.h>
67#include <machine/psl.h>
68#include <machine/segments.h>
69#include <machine/specialreg.h>
70#include <machine/frame.h>
71#include <machine/md_var.h>
72#include <machine/pcb.h>
73#include <machine/cpufunc.h>
74
75#define	CS_SECURE(cs)		(ISPL(cs) == SEL_UPL)
76#define	EFL_SECURE(ef, oef)	((((ef) ^ (oef)) & ~PSL_USERCHANGE) == 0)
77
78int
79fill_regs32(struct thread *td, struct reg32 *regs)
80{
81	struct trapframe *tp;
82
83	tp = td->td_frame;
84	if (tp->tf_flags & TF_HASSEGS) {
85		regs->r_gs = tp->tf_gs;
86		regs->r_fs = tp->tf_fs;
87		regs->r_es = tp->tf_es;
88		regs->r_ds = tp->tf_ds;
89	} else {
90		regs->r_gs = _ugssel;
91		regs->r_fs = _ufssel;
92		regs->r_es = _udatasel;
93		regs->r_ds = _udatasel;
94	}
95	regs->r_edi = tp->tf_rdi;
96	regs->r_esi = tp->tf_rsi;
97	regs->r_ebp = tp->tf_rbp;
98	regs->r_ebx = tp->tf_rbx;
99	regs->r_edx = tp->tf_rdx;
100	regs->r_ecx = tp->tf_rcx;
101	regs->r_eax = tp->tf_rax;
102	regs->r_eip = tp->tf_rip;
103	regs->r_cs = tp->tf_cs;
104	regs->r_eflags = tp->tf_rflags;
105	regs->r_esp = tp->tf_rsp;
106	regs->r_ss = tp->tf_ss;
107	regs->r_err = 0;
108	regs->r_trapno = 0;
109	return (0);
110}
111
112int
113set_regs32(struct thread *td, struct reg32 *regs)
114{
115	struct trapframe *tp;
116
117	tp = td->td_frame;
118	if (!EFL_SECURE(regs->r_eflags, tp->tf_rflags) || !CS_SECURE(regs->r_cs))
119		return (EINVAL);
120	tp->tf_gs = regs->r_gs;
121	tp->tf_fs = regs->r_fs;
122	tp->tf_es = regs->r_es;
123	tp->tf_ds = regs->r_ds;
124	set_pcb_flags(td->td_pcb, PCB_FULL_IRET);
125	tp->tf_flags = TF_HASSEGS;
126	tp->tf_rdi = regs->r_edi;
127	tp->tf_rsi = regs->r_esi;
128	tp->tf_rbp = regs->r_ebp;
129	tp->tf_rbx = regs->r_ebx;
130	tp->tf_rdx = regs->r_edx;
131	tp->tf_rcx = regs->r_ecx;
132	tp->tf_rax = regs->r_eax;
133	tp->tf_rip = regs->r_eip;
134	tp->tf_cs = regs->r_cs;
135	tp->tf_rflags = regs->r_eflags;
136	tp->tf_rsp = regs->r_esp;
137	tp->tf_ss = regs->r_ss;
138	return (0);
139}
140
141int
142fill_fpregs32(struct thread *td, struct fpreg32 *regs)
143{
144	struct savefpu *sv_fpu;
145	struct save87 *sv_87;
146	struct env87 *penv_87;
147	struct envxmm *penv_xmm;
148	struct fpacc87 *fx_reg;
149	int i, st;
150	uint64_t mantissa;
151	uint16_t tw, exp;
152	uint8_t ab_tw;
153
154	bzero(regs, sizeof(*regs));
155	sv_87 = (struct save87 *)regs;
156	penv_87 = &sv_87->sv_env;
157	fpugetregs(td);
158	sv_fpu = get_pcb_user_save_td(td);
159	penv_xmm = &sv_fpu->sv_env;
160
161	/* FPU control/status */
162	penv_87->en_cw = penv_xmm->en_cw;
163	penv_87->en_sw = penv_xmm->en_sw;
164
165	/*
166	 * XXX for en_fip/fcs/foo/fos, check if the fxsave format
167	 * uses the old-style layout for 32 bit user apps.  If so,
168	 * read the ip and operand segment registers from there.
169	 * For now, use the process's %cs/%ds.
170	 */
171	penv_87->en_fip = penv_xmm->en_rip;
172	penv_87->en_fcs = td->td_frame->tf_cs;
173	penv_87->en_opcode = penv_xmm->en_opcode;
174	penv_87->en_foo = penv_xmm->en_rdp;
175	/* Entry into the kernel always sets TF_HASSEGS */
176	penv_87->en_fos = td->td_frame->tf_ds;
177
178	/*
179	 * FPU registers and tags.
180	 * For ST(i), i = fpu_reg - top; we start with fpu_reg=7.
181	 */
182	st = 7 - ((penv_xmm->en_sw >> 11) & 7);
183	ab_tw = penv_xmm->en_tw;
184	tw = 0;
185	for (i = 0x80; i != 0; i >>= 1) {
186		sv_87->sv_ac[st] = sv_fpu->sv_fp[st].fp_acc;
187		tw <<= 2;
188		if ((ab_tw & i) != 0) {
189			/* Non-empty - we need to check ST(i) */
190			fx_reg = &sv_fpu->sv_fp[st].fp_acc;
191			/* The first 64 bits contain the mantissa. */
192			mantissa = *((uint64_t *)fx_reg->fp_bytes);
193			/*
194			 * The final 16 bits contain the sign bit and the exponent.
195			 * Mask the sign bit since it is of no consequence to these
196			 * tests.
197			 */
198			exp = *((uint16_t *)&fx_reg->fp_bytes[8]) & 0x7fff;
199			if (exp == 0) {
200				if (mantissa == 0)
201					tw |= 1; /* Zero */
202				else
203					tw |= 2; /* Denormal */
204			} else if (exp == 0x7fff)
205				tw |= 2; /* Infinity or NaN */
206		} else
207			tw |= 3; /* Empty */
208		st = (st - 1) & 7;
209	}
210	penv_87->en_tw = tw;
211
212	return (0);
213}
214
215int
216set_fpregs32(struct thread *td, struct fpreg32 *regs)
217{
218	struct save87 *sv_87 = (struct save87 *)regs;
219	struct env87 *penv_87 = &sv_87->sv_env;
220	struct savefpu *sv_fpu = get_pcb_user_save_td(td);
221	struct envxmm *penv_xmm = &sv_fpu->sv_env;
222	int i;
223
224	/* FPU control/status */
225	penv_xmm->en_cw = penv_87->en_cw;
226	penv_xmm->en_sw = penv_87->en_sw;
227	penv_xmm->en_rip = penv_87->en_fip;
228	/* penv_87->en_fcs and en_fos ignored, see above */
229	penv_xmm->en_opcode = penv_87->en_opcode;
230	penv_xmm->en_rdp = penv_87->en_foo;
231
232	/* FPU registers and tags */
233	penv_xmm->en_tw = 0;
234	for (i = 0; i < 8; ++i) {
235		sv_fpu->sv_fp[i].fp_acc = sv_87->sv_ac[i];
236		if ((penv_87->en_tw & (3 << i * 2)) != (3 << i * 2))
237			penv_xmm->en_tw |= 1 << i;
238	}
239
240	for (i = 8; i < 16; ++i)
241		bzero(&sv_fpu->sv_fp[i].fp_acc, sizeof(sv_fpu->sv_fp[i].fp_acc));
242	fpuuserinited(td);
243
244	return (0);
245}
246
247int
248fill_dbregs32(struct thread *td, struct dbreg32 *regs)
249{
250	struct dbreg dr;
251	int err, i;
252
253	err = fill_dbregs(td, &dr);
254	for (i = 0; i < 8; i++)
255		regs->dr[i] = dr.dr[i];
256	return (err);
257}
258
259int
260set_dbregs32(struct thread *td, struct dbreg32 *regs)
261{
262	struct dbreg dr;
263	int i;
264
265	for (i = 0; i < 8; i++)
266		dr.dr[i] = regs->dr[i];
267	for (i = 8; i < 16; i++)
268		dr.dr[i] = 0;
269	return (set_dbregs(td, &dr));
270}
271