1/*-
2 * Copyright (c) 2014 The FreeBSD Foundation
3 * All rights reserved.
4 *
5 * This software was developed by Semihalf under
6 * the sponsorship of the FreeBSD Foundation.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29#include <sys/cdefs.h>
30__FBSDID("$FreeBSD$");
31
32#include <sys/param.h>
33
34#include <machine/armreg.h>
35
36#include <stand.h>
37#include <efi.h>
38
39#include "cache.h"
40
41static unsigned int
42get_dcache_line_size(void)
43{
44	uint64_t ctr;
45	unsigned int dcl_size;
46
47	/* Accessible from all security levels */
48	ctr = READ_SPECIALREG(ctr_el0);
49
50	/*
51	 * Relevant field [19:16] is LOG2
52	 * of the number of words in DCache line
53	 */
54	dcl_size = CTR_DLINE_SIZE(ctr);
55
56	/* Size of word shifted by cache line size */
57	return (sizeof(int) << dcl_size);
58}
59
60void
61cpu_flush_dcache(const void *ptr, size_t len)
62{
63
64	uint64_t cl_size;
65	vm_offset_t addr, end;
66
67	cl_size = get_dcache_line_size();
68
69	/* Calculate end address to clean */
70	end = (vm_offset_t)ptr + (vm_offset_t)len;
71	/* Align start address to cache line */
72	addr = (vm_offset_t)ptr;
73	addr = rounddown2(addr, cl_size);
74
75	for (; addr < end; addr += cl_size)
76		__asm __volatile("dc	civac, %0" : : "r" (addr) : "memory");
77	/* Full system DSB */
78	__asm __volatile("dsb	sy" : : : "memory");
79}
80
81void
82cpu_inval_icache(const void *ptr, size_t len)
83{
84
85	/* NULL ptr or 0 len means all */
86	if (ptr == NULL || len == 0) {
87		__asm __volatile(
88		    "ic		ialluis	\n"
89		    "dsb	ish	\n"
90		    : : : "memory");
91		return;
92	}
93
94	/* TODO: Other cache ranges if necessary */
95}
96