1//===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This class wraps target description classes used by the various code
10// generation TableGen backends.  This makes it easier to access the data and
11// provides a single place that needs to check it for validity.  All of these
12// classes abort on error conditions.
13//
14//===----------------------------------------------------------------------===//
15
16#include "CodeGenTarget.h"
17#include "CodeGenDAGPatterns.h"
18#include "CodeGenIntrinsics.h"
19#include "CodeGenSchedule.h"
20#include "llvm/ADT/STLExtras.h"
21#include "llvm/ADT/StringExtras.h"
22#include "llvm/Support/CommandLine.h"
23#include "llvm/Support/Timer.h"
24#include "llvm/TableGen/Error.h"
25#include "llvm/TableGen/Record.h"
26#include "llvm/TableGen/TableGenBackend.h"
27#include <algorithm>
28using namespace llvm;
29
30cl::OptionCategory AsmParserCat("Options for -gen-asm-parser");
31cl::OptionCategory AsmWriterCat("Options for -gen-asm-writer");
32
33static cl::opt<unsigned>
34    AsmParserNum("asmparsernum", cl::init(0),
35                 cl::desc("Make -gen-asm-parser emit assembly parser #N"),
36                 cl::cat(AsmParserCat));
37
38static cl::opt<unsigned>
39    AsmWriterNum("asmwriternum", cl::init(0),
40                 cl::desc("Make -gen-asm-writer emit assembly writer #N"),
41                 cl::cat(AsmWriterCat));
42
43/// getValueType - Return the MVT::SimpleValueType that the specified TableGen
44/// record corresponds to.
45MVT::SimpleValueType llvm::getValueType(Record *Rec) {
46  return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
47}
48
49StringRef llvm::getName(MVT::SimpleValueType T) {
50  switch (T) {
51  case MVT::Other:   return "UNKNOWN";
52  case MVT::iPTR:    return "TLI.getPointerTy()";
53  case MVT::iPTRAny: return "TLI.getPointerTy()";
54  default: return getEnumName(T);
55  }
56}
57
58StringRef llvm::getEnumName(MVT::SimpleValueType T) {
59  switch (T) {
60  case MVT::Other:    return "MVT::Other";
61  case MVT::i1:       return "MVT::i1";
62  case MVT::i8:       return "MVT::i8";
63  case MVT::i16:      return "MVT::i16";
64  case MVT::i32:      return "MVT::i32";
65  case MVT::i64:      return "MVT::i64";
66  case MVT::i128:     return "MVT::i128";
67  case MVT::Any:      return "MVT::Any";
68  case MVT::iAny:     return "MVT::iAny";
69  case MVT::fAny:     return "MVT::fAny";
70  case MVT::vAny:     return "MVT::vAny";
71  case MVT::f16:      return "MVT::f16";
72  case MVT::bf16:     return "MVT::bf16";
73  case MVT::f32:      return "MVT::f32";
74  case MVT::f64:      return "MVT::f64";
75  case MVT::f80:      return "MVT::f80";
76  case MVT::f128:     return "MVT::f128";
77  case MVT::ppcf128:  return "MVT::ppcf128";
78  case MVT::x86mmx:   return "MVT::x86mmx";
79  case MVT::Glue:     return "MVT::Glue";
80  case MVT::isVoid:   return "MVT::isVoid";
81  case MVT::v1i1:     return "MVT::v1i1";
82  case MVT::v2i1:     return "MVT::v2i1";
83  case MVT::v4i1:     return "MVT::v4i1";
84  case MVT::v8i1:     return "MVT::v8i1";
85  case MVT::v16i1:    return "MVT::v16i1";
86  case MVT::v32i1:    return "MVT::v32i1";
87  case MVT::v64i1:    return "MVT::v64i1";
88  case MVT::v128i1:   return "MVT::v128i1";
89  case MVT::v512i1:   return "MVT::v512i1";
90  case MVT::v1024i1:  return "MVT::v1024i1";
91  case MVT::v1i8:     return "MVT::v1i8";
92  case MVT::v2i8:     return "MVT::v2i8";
93  case MVT::v4i8:     return "MVT::v4i8";
94  case MVT::v8i8:     return "MVT::v8i8";
95  case MVT::v16i8:    return "MVT::v16i8";
96  case MVT::v32i8:    return "MVT::v32i8";
97  case MVT::v64i8:    return "MVT::v64i8";
98  case MVT::v128i8:   return "MVT::v128i8";
99  case MVT::v256i8:   return "MVT::v256i8";
100  case MVT::v1i16:    return "MVT::v1i16";
101  case MVT::v2i16:    return "MVT::v2i16";
102  case MVT::v3i16:    return "MVT::v3i16";
103  case MVT::v4i16:    return "MVT::v4i16";
104  case MVT::v8i16:    return "MVT::v8i16";
105  case MVT::v16i16:   return "MVT::v16i16";
106  case MVT::v32i16:   return "MVT::v32i16";
107  case MVT::v64i16:   return "MVT::v64i16";
108  case MVT::v128i16:  return "MVT::v128i16";
109  case MVT::v1i32:    return "MVT::v1i32";
110  case MVT::v2i32:    return "MVT::v2i32";
111  case MVT::v3i32:    return "MVT::v3i32";
112  case MVT::v4i32:    return "MVT::v4i32";
113  case MVT::v5i32:    return "MVT::v5i32";
114  case MVT::v8i32:    return "MVT::v8i32";
115  case MVT::v16i32:   return "MVT::v16i32";
116  case MVT::v32i32:   return "MVT::v32i32";
117  case MVT::v64i32:   return "MVT::v64i32";
118  case MVT::v128i32:  return "MVT::v128i32";
119  case MVT::v256i32:  return "MVT::v256i32";
120  case MVT::v512i32:  return "MVT::v512i32";
121  case MVT::v1024i32: return "MVT::v1024i32";
122  case MVT::v2048i32: return "MVT::v2048i32";
123  case MVT::v1i64:    return "MVT::v1i64";
124  case MVT::v2i64:    return "MVT::v2i64";
125  case MVT::v4i64:    return "MVT::v4i64";
126  case MVT::v8i64:    return "MVT::v8i64";
127  case MVT::v16i64:   return "MVT::v16i64";
128  case MVT::v32i64:   return "MVT::v32i64";
129  case MVT::v1i128:   return "MVT::v1i128";
130  case MVT::v2f16:    return "MVT::v2f16";
131  case MVT::v3f16:    return "MVT::v3f16";
132  case MVT::v4f16:    return "MVT::v4f16";
133  case MVT::v8f16:    return "MVT::v8f16";
134  case MVT::v16f16:   return "MVT::v16f16";
135  case MVT::v32f16:   return "MVT::v32f16";
136  case MVT::v64f16:   return "MVT::v64f16";
137  case MVT::v128f16:  return "MVT::v128f16";
138  case MVT::v2bf16:   return "MVT::v2bf16";
139  case MVT::v3bf16:   return "MVT::v3bf16";
140  case MVT::v4bf16:   return "MVT::v4bf16";
141  case MVT::v8bf16:   return "MVT::v8bf16";
142  case MVT::v16bf16:  return "MVT::v16bf16";
143  case MVT::v32bf16:  return "MVT::v32bf16";
144  case MVT::v64bf16:  return "MVT::v64bf16";
145  case MVT::v128bf16: return "MVT::v128bf16";
146  case MVT::v1f32:    return "MVT::v1f32";
147  case MVT::v2f32:    return "MVT::v2f32";
148  case MVT::v3f32:    return "MVT::v3f32";
149  case MVT::v4f32:    return "MVT::v4f32";
150  case MVT::v5f32:    return "MVT::v5f32";
151  case MVT::v8f32:    return "MVT::v8f32";
152  case MVT::v16f32:   return "MVT::v16f32";
153  case MVT::v32f32:   return "MVT::v32f32";
154  case MVT::v64f32:   return "MVT::v64f32";
155  case MVT::v128f32:  return "MVT::v128f32";
156  case MVT::v256f32:  return "MVT::v256f32";
157  case MVT::v512f32:  return "MVT::v512f32";
158  case MVT::v1024f32: return "MVT::v1024f32";
159  case MVT::v2048f32: return "MVT::v2048f32";
160  case MVT::v1f64:    return "MVT::v1f64";
161  case MVT::v2f64:    return "MVT::v2f64";
162  case MVT::v4f64:    return "MVT::v4f64";
163  case MVT::v8f64:    return "MVT::v8f64";
164  case MVT::v16f64:   return "MVT::v16f64";
165  case MVT::v32f64:   return "MVT::v32f64";
166  case MVT::nxv1i1:   return "MVT::nxv1i1";
167  case MVT::nxv2i1:   return "MVT::nxv2i1";
168  case MVT::nxv4i1:   return "MVT::nxv4i1";
169  case MVT::nxv8i1:   return "MVT::nxv8i1";
170  case MVT::nxv16i1:  return "MVT::nxv16i1";
171  case MVT::nxv32i1:  return "MVT::nxv32i1";
172  case MVT::nxv64i1:  return "MVT::nxv64i1";
173  case MVT::nxv1i8:   return "MVT::nxv1i8";
174  case MVT::nxv2i8:   return "MVT::nxv2i8";
175  case MVT::nxv4i8:   return "MVT::nxv4i8";
176  case MVT::nxv8i8:   return "MVT::nxv8i8";
177  case MVT::nxv16i8:  return "MVT::nxv16i8";
178  case MVT::nxv32i8:  return "MVT::nxv32i8";
179  case MVT::nxv64i8:  return "MVT::nxv64i8";
180  case MVT::nxv1i16:  return "MVT::nxv1i16";
181  case MVT::nxv2i16:  return "MVT::nxv2i16";
182  case MVT::nxv4i16:  return "MVT::nxv4i16";
183  case MVT::nxv8i16:  return "MVT::nxv8i16";
184  case MVT::nxv16i16: return "MVT::nxv16i16";
185  case MVT::nxv32i16: return "MVT::nxv32i16";
186  case MVT::nxv1i32:  return "MVT::nxv1i32";
187  case MVT::nxv2i32:  return "MVT::nxv2i32";
188  case MVT::nxv4i32:  return "MVT::nxv4i32";
189  case MVT::nxv8i32:  return "MVT::nxv8i32";
190  case MVT::nxv16i32: return "MVT::nxv16i32";
191  case MVT::nxv32i32: return "MVT::nxv32i32";
192  case MVT::nxv1i64:  return "MVT::nxv1i64";
193  case MVT::nxv2i64:  return "MVT::nxv2i64";
194  case MVT::nxv4i64:  return "MVT::nxv4i64";
195  case MVT::nxv8i64:  return "MVT::nxv8i64";
196  case MVT::nxv16i64: return "MVT::nxv16i64";
197  case MVT::nxv32i64: return "MVT::nxv32i64";
198  case MVT::nxv1f16:  return "MVT::nxv1f16";
199  case MVT::nxv2f16:  return "MVT::nxv2f16";
200  case MVT::nxv4f16:  return "MVT::nxv4f16";
201  case MVT::nxv8f16:  return "MVT::nxv8f16";
202  case MVT::nxv16f16: return "MVT::nxv16f16";
203  case MVT::nxv32f16: return "MVT::nxv32f16";
204  case MVT::nxv2bf16:  return "MVT::nxv2bf16";
205  case MVT::nxv4bf16:  return "MVT::nxv4bf16";
206  case MVT::nxv8bf16:  return "MVT::nxv8bf16";
207  case MVT::nxv1f32:  return "MVT::nxv1f32";
208  case MVT::nxv2f32:  return "MVT::nxv2f32";
209  case MVT::nxv4f32:  return "MVT::nxv4f32";
210  case MVT::nxv8f32:  return "MVT::nxv8f32";
211  case MVT::nxv16f32: return "MVT::nxv16f32";
212  case MVT::nxv1f64:  return "MVT::nxv1f64";
213  case MVT::nxv2f64:  return "MVT::nxv2f64";
214  case MVT::nxv4f64:  return "MVT::nxv4f64";
215  case MVT::nxv8f64:  return "MVT::nxv8f64";
216  case MVT::token:    return "MVT::token";
217  case MVT::Metadata: return "MVT::Metadata";
218  case MVT::iPTR:     return "MVT::iPTR";
219  case MVT::iPTRAny:  return "MVT::iPTRAny";
220  case MVT::Untyped:  return "MVT::Untyped";
221  case MVT::exnref:   return "MVT::exnref";
222  default: llvm_unreachable("ILLEGAL VALUE TYPE!");
223  }
224}
225
226/// getQualifiedName - Return the name of the specified record, with a
227/// namespace qualifier if the record contains one.
228///
229std::string llvm::getQualifiedName(const Record *R) {
230  std::string Namespace;
231  if (R->getValue("Namespace"))
232    Namespace = std::string(R->getValueAsString("Namespace"));
233  if (Namespace.empty())
234    return std::string(R->getName());
235  return Namespace + "::" + R->getName().str();
236}
237
238
239/// getTarget - Return the current instance of the Target class.
240///
241CodeGenTarget::CodeGenTarget(RecordKeeper &records)
242  : Records(records), CGH(records) {
243  std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
244  if (Targets.size() == 0)
245    PrintFatalError("ERROR: No 'Target' subclasses defined!");
246  if (Targets.size() != 1)
247    PrintFatalError("ERROR: Multiple subclasses of Target defined!");
248  TargetRec = Targets[0];
249}
250
251CodeGenTarget::~CodeGenTarget() {
252}
253
254const StringRef CodeGenTarget::getName() const {
255  return TargetRec->getName();
256}
257
258StringRef CodeGenTarget::getInstNamespace() const {
259  for (const CodeGenInstruction *Inst : getInstructionsByEnumValue()) {
260    // Make sure not to pick up "TargetOpcode" by accidentally getting
261    // the namespace off the PHI instruction or something.
262    if (Inst->Namespace != "TargetOpcode")
263      return Inst->Namespace;
264  }
265
266  return "";
267}
268
269Record *CodeGenTarget::getInstructionSet() const {
270  return TargetRec->getValueAsDef("InstructionSet");
271}
272
273bool CodeGenTarget::getAllowRegisterRenaming() const {
274  return TargetRec->getValueAsInt("AllowRegisterRenaming");
275}
276
277/// getAsmParser - Return the AssemblyParser definition for this target.
278///
279Record *CodeGenTarget::getAsmParser() const {
280  std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
281  if (AsmParserNum >= LI.size())
282    PrintFatalError("Target does not have an AsmParser #" +
283                    Twine(AsmParserNum) + "!");
284  return LI[AsmParserNum];
285}
286
287/// getAsmParserVariant - Return the AssemblyParserVariant definition for
288/// this target.
289///
290Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
291  std::vector<Record*> LI =
292    TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
293  if (i >= LI.size())
294    PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
295                    "!");
296  return LI[i];
297}
298
299/// getAsmParserVariantCount - Return the AssemblyParserVariant definition
300/// available for this target.
301///
302unsigned CodeGenTarget::getAsmParserVariantCount() const {
303  std::vector<Record*> LI =
304    TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
305  return LI.size();
306}
307
308/// getAsmWriter - Return the AssemblyWriter definition for this target.
309///
310Record *CodeGenTarget::getAsmWriter() const {
311  std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
312  if (AsmWriterNum >= LI.size())
313    PrintFatalError("Target does not have an AsmWriter #" +
314                    Twine(AsmWriterNum) + "!");
315  return LI[AsmWriterNum];
316}
317
318CodeGenRegBank &CodeGenTarget::getRegBank() const {
319  if (!RegBank)
320    RegBank = std::make_unique<CodeGenRegBank>(Records, getHwModes());
321  return *RegBank;
322}
323
324Optional<CodeGenRegisterClass *>
325CodeGenTarget::getSuperRegForSubReg(const ValueTypeByHwMode &ValueTy,
326                                    CodeGenRegBank &RegBank,
327                                    const CodeGenSubRegIndex *SubIdx) const {
328  std::vector<CodeGenRegisterClass *> Candidates;
329  auto &RegClasses = RegBank.getRegClasses();
330
331  // Try to find a register class which supports ValueTy, and also contains
332  // SubIdx.
333  for (CodeGenRegisterClass &RC : RegClasses) {
334    // Is there a subclass of this class which contains this subregister index?
335    CodeGenRegisterClass *SubClassWithSubReg = RC.getSubClassWithSubReg(SubIdx);
336    if (!SubClassWithSubReg)
337      continue;
338
339    // We have a class. Check if it supports this value type.
340    if (llvm::none_of(SubClassWithSubReg->VTs,
341                      [&ValueTy](const ValueTypeByHwMode &ClassVT) {
342                        return ClassVT == ValueTy;
343                      }))
344      continue;
345
346    // We have a register class which supports both the value type and
347    // subregister index. Remember it.
348    Candidates.push_back(SubClassWithSubReg);
349  }
350
351  // If we didn't find anything, we're done.
352  if (Candidates.empty())
353    return None;
354
355  // Find and return the largest of our candidate classes.
356  llvm::stable_sort(Candidates, [&](const CodeGenRegisterClass *A,
357                                    const CodeGenRegisterClass *B) {
358    if (A->getMembers().size() > B->getMembers().size())
359      return true;
360
361    if (A->getMembers().size() < B->getMembers().size())
362      return false;
363
364    // Order by name as a tie-breaker.
365    return StringRef(A->getName()) < B->getName();
366  });
367
368  return Candidates[0];
369}
370
371void CodeGenTarget::ReadRegAltNameIndices() const {
372  RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
373  llvm::sort(RegAltNameIndices, LessRecord());
374}
375
376/// getRegisterByName - If there is a register with the specific AsmName,
377/// return it.
378const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
379  const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
380  StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
381  if (I == Regs.end())
382    return nullptr;
383  return I->second;
384}
385
386std::vector<ValueTypeByHwMode> CodeGenTarget::getRegisterVTs(Record *R)
387      const {
388  const CodeGenRegister *Reg = getRegBank().getReg(R);
389  std::vector<ValueTypeByHwMode> Result;
390  for (const auto &RC : getRegBank().getRegClasses()) {
391    if (RC.contains(Reg)) {
392      ArrayRef<ValueTypeByHwMode> InVTs = RC.getValueTypes();
393      Result.insert(Result.end(), InVTs.begin(), InVTs.end());
394    }
395  }
396
397  // Remove duplicates.
398  llvm::sort(Result);
399  Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
400  return Result;
401}
402
403
404void CodeGenTarget::ReadLegalValueTypes() const {
405  for (const auto &RC : getRegBank().getRegClasses())
406    LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
407
408  // Remove duplicates.
409  llvm::sort(LegalValueTypes);
410  LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
411                                    LegalValueTypes.end()),
412                        LegalValueTypes.end());
413}
414
415CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
416  if (!SchedModels)
417    SchedModels = std::make_unique<CodeGenSchedModels>(Records, *this);
418  return *SchedModels;
419}
420
421void CodeGenTarget::ReadInstructions() const {
422  NamedRegionTimer T("Read Instructions", "Time spent reading instructions",
423                     "CodeGenTarget", "CodeGenTarget", TimeRegions);
424  std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
425  if (Insts.size() <= 2)
426    PrintFatalError("No 'Instruction' subclasses defined!");
427
428  // Parse the instructions defined in the .td file.
429  for (unsigned i = 0, e = Insts.size(); i != e; ++i)
430    Instructions[Insts[i]] = std::make_unique<CodeGenInstruction>(Insts[i]);
431}
432
433static const CodeGenInstruction *
434GetInstByName(const char *Name,
435              const DenseMap<const Record*,
436                             std::unique_ptr<CodeGenInstruction>> &Insts,
437              RecordKeeper &Records) {
438  const Record *Rec = Records.getDef(Name);
439
440  const auto I = Insts.find(Rec);
441  if (!Rec || I == Insts.end())
442    PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
443  return I->second.get();
444}
445
446static const char *const FixedInstrs[] = {
447#define HANDLE_TARGET_OPCODE(OPC) #OPC,
448#include "llvm/Support/TargetOpcodes.def"
449    nullptr};
450
451unsigned CodeGenTarget::getNumFixedInstructions() {
452  return array_lengthof(FixedInstrs) - 1;
453}
454
455/// Return all of the instructions defined by the target, ordered by
456/// their enum value.
457void CodeGenTarget::ComputeInstrsByEnum() const {
458  const auto &Insts = getInstructions();
459  for (const char *const *p = FixedInstrs; *p; ++p) {
460    const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
461    assert(Instr && "Missing target independent instruction");
462    assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
463    InstrsByEnum.push_back(Instr);
464  }
465  unsigned EndOfPredefines = InstrsByEnum.size();
466  assert(EndOfPredefines == getNumFixedInstructions() &&
467         "Missing generic opcode");
468
469  for (const auto &I : Insts) {
470    const CodeGenInstruction *CGI = I.second.get();
471    if (CGI->Namespace != "TargetOpcode") {
472      InstrsByEnum.push_back(CGI);
473      if (CGI->TheDef->getValueAsBit("isPseudo"))
474        ++NumPseudoInstructions;
475    }
476  }
477
478  assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
479
480  // All of the instructions are now in random order based on the map iteration.
481  llvm::sort(
482      InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
483      [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
484        const auto &D1 = *Rec1->TheDef;
485        const auto &D2 = *Rec2->TheDef;
486        return std::make_tuple(!D1.getValueAsBit("isPseudo"), D1.getName()) <
487               std::make_tuple(!D2.getValueAsBit("isPseudo"), D2.getName());
488      });
489}
490
491
492/// isLittleEndianEncoding - Return whether this target encodes its instruction
493/// in little-endian format, i.e. bits laid out in the order [0..n]
494///
495bool CodeGenTarget::isLittleEndianEncoding() const {
496  return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
497}
498
499/// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
500/// encodings, reverse the bit order of all instructions.
501void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
502  if (!isLittleEndianEncoding())
503    return;
504
505  std::vector<Record *> Insts =
506      Records.getAllDerivedDefinitions("InstructionEncoding");
507  for (Record *R : Insts) {
508    if (R->getValueAsString("Namespace") == "TargetOpcode" ||
509        R->getValueAsBit("isPseudo"))
510      continue;
511
512    BitsInit *BI = R->getValueAsBitsInit("Inst");
513
514    unsigned numBits = BI->getNumBits();
515
516    SmallVector<Init *, 16> NewBits(numBits);
517
518    for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
519      unsigned bitSwapIdx = numBits - bit - 1;
520      Init *OrigBit = BI->getBit(bit);
521      Init *BitSwap = BI->getBit(bitSwapIdx);
522      NewBits[bit]        = BitSwap;
523      NewBits[bitSwapIdx] = OrigBit;
524    }
525    if (numBits % 2) {
526      unsigned middle = (numBits + 1) / 2;
527      NewBits[middle] = BI->getBit(middle);
528    }
529
530    BitsInit *NewBI = BitsInit::get(NewBits);
531
532    // Update the bits in reversed order so that emitInstrOpBits will get the
533    // correct endianness.
534    R->getValue("Inst")->setValue(NewBI);
535  }
536}
537
538/// guessInstructionProperties - Return true if it's OK to guess instruction
539/// properties instead of raising an error.
540///
541/// This is configurable as a temporary migration aid. It will eventually be
542/// permanently false.
543bool CodeGenTarget::guessInstructionProperties() const {
544  return getInstructionSet()->getValueAsBit("guessInstructionProperties");
545}
546
547//===----------------------------------------------------------------------===//
548// ComplexPattern implementation
549//
550ComplexPattern::ComplexPattern(Record *R) {
551  Ty          = ::getValueType(R->getValueAsDef("Ty"));
552  NumOperands = R->getValueAsInt("NumOperands");
553  SelectFunc = std::string(R->getValueAsString("SelectFunc"));
554  RootNodes   = R->getValueAsListOfDefs("RootNodes");
555
556  // FIXME: This is a hack to statically increase the priority of patterns which
557  // maps a sub-dag to a complex pattern. e.g. favors LEA over ADD. To get best
558  // possible pattern match we'll need to dynamically calculate the complexity
559  // of all patterns a dag can potentially map to.
560  int64_t RawComplexity = R->getValueAsInt("Complexity");
561  if (RawComplexity == -1)
562    Complexity = NumOperands * 3;
563  else
564    Complexity = RawComplexity;
565
566  // FIXME: Why is this different from parseSDPatternOperatorProperties?
567  // Parse the properties.
568  Properties = 0;
569  std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
570  for (unsigned i = 0, e = PropList.size(); i != e; ++i)
571    if (PropList[i]->getName() == "SDNPHasChain") {
572      Properties |= 1 << SDNPHasChain;
573    } else if (PropList[i]->getName() == "SDNPOptInGlue") {
574      Properties |= 1 << SDNPOptInGlue;
575    } else if (PropList[i]->getName() == "SDNPMayStore") {
576      Properties |= 1 << SDNPMayStore;
577    } else if (PropList[i]->getName() == "SDNPMayLoad") {
578      Properties |= 1 << SDNPMayLoad;
579    } else if (PropList[i]->getName() == "SDNPSideEffect") {
580      Properties |= 1 << SDNPSideEffect;
581    } else if (PropList[i]->getName() == "SDNPMemOperand") {
582      Properties |= 1 << SDNPMemOperand;
583    } else if (PropList[i]->getName() == "SDNPVariadic") {
584      Properties |= 1 << SDNPVariadic;
585    } else if (PropList[i]->getName() == "SDNPWantRoot") {
586      Properties |= 1 << SDNPWantRoot;
587    } else if (PropList[i]->getName() == "SDNPWantParent") {
588      Properties |= 1 << SDNPWantParent;
589    } else {
590      PrintFatalError(R->getLoc(), "Unsupported SD Node property '" +
591                                       PropList[i]->getName() +
592                                       "' on ComplexPattern '" + R->getName() +
593                                       "'!");
594    }
595}
596
597//===----------------------------------------------------------------------===//
598// CodeGenIntrinsic Implementation
599//===----------------------------------------------------------------------===//
600
601CodeGenIntrinsicTable::CodeGenIntrinsicTable(const RecordKeeper &RC) {
602  std::vector<Record*> Defs = RC.getAllDerivedDefinitions("Intrinsic");
603
604  Intrinsics.reserve(Defs.size());
605
606  for (unsigned I = 0, e = Defs.size(); I != e; ++I)
607    Intrinsics.push_back(CodeGenIntrinsic(Defs[I]));
608
609  llvm::sort(Intrinsics,
610             [](const CodeGenIntrinsic &LHS, const CodeGenIntrinsic &RHS) {
611               return std::tie(LHS.TargetPrefix, LHS.Name) <
612                      std::tie(RHS.TargetPrefix, RHS.Name);
613             });
614  Targets.push_back({"", 0, 0});
615  for (size_t I = 0, E = Intrinsics.size(); I < E; ++I)
616    if (Intrinsics[I].TargetPrefix != Targets.back().Name) {
617      Targets.back().Count = I - Targets.back().Offset;
618      Targets.push_back({Intrinsics[I].TargetPrefix, I, 0});
619    }
620  Targets.back().Count = Intrinsics.size() - Targets.back().Offset;
621}
622
623CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
624  TheDef = R;
625  std::string DefName = std::string(R->getName());
626  ArrayRef<SMLoc> DefLoc = R->getLoc();
627  ModRef = ReadWriteMem;
628  Properties = 0;
629  isOverloaded = false;
630  isCommutative = false;
631  canThrow = false;
632  isNoReturn = false;
633  isNoSync = false;
634  isNoFree = false;
635  isWillReturn = false;
636  isCold = false;
637  isNoDuplicate = false;
638  isConvergent = false;
639  isSpeculatable = false;
640  hasSideEffects = false;
641
642  if (DefName.size() <= 4 ||
643      std::string(DefName.begin(), DefName.begin() + 4) != "int_")
644    PrintFatalError(DefLoc,
645                    "Intrinsic '" + DefName + "' does not start with 'int_'!");
646
647  EnumName = std::string(DefName.begin()+4, DefName.end());
648
649  if (R->getValue("GCCBuiltinName"))  // Ignore a missing GCCBuiltinName field.
650    GCCBuiltinName = std::string(R->getValueAsString("GCCBuiltinName"));
651  if (R->getValue("MSBuiltinName"))   // Ignore a missing MSBuiltinName field.
652    MSBuiltinName = std::string(R->getValueAsString("MSBuiltinName"));
653
654  TargetPrefix = std::string(R->getValueAsString("TargetPrefix"));
655  Name = std::string(R->getValueAsString("LLVMName"));
656
657  if (Name == "") {
658    // If an explicit name isn't specified, derive one from the DefName.
659    Name = "llvm.";
660
661    for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
662      Name += (EnumName[i] == '_') ? '.' : EnumName[i];
663  } else {
664    // Verify it starts with "llvm.".
665    if (Name.size() <= 5 ||
666        std::string(Name.begin(), Name.begin() + 5) != "llvm.")
667      PrintFatalError(DefLoc, "Intrinsic '" + DefName +
668                                  "'s name does not start with 'llvm.'!");
669  }
670
671  // If TargetPrefix is specified, make sure that Name starts with
672  // "llvm.<targetprefix>.".
673  if (!TargetPrefix.empty()) {
674    if (Name.size() < 6+TargetPrefix.size() ||
675        std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
676        != (TargetPrefix + "."))
677      PrintFatalError(DefLoc, "Intrinsic '" + DefName +
678                                  "' does not start with 'llvm." +
679                                  TargetPrefix + ".'!");
680  }
681
682  ListInit *RetTypes = R->getValueAsListInit("RetTypes");
683  ListInit *ParamTypes = R->getValueAsListInit("ParamTypes");
684
685  // First collate a list of overloaded types.
686  std::vector<MVT::SimpleValueType> OverloadedVTs;
687  for (ListInit *TypeList : {RetTypes, ParamTypes}) {
688    for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
689      Record *TyEl = TypeList->getElementAsRecord(i);
690      assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
691
692      if (TyEl->isSubClassOf("LLVMMatchType"))
693        continue;
694
695      MVT::SimpleValueType VT = getValueType(TyEl->getValueAsDef("VT"));
696      if (MVT(VT).isOverloaded()) {
697        OverloadedVTs.push_back(VT);
698        isOverloaded = true;
699      }
700    }
701  }
702
703  // Parse the list of return types.
704  ListInit *TypeList = RetTypes;
705  for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
706    Record *TyEl = TypeList->getElementAsRecord(i);
707    assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
708    MVT::SimpleValueType VT;
709    if (TyEl->isSubClassOf("LLVMMatchType")) {
710      unsigned MatchTy = TyEl->getValueAsInt("Number");
711      assert(MatchTy < OverloadedVTs.size() &&
712             "Invalid matching number!");
713      VT = OverloadedVTs[MatchTy];
714      // It only makes sense to use the extended and truncated vector element
715      // variants with iAny types; otherwise, if the intrinsic is not
716      // overloaded, all the types can be specified directly.
717      assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
718               !TyEl->isSubClassOf("LLVMTruncatedType")) ||
719              VT == MVT::iAny || VT == MVT::vAny) &&
720             "Expected iAny or vAny type");
721    } else {
722      VT = getValueType(TyEl->getValueAsDef("VT"));
723    }
724
725    // Reject invalid types.
726    if (VT == MVT::isVoid)
727      PrintFatalError(DefLoc, "Intrinsic '" + DefName +
728                                  " has void in result type list!");
729
730    IS.RetVTs.push_back(VT);
731    IS.RetTypeDefs.push_back(TyEl);
732  }
733
734  // Parse the list of parameter types.
735  TypeList = ParamTypes;
736  for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
737    Record *TyEl = TypeList->getElementAsRecord(i);
738    assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
739    MVT::SimpleValueType VT;
740    if (TyEl->isSubClassOf("LLVMMatchType")) {
741      unsigned MatchTy = TyEl->getValueAsInt("Number");
742      if (MatchTy >= OverloadedVTs.size()) {
743        PrintError(R->getLoc(),
744                   "Parameter #" + Twine(i) + " has out of bounds matching "
745                   "number " + Twine(MatchTy));
746        PrintFatalError(DefLoc,
747                        Twine("ParamTypes is ") + TypeList->getAsString());
748      }
749      VT = OverloadedVTs[MatchTy];
750      // It only makes sense to use the extended and truncated vector element
751      // variants with iAny types; otherwise, if the intrinsic is not
752      // overloaded, all the types can be specified directly.
753      assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
754               !TyEl->isSubClassOf("LLVMTruncatedType")) ||
755              VT == MVT::iAny || VT == MVT::vAny) &&
756             "Expected iAny or vAny type");
757    } else
758      VT = getValueType(TyEl->getValueAsDef("VT"));
759
760    // Reject invalid types.
761    if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
762      PrintFatalError(DefLoc, "Intrinsic '" + DefName +
763                                  " has void in result type list!");
764
765    IS.ParamVTs.push_back(VT);
766    IS.ParamTypeDefs.push_back(TyEl);
767  }
768
769  // Parse the intrinsic properties.
770  ListInit *PropList = R->getValueAsListInit("IntrProperties");
771  for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
772    Record *Property = PropList->getElementAsRecord(i);
773    assert(Property->isSubClassOf("IntrinsicProperty") &&
774           "Expected a property!");
775
776    if (Property->getName() == "IntrNoMem")
777      ModRef = NoMem;
778    else if (Property->getName() == "IntrReadMem")
779      ModRef = ModRefBehavior(ModRef & ~MR_Mod);
780    else if (Property->getName() == "IntrWriteMem")
781      ModRef = ModRefBehavior(ModRef & ~MR_Ref);
782    else if (Property->getName() == "IntrArgMemOnly")
783      ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_ArgMem);
784    else if (Property->getName() == "IntrInaccessibleMemOnly")
785      ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_InaccessibleMem);
786    else if (Property->getName() == "IntrInaccessibleMemOrArgMemOnly")
787      ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_ArgMem |
788                              MR_InaccessibleMem);
789    else if (Property->getName() == "Commutative")
790      isCommutative = true;
791    else if (Property->getName() == "Throws")
792      canThrow = true;
793    else if (Property->getName() == "IntrNoDuplicate")
794      isNoDuplicate = true;
795    else if (Property->getName() == "IntrConvergent")
796      isConvergent = true;
797    else if (Property->getName() == "IntrNoReturn")
798      isNoReturn = true;
799    else if (Property->getName() == "IntrNoSync")
800      isNoSync = true;
801    else if (Property->getName() == "IntrNoFree")
802      isNoFree = true;
803    else if (Property->getName() == "IntrWillReturn")
804      isWillReturn = true;
805    else if (Property->getName() == "IntrCold")
806      isCold = true;
807    else if (Property->getName() == "IntrSpeculatable")
808      isSpeculatable = true;
809    else if (Property->getName() == "IntrHasSideEffects")
810      hasSideEffects = true;
811    else if (Property->isSubClassOf("NoCapture")) {
812      unsigned ArgNo = Property->getValueAsInt("ArgNo");
813      ArgumentAttributes.emplace_back(ArgNo, NoCapture, 0);
814    } else if (Property->isSubClassOf("NoAlias")) {
815      unsigned ArgNo = Property->getValueAsInt("ArgNo");
816      ArgumentAttributes.emplace_back(ArgNo, NoAlias, 0);
817    } else if (Property->isSubClassOf("Returned")) {
818      unsigned ArgNo = Property->getValueAsInt("ArgNo");
819      ArgumentAttributes.emplace_back(ArgNo, Returned, 0);
820    } else if (Property->isSubClassOf("ReadOnly")) {
821      unsigned ArgNo = Property->getValueAsInt("ArgNo");
822      ArgumentAttributes.emplace_back(ArgNo, ReadOnly, 0);
823    } else if (Property->isSubClassOf("WriteOnly")) {
824      unsigned ArgNo = Property->getValueAsInt("ArgNo");
825      ArgumentAttributes.emplace_back(ArgNo, WriteOnly, 0);
826    } else if (Property->isSubClassOf("ReadNone")) {
827      unsigned ArgNo = Property->getValueAsInt("ArgNo");
828      ArgumentAttributes.emplace_back(ArgNo, ReadNone, 0);
829    } else if (Property->isSubClassOf("ImmArg")) {
830      unsigned ArgNo = Property->getValueAsInt("ArgNo");
831      ArgumentAttributes.emplace_back(ArgNo, ImmArg, 0);
832    } else if (Property->isSubClassOf("Align")) {
833      unsigned ArgNo = Property->getValueAsInt("ArgNo");
834      uint64_t Align = Property->getValueAsInt("Align");
835      ArgumentAttributes.emplace_back(ArgNo, Alignment, Align);
836    } else
837      llvm_unreachable("Unknown property!");
838  }
839
840  // Also record the SDPatternOperator Properties.
841  Properties = parseSDPatternOperatorProperties(R);
842
843  // Sort the argument attributes for later benefit.
844  llvm::sort(ArgumentAttributes);
845}
846
847bool CodeGenIntrinsic::isParamAPointer(unsigned ParamIdx) const {
848  if (ParamIdx >= IS.ParamVTs.size())
849    return false;
850  MVT ParamType = MVT(IS.ParamVTs[ParamIdx]);
851  return ParamType == MVT::iPTR || ParamType == MVT::iPTRAny;
852}
853
854bool CodeGenIntrinsic::isParamImmArg(unsigned ParamIdx) const {
855  // Convert argument index to attribute index starting from `FirstArgIndex`.
856  ArgAttribute Val{ParamIdx + 1, ImmArg, 0};
857  return std::binary_search(ArgumentAttributes.begin(),
858                            ArgumentAttributes.end(), Val);
859}
860