1//- WebAssembly.td - Describe the WebAssembly Target Machine --*- tablegen -*-//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8///
9/// \file
10/// This is a target description file for the WebAssembly architecture,
11/// which is also known as "wasm".
12///
13//===----------------------------------------------------------------------===//
14
15//===----------------------------------------------------------------------===//
16// Target-independent interfaces which we are implementing
17//===----------------------------------------------------------------------===//
18
19include "llvm/Target/Target.td"
20
21//===----------------------------------------------------------------------===//
22// WebAssembly Subtarget features.
23//===----------------------------------------------------------------------===//
24
25def FeatureSIMD128 : SubtargetFeature<"simd128", "SIMDLevel", "SIMD128",
26                                      "Enable 128-bit SIMD">;
27
28def FeatureUnimplementedSIMD128 :
29      SubtargetFeature<"unimplemented-simd128",
30                       "SIMDLevel", "UnimplementedSIMD128",
31                       "Enable 128-bit SIMD not yet implemented in engines",
32                       [FeatureSIMD128]>;
33
34def FeatureAtomics : SubtargetFeature<"atomics", "HasAtomics", "true",
35                                      "Enable Atomics">;
36
37def FeatureNontrappingFPToInt :
38      SubtargetFeature<"nontrapping-fptoint",
39                       "HasNontrappingFPToInt", "true",
40                       "Enable non-trapping float-to-int conversion operators">;
41
42def FeatureSignExt :
43      SubtargetFeature<"sign-ext",
44                       "HasSignExt", "true",
45                       "Enable sign extension operators">;
46
47def FeatureTailCall :
48      SubtargetFeature<"tail-call",
49                       "HasTailCall", "true",
50                       "Enable tail call instructions">;
51
52def FeatureExceptionHandling :
53      SubtargetFeature<"exception-handling", "HasExceptionHandling", "true",
54                       "Enable Wasm exception handling">;
55
56def FeatureBulkMemory :
57      SubtargetFeature<"bulk-memory", "HasBulkMemory", "true",
58                       "Enable bulk memory operations">;
59
60def FeatureMultivalue :
61      SubtargetFeature<"multivalue",
62                       "HasMultivalue", "true",
63                       "Enable multivalue blocks, instructions, and functions">;
64
65def FeatureMutableGlobals :
66      SubtargetFeature<"mutable-globals", "HasMutableGlobals", "true",
67                       "Enable mutable globals">;
68
69def FeatureReferenceTypes :
70      SubtargetFeature<"reference-types", "HasReferenceTypes", "true",
71                       "Enable reference types">;
72
73//===----------------------------------------------------------------------===//
74// Architectures.
75//===----------------------------------------------------------------------===//
76
77//===----------------------------------------------------------------------===//
78// Register File Description
79//===----------------------------------------------------------------------===//
80
81include "WebAssemblyRegisterInfo.td"
82
83//===----------------------------------------------------------------------===//
84// Instruction Descriptions
85//===----------------------------------------------------------------------===//
86
87include "WebAssemblyInstrInfo.td"
88
89def WebAssemblyInstrInfo : InstrInfo;
90
91//===----------------------------------------------------------------------===//
92// WebAssembly Processors supported.
93//===----------------------------------------------------------------------===//
94
95// Minimal Viable Product.
96def : ProcessorModel<"mvp", NoSchedModel, []>;
97
98// Generic processor: latest stable version.
99def : ProcessorModel<"generic", NoSchedModel, []>;
100
101// Latest and greatest experimental version of WebAssembly. Bugs included!
102def : ProcessorModel<"bleeding-edge", NoSchedModel,
103                      [FeatureSIMD128, FeatureAtomics,
104                       FeatureNontrappingFPToInt, FeatureSignExt,
105                       FeatureMutableGlobals, FeatureBulkMemory,
106                       FeatureTailCall]>;
107
108//===----------------------------------------------------------------------===//
109// Target Declaration
110//===----------------------------------------------------------------------===//
111
112def WebAssemblyAsmParser : AsmParser {
113  // The physical register names are not in the binary format or asm text
114  let ShouldEmitMatchRegisterName = 0;
115}
116
117def WebAssemblyAsmWriter : AsmWriter {
118  string AsmWriterClassName  = "InstPrinter";
119  int PassSubtarget = 0;
120  int Variant = 0;
121  bit isMCAsmWriter = 1;
122}
123
124def WebAssembly : Target {
125  let InstructionSet = WebAssemblyInstrInfo;
126  let AssemblyParsers  = [WebAssemblyAsmParser];
127  let AssemblyWriters = [WebAssemblyAsmWriter];
128}
129