1//===- Mips16FrameLowering.cpp - Mips16 Frame Information -----------------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains the Mips16 implementation of TargetFrameLowering class.
10//
11//===----------------------------------------------------------------------===//
12
13#include "Mips16FrameLowering.h"
14#include "MCTargetDesc/MipsBaseInfo.h"
15#include "Mips16InstrInfo.h"
16#include "MipsInstrInfo.h"
17#include "MipsRegisterInfo.h"
18#include "MipsSubtarget.h"
19#include "llvm/ADT/BitVector.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/MachineFrameInfo.h"
22#include "llvm/CodeGen/MachineFunction.h"
23#include "llvm/CodeGen/MachineInstr.h"
24#include "llvm/CodeGen/MachineInstrBuilder.h"
25#include "llvm/CodeGen/MachineModuleInfo.h"
26#include "llvm/IR/DebugLoc.h"
27#include "llvm/MC/MCContext.h"
28#include "llvm/MC/MCDwarf.h"
29#include "llvm/MC/MCRegisterInfo.h"
30#include "llvm/MC/MachineLocation.h"
31#include "llvm/Support/MathExtras.h"
32#include "llvm/CodeGen/TargetFrameLowering.h"
33#include <cassert>
34#include <cstdint>
35#include <vector>
36
37using namespace llvm;
38
39Mips16FrameLowering::Mips16FrameLowering(const MipsSubtarget &STI)
40    : MipsFrameLowering(STI, STI.getStackAlignment()) {}
41
42void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
43                                       MachineBasicBlock &MBB) const {
44  MachineFrameInfo &MFI = MF.getFrameInfo();
45  const Mips16InstrInfo &TII =
46      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
47  MachineBasicBlock::iterator MBBI = MBB.begin();
48
49  // Debug location must be unknown since the first debug location is used
50  // to determine the end of the prologue.
51  DebugLoc dl;
52
53  uint64_t StackSize = MFI.getStackSize();
54
55  // No need to allocate space on the stack.
56  if (StackSize == 0 && !MFI.adjustsStack()) return;
57
58  MachineModuleInfo &MMI = MF.getMMI();
59  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
60
61  // Adjust stack.
62  TII.makeFrame(Mips::SP, StackSize, MBB, MBBI);
63
64  // emit ".cfi_def_cfa_offset StackSize"
65  unsigned CFIIndex =
66      MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize));
67  BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
68      .addCFIIndex(CFIIndex);
69
70  const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
71
72  if (!CSI.empty()) {
73    const std::vector<CalleeSavedInfo> &CSI = MFI.getCalleeSavedInfo();
74
75    for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
76         E = CSI.end(); I != E; ++I) {
77      int64_t Offset = MFI.getObjectOffset(I->getFrameIdx());
78      unsigned Reg = I->getReg();
79      unsigned DReg = MRI->getDwarfRegNum(Reg, true);
80      unsigned CFIIndex = MF.addFrameInst(
81          MCCFIInstruction::createOffset(nullptr, DReg, Offset));
82      BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::CFI_INSTRUCTION))
83          .addCFIIndex(CFIIndex);
84    }
85  }
86  if (hasFP(MF))
87    BuildMI(MBB, MBBI, dl, TII.get(Mips::MoveR3216), Mips::S0)
88      .addReg(Mips::SP).setMIFlag(MachineInstr::FrameSetup);
89}
90
91void Mips16FrameLowering::emitEpilogue(MachineFunction &MF,
92                                 MachineBasicBlock &MBB) const {
93  MachineBasicBlock::iterator MBBI = MBB.getFirstTerminator();
94  MachineFrameInfo &MFI = MF.getFrameInfo();
95  const Mips16InstrInfo &TII =
96      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
97  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
98  uint64_t StackSize = MFI.getStackSize();
99
100  if (!StackSize)
101    return;
102
103  if (hasFP(MF))
104    BuildMI(MBB, MBBI, dl, TII.get(Mips::Move32R16), Mips::SP)
105      .addReg(Mips::S0);
106
107  // Adjust stack.
108  // assumes stacksize multiple of 8
109  TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI);
110}
111
112bool Mips16FrameLowering::spillCalleeSavedRegisters(
113    MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
114    ArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
115  MachineFunction *MF = MBB.getParent();
116
117  //
118  // Registers RA, S0,S1 are the callee saved registers and they
119  // will be saved with the "save" instruction
120  // during emitPrologue
121  //
122  for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
123    // Add the callee-saved register as live-in. Do not add if the register is
124    // RA and return address is taken, because it has already been added in
125    // method MipsTargetLowering::lowerRETURNADDR.
126    // It's killed at the spill, unless the register is RA and return address
127    // is taken.
128    unsigned Reg = CSI[i].getReg();
129    bool IsRAAndRetAddrIsTaken = (Reg == Mips::RA)
130      && MF->getFrameInfo().isReturnAddressTaken();
131    if (!IsRAAndRetAddrIsTaken)
132      MBB.addLiveIn(Reg);
133  }
134
135  return true;
136}
137
138bool Mips16FrameLowering::restoreCalleeSavedRegisters(
139    MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
140    MutableArrayRef<CalleeSavedInfo> CSI, const TargetRegisterInfo *TRI) const {
141  //
142  // Registers RA,S0,S1 are the callee saved registers and they will be restored
143  // with the restore instruction during emitEpilogue.
144  // We need to override this virtual function, otherwise llvm will try and
145  // restore the registers on it's on from the stack.
146  //
147
148  return true;
149}
150
151bool
152Mips16FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const {
153  const MachineFrameInfo &MFI = MF.getFrameInfo();
154  // Reserve call frame if the size of the maximum call frame fits into 15-bit
155  // immediate field and there are no variable sized objects on the stack.
156  return isInt<15>(MFI.getMaxCallFrameSize()) && !MFI.hasVarSizedObjects();
157}
158
159void Mips16FrameLowering::determineCalleeSaves(MachineFunction &MF,
160                                               BitVector &SavedRegs,
161                                               RegScavenger *RS) const {
162  TargetFrameLowering::determineCalleeSaves(MF, SavedRegs, RS);
163  const Mips16InstrInfo &TII =
164      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
165  const MipsRegisterInfo &RI = TII.getRegisterInfo();
166  const BitVector Reserved = RI.getReservedRegs(MF);
167  bool SaveS2 = Reserved[Mips::S2];
168  if (SaveS2)
169    SavedRegs.set(Mips::S2);
170  if (hasFP(MF))
171    SavedRegs.set(Mips::S0);
172}
173
174const MipsFrameLowering *
175llvm::createMips16FrameLowering(const MipsSubtarget &ST) {
176  return new Mips16FrameLowering(ST);
177}
178