1//===- llvm/CodeGen/DwarfExpression.h - Dwarf Compile Unit ------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file contains support for writing dwarf compile unit.
10//
11//===----------------------------------------------------------------------===//
12
13#ifndef LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
14#define LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
15
16#include "ByteStreamer.h"
17#include "llvm/ADT/ArrayRef.h"
18#include "llvm/ADT/None.h"
19#include "llvm/ADT/Optional.h"
20#include "llvm/ADT/SmallVector.h"
21#include "llvm/IR/DebugInfoMetadata.h"
22#include <cassert>
23#include <cstdint>
24#include <iterator>
25
26namespace llvm {
27
28class AsmPrinter;
29class APInt;
30class DwarfCompileUnit;
31class DIELoc;
32class TargetRegisterInfo;
33class MachineLocation;
34
35/// Holds a DIExpression and keeps track of how many operands have been consumed
36/// so far.
37class DIExpressionCursor {
38  DIExpression::expr_op_iterator Start, End;
39
40public:
41  DIExpressionCursor(const DIExpression *Expr) {
42    if (!Expr) {
43      assert(Start == End);
44      return;
45    }
46    Start = Expr->expr_op_begin();
47    End = Expr->expr_op_end();
48  }
49
50  DIExpressionCursor(ArrayRef<uint64_t> Expr)
51      : Start(Expr.begin()), End(Expr.end()) {}
52
53  DIExpressionCursor(const DIExpressionCursor &) = default;
54
55  /// Consume one operation.
56  Optional<DIExpression::ExprOperand> take() {
57    if (Start == End)
58      return None;
59    return *(Start++);
60  }
61
62  /// Consume N operations.
63  void consume(unsigned N) { std::advance(Start, N); }
64
65  /// Return the current operation.
66  Optional<DIExpression::ExprOperand> peek() const {
67    if (Start == End)
68      return None;
69    return *(Start);
70  }
71
72  /// Return the next operation.
73  Optional<DIExpression::ExprOperand> peekNext() const {
74    if (Start == End)
75      return None;
76
77    auto Next = Start.getNext();
78    if (Next == End)
79      return None;
80
81    return *Next;
82  }
83
84  /// Determine whether there are any operations left in this expression.
85  operator bool() const { return Start != End; }
86
87  DIExpression::expr_op_iterator begin() const { return Start; }
88  DIExpression::expr_op_iterator end() const { return End; }
89
90  /// Retrieve the fragment information, if any.
91  Optional<DIExpression::FragmentInfo> getFragmentInfo() const {
92    return DIExpression::getFragmentInfo(Start, End);
93  }
94};
95
96/// Base class containing the logic for constructing DWARF expressions
97/// independently of whether they are emitted into a DIE or into a .debug_loc
98/// entry.
99///
100/// Some DWARF operations, e.g. DW_OP_entry_value, need to calculate the size
101/// of a succeeding DWARF block before the latter is emitted to the output.
102/// To handle such cases, data can conditionally be emitted to a temporary
103/// buffer, which can later on be committed to the main output. The size of the
104/// temporary buffer is queryable, allowing for the size of the data to be
105/// emitted before the data is committed.
106class DwarfExpression {
107protected:
108  /// Holds information about all subregisters comprising a register location.
109  struct Register {
110    int DwarfRegNo;
111    unsigned SubRegSize;
112    const char *Comment;
113
114    /// Create a full register, no extra DW_OP_piece operators necessary.
115    static Register createRegister(int RegNo, const char *Comment) {
116      return {RegNo, 0, Comment};
117    }
118
119    /// Create a subregister that needs a DW_OP_piece operator with SizeInBits.
120    static Register createSubRegister(int RegNo, unsigned SizeInBits,
121                                      const char *Comment) {
122      return {RegNo, SizeInBits, Comment};
123    }
124
125    bool isSubRegister() const { return SubRegSize; }
126  };
127
128  /// Whether we are currently emitting an entry value operation.
129  bool IsEmittingEntryValue = false;
130
131  DwarfCompileUnit &CU;
132
133  /// The register location, if any.
134  SmallVector<Register, 2> DwarfRegs;
135
136  /// Current Fragment Offset in Bits.
137  uint64_t OffsetInBits = 0;
138
139  /// Sometimes we need to add a DW_OP_bit_piece to describe a subregister.
140  unsigned SubRegisterSizeInBits : 16;
141  unsigned SubRegisterOffsetInBits : 16;
142
143  /// The kind of location description being produced.
144  enum { Unknown = 0, Register, Memory, Implicit };
145
146  /// Additional location flags which may be combined with any location kind.
147  /// Currently, entry values are not supported for the Memory location kind.
148  enum { EntryValue = 1 << 0, Indirect = 1 << 1, CallSiteParamValue = 1 << 2 };
149
150  unsigned LocationKind : 3;
151  unsigned LocationFlags : 3;
152  unsigned DwarfVersion : 4;
153
154public:
155  /// Set the location (\p Loc) and \ref DIExpression (\p DIExpr) to describe.
156  void setLocation(const MachineLocation &Loc, const DIExpression *DIExpr);
157
158  bool isUnknownLocation() const { return LocationKind == Unknown; }
159
160  bool isMemoryLocation() const { return LocationKind == Memory; }
161
162  bool isRegisterLocation() const { return LocationKind == Register; }
163
164  bool isImplicitLocation() const { return LocationKind == Implicit; }
165
166  bool isEntryValue() const { return LocationFlags & EntryValue; }
167
168  bool isIndirect() const { return LocationFlags & Indirect; }
169
170  bool isParameterValue() { return LocationFlags & CallSiteParamValue; }
171
172  Optional<uint8_t> TagOffset;
173
174protected:
175  /// Push a DW_OP_piece / DW_OP_bit_piece for emitting later, if one is needed
176  /// to represent a subregister.
177  void setSubRegisterPiece(unsigned SizeInBits, unsigned OffsetInBits) {
178    assert(SizeInBits < 65536 && OffsetInBits < 65536);
179    SubRegisterSizeInBits = SizeInBits;
180    SubRegisterOffsetInBits = OffsetInBits;
181  }
182
183  /// Add masking operations to stencil out a subregister.
184  void maskSubRegister();
185
186  /// Output a dwarf operand and an optional assembler comment.
187  virtual void emitOp(uint8_t Op, const char *Comment = nullptr) = 0;
188
189  /// Emit a raw signed value.
190  virtual void emitSigned(int64_t Value) = 0;
191
192  /// Emit a raw unsigned value.
193  virtual void emitUnsigned(uint64_t Value) = 0;
194
195  virtual void emitData1(uint8_t Value) = 0;
196
197  virtual void emitBaseTypeRef(uint64_t Idx) = 0;
198
199  /// Start emitting data to the temporary buffer. The data stored in the
200  /// temporary buffer can be committed to the main output using
201  /// commitTemporaryBuffer().
202  virtual void enableTemporaryBuffer() = 0;
203
204  /// Disable emission to the temporary buffer. This does not commit data
205  /// in the temporary buffer to the main output.
206  virtual void disableTemporaryBuffer() = 0;
207
208  /// Return the emitted size, in number of bytes, for the data stored in the
209  /// temporary buffer.
210  virtual unsigned getTemporaryBufferSize() = 0;
211
212  /// Commit the data stored in the temporary buffer to the main output.
213  virtual void commitTemporaryBuffer() = 0;
214
215  /// Emit a normalized unsigned constant.
216  void emitConstu(uint64_t Value);
217
218  /// Return whether the given machine register is the frame register in the
219  /// current function.
220  virtual bool isFrameRegister(const TargetRegisterInfo &TRI,
221                               unsigned MachineReg) = 0;
222
223  /// Emit a DW_OP_reg operation. Note that this is only legal inside a DWARF
224  /// register location description.
225  void addReg(int DwarfReg, const char *Comment = nullptr);
226
227  /// Emit a DW_OP_breg operation.
228  void addBReg(int DwarfReg, int Offset);
229
230  /// Emit DW_OP_fbreg <Offset>.
231  void addFBReg(int Offset);
232
233  /// Emit a partial DWARF register operation.
234  ///
235  /// \param MachineReg           The register number.
236  /// \param MaxSize              If the register must be composed from
237  ///                             sub-registers this is an upper bound
238  ///                             for how many bits the emitted DW_OP_piece
239  ///                             may cover.
240  ///
241  /// If size and offset is zero an operation for the entire register is
242  /// emitted: Some targets do not provide a DWARF register number for every
243  /// register.  If this is the case, this function will attempt to emit a DWARF
244  /// register by emitting a fragment of a super-register or by piecing together
245  /// multiple subregisters that alias the register.
246  ///
247  /// \return false if no DWARF register exists for MachineReg.
248  bool addMachineReg(const TargetRegisterInfo &TRI, unsigned MachineReg,
249                     unsigned MaxSize = ~1U);
250
251  /// Emit a DW_OP_piece or DW_OP_bit_piece operation for a variable fragment.
252  /// \param OffsetInBits    This is an optional offset into the location that
253  /// is at the top of the DWARF stack.
254  void addOpPiece(unsigned SizeInBits, unsigned OffsetInBits = 0);
255
256  /// Emit a shift-right dwarf operation.
257  void addShr(unsigned ShiftBy);
258
259  /// Emit a bitwise and dwarf operation.
260  void addAnd(unsigned Mask);
261
262  /// Emit a DW_OP_stack_value, if supported.
263  ///
264  /// The proper way to describe a constant value is DW_OP_constu <const>,
265  /// DW_OP_stack_value.  Unfortunately, DW_OP_stack_value was not available
266  /// until DWARF 4, so we will continue to generate DW_OP_constu <const> for
267  /// DWARF 2 and DWARF 3. Technically, this is incorrect since DW_OP_const
268  /// <const> actually describes a value at a constant address, not a constant
269  /// value.  However, in the past there was no better way to describe a
270  /// constant value, so the producers and consumers started to rely on
271  /// heuristics to disambiguate the value vs. location status of the
272  /// expression.  See PR21176 for more details.
273  void addStackValue();
274
275  /// Finalize an entry value by emitting its size operand, and committing the
276  /// DWARF block which has been emitted to the temporary buffer.
277  void finalizeEntryValue();
278
279  /// Cancel the emission of an entry value.
280  void cancelEntryValue();
281
282  ~DwarfExpression() = default;
283
284public:
285  DwarfExpression(unsigned DwarfVersion, DwarfCompileUnit &CU)
286      : CU(CU), SubRegisterSizeInBits(0), SubRegisterOffsetInBits(0),
287        LocationKind(Unknown), LocationFlags(Unknown),
288        DwarfVersion(DwarfVersion) {}
289
290  /// This needs to be called last to commit any pending changes.
291  void finalize();
292
293  /// Emit a signed constant.
294  void addSignedConstant(int64_t Value);
295
296  /// Emit an unsigned constant.
297  void addUnsignedConstant(uint64_t Value);
298
299  /// Emit an unsigned constant.
300  void addUnsignedConstant(const APInt &Value);
301
302  /// Lock this down to become a memory location description.
303  void setMemoryLocationKind() {
304    assert(isUnknownLocation());
305    LocationKind = Memory;
306  }
307
308  /// Lock this down to become an entry value location.
309  void setEntryValueFlags(const MachineLocation &Loc);
310
311  /// Lock this down to become a call site parameter location.
312  void setCallSiteParamValueFlag() { LocationFlags |= CallSiteParamValue; }
313
314  /// Emit a machine register location. As an optimization this may also consume
315  /// the prefix of a DwarfExpression if a more efficient representation for
316  /// combining the register location and the first operation exists.
317  ///
318  /// \param FragmentOffsetInBits     If this is one fragment out of a
319  /// fragmented
320  ///                                 location, this is the offset of the
321  ///                                 fragment inside the entire variable.
322  /// \return                         false if no DWARF register exists
323  ///                                 for MachineReg.
324  bool addMachineRegExpression(const TargetRegisterInfo &TRI,
325                               DIExpressionCursor &Expr, unsigned MachineReg,
326                               unsigned FragmentOffsetInBits = 0);
327
328  /// Begin emission of an entry value dwarf operation. The entry value's
329  /// first operand is the size of the DWARF block (its second operand),
330  /// which needs to be calculated at time of emission, so we don't emit
331  /// any operands here.
332  void beginEntryValueExpression(DIExpressionCursor &ExprCursor);
333
334  /// Return the index of a base type with the given properties and
335  /// create one if necessary.
336  unsigned getOrCreateBaseType(unsigned BitSize, dwarf::TypeKind Encoding);
337
338  /// Emit all remaining operations in the DIExpressionCursor.
339  ///
340  /// \param FragmentOffsetInBits     If this is one fragment out of multiple
341  ///                                 locations, this is the offset of the
342  ///                                 fragment inside the entire variable.
343  void addExpression(DIExpressionCursor &&Expr,
344                     unsigned FragmentOffsetInBits = 0);
345
346  /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
347  /// the fragment described by \c Expr.
348  void addFragmentOffset(const DIExpression *Expr);
349
350  void emitLegacySExt(unsigned FromBits);
351  void emitLegacyZExt(unsigned FromBits);
352
353  /// Emit location information expressed via WebAssembly location + offset
354  /// The Index is an identifier for locals, globals or operand stack.
355  void addWasmLocation(unsigned Index, uint64_t Offset);
356};
357
358/// DwarfExpression implementation for .debug_loc entries.
359class DebugLocDwarfExpression final : public DwarfExpression {
360
361  struct TempBuffer {
362    SmallString<32> Bytes;
363    std::vector<std::string> Comments;
364    BufferByteStreamer BS;
365
366    TempBuffer(bool GenerateComments) : BS(Bytes, Comments, GenerateComments) {}
367  };
368
369  std::unique_ptr<TempBuffer> TmpBuf;
370  BufferByteStreamer &OutBS;
371  bool IsBuffering = false;
372
373  /// Return the byte streamer that currently is being emitted to.
374  ByteStreamer &getActiveStreamer() { return IsBuffering ? TmpBuf->BS : OutBS; }
375
376  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
377  void emitSigned(int64_t Value) override;
378  void emitUnsigned(uint64_t Value) override;
379  void emitData1(uint8_t Value) override;
380  void emitBaseTypeRef(uint64_t Idx) override;
381
382  void enableTemporaryBuffer() override;
383  void disableTemporaryBuffer() override;
384  unsigned getTemporaryBufferSize() override;
385  void commitTemporaryBuffer() override;
386
387  bool isFrameRegister(const TargetRegisterInfo &TRI,
388                       unsigned MachineReg) override;
389
390public:
391  DebugLocDwarfExpression(unsigned DwarfVersion, BufferByteStreamer &BS,
392                          DwarfCompileUnit &CU)
393      : DwarfExpression(DwarfVersion, CU), OutBS(BS) {}
394};
395
396/// DwarfExpression implementation for singular DW_AT_location.
397class DIEDwarfExpression final : public DwarfExpression {
398  const AsmPrinter &AP;
399  DIELoc &OutDIE;
400  DIELoc TmpDIE;
401  bool IsBuffering = false;
402
403  /// Return the DIE that currently is being emitted to.
404  DIELoc &getActiveDIE() { return IsBuffering ? TmpDIE : OutDIE; }
405
406  void emitOp(uint8_t Op, const char *Comment = nullptr) override;
407  void emitSigned(int64_t Value) override;
408  void emitUnsigned(uint64_t Value) override;
409  void emitData1(uint8_t Value) override;
410  void emitBaseTypeRef(uint64_t Idx) override;
411
412  void enableTemporaryBuffer() override;
413  void disableTemporaryBuffer() override;
414  unsigned getTemporaryBufferSize() override;
415  void commitTemporaryBuffer() override;
416
417  bool isFrameRegister(const TargetRegisterInfo &TRI,
418                       unsigned MachineReg) override;
419
420public:
421  DIEDwarfExpression(const AsmPrinter &AP, DwarfCompileUnit &CU, DIELoc &DIE);
422
423  DIELoc *finalize() {
424    DwarfExpression::finalize();
425    return &OutDIE;
426  }
427};
428
429} // end namespace llvm
430
431#endif // LLVM_LIB_CODEGEN_ASMPRINTER_DWARFEXPRESSION_H
432