1/*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28#include <sys/cdefs.h> 29__FBSDID("$FreeBSD$"); 30 31#include <sys/param.h> 32#include <sys/ioctl.h> 33#include <sys/mman.h> 34#include <sys/socket.h> 35#include <sys/stat.h> 36 37#include <arpa/inet.h> 38#include <net/ethernet.h> 39#include <net/sff8472.h> 40#include <netinet/in.h> 41 42#include <ctype.h> 43#include <err.h> 44#include <errno.h> 45#include <fcntl.h> 46#include <limits.h> 47#include <stdint.h> 48#include <stdio.h> 49#include <stdlib.h> 50#include <string.h> 51#include <unistd.h> 52#include <pcap.h> 53 54#include "t4_ioctl.h" 55#include "tcb_common.h" 56 57#define in_range(val, lo, hi) ( val < 0 || (val <= hi && val >= lo)) 58#define max(x, y) ((x) > (y) ? (x) : (y)) 59 60static const char *progname, *nexus; 61static int chip_id; /* 4 for T4, 5 for T5 */ 62 63struct reg_info { 64 const char *name; 65 uint32_t addr; 66 uint32_t len; 67}; 68 69struct mod_regs { 70 const char *name; 71 const struct reg_info *ri; 72}; 73 74struct field_desc { 75 const char *name; /* Field name */ 76 unsigned short start; /* Start bit position */ 77 unsigned short end; /* End bit position */ 78 unsigned char shift; /* # of low order bits omitted and implicitly 0 */ 79 unsigned char hex; /* Print field in hex instead of decimal */ 80 unsigned char islog2; /* Field contains the base-2 log of the value */ 81}; 82 83#include "reg_defs_t4.c" 84#include "reg_defs_t5.c" 85#include "reg_defs_t6.c" 86#include "reg_defs_t4vf.c" 87 88static void 89usage(FILE *fp) 90{ 91 fprintf(fp, "Usage: %s <nexus> [operation]\n", progname); 92 fprintf(fp, 93 "\tclearstats <port> clear port statistics\n" 94 "\tcontext <type> <id> show an SGE context\n" 95 "\tdumpstate <dump.bin> dump chip state\n" 96 "\tfilter <idx> [<param> <val>] ... set a filter\n" 97 "\tfilter <idx> delete|clear [prio 1] delete a filter\n" 98 "\tfilter list list all filters\n" 99 "\tfilter mode [<match>] ... get/set global filter mode\n" 100 "\thashfilter [<param> <val>] ... set a hashfilter\n" 101 "\thashfilter <idx> delete|clear delete a hashfilter\n" 102 "\thashfilter list list all hashfilters\n" 103 "\thashfilter mode get global hashfilter mode\n" 104 "\ti2c <port> <devaddr> <addr> [<len>] read from i2c device\n" 105 "\tloadboot <bi.bin> [pf|offset <val>] install boot image\n" 106 "\tloadboot clear [pf|offset <val>] remove boot image\n" 107 "\tloadboot-cfg <bc.bin> install boot config\n" 108 "\tloadboot-cfg clear remove boot config\n" 109 "\tloadcfg <fw-config.txt> install configuration file\n" 110 "\tloadcfg clear remove configuration file\n" 111 "\tloadfw <fw-image.bin> install firmware\n" 112 "\tmemdump <addr> <len> dump a memory range\n" 113 "\tmodinfo <port> [raw] optics/cable information\n" 114 "\tpolicy <policy.txt> install offload policy\n" 115 "\tpolicy clear remove offload policy\n" 116 "\treg <address>[=<val>] read/write register\n" 117 "\treg64 <address>[=<val>] read/write 64 bit register\n" 118 "\tregdump [<module>] ... dump registers\n" 119 "\tsched-class params <param> <val> .. configure TX scheduler class\n" 120 "\tsched-queue <port> <queue> <class> bind NIC queues to TX Scheduling class\n" 121 "\tstdio interactive mode\n" 122 "\ttcb <tid> read TCB\n" 123 "\ttracer <idx> tx<n>|rx<n> set and enable a tracer\n" 124 "\ttracer <idx> disable|enable disable or enable a tracer\n" 125 "\ttracer list list all tracers\n" 126 ); 127} 128 129static inline unsigned int 130get_card_vers(unsigned int version) 131{ 132 return (version & 0x3ff); 133} 134 135static int 136real_doit(unsigned long cmd, void *data, const char *cmdstr) 137{ 138 static int fd = -1; 139 int rc = 0; 140 141 if (fd == -1) { 142 char buf[64]; 143 144 snprintf(buf, sizeof(buf), "/dev/%s", nexus); 145 if ((fd = open(buf, O_RDWR)) < 0) { 146 warn("open(%s)", nexus); 147 rc = errno; 148 return (rc); 149 } 150 } 151 152 rc = ioctl(fd, cmd, data); 153 if (rc < 0) { 154 warn("%s", cmdstr); 155 rc = errno; 156 } 157 158 return (rc); 159} 160#define doit(x, y) real_doit(x, y, #x) 161 162static char * 163str_to_number(const char *s, long *val, long long *vall) 164{ 165 char *p; 166 167 if (vall) 168 *vall = strtoll(s, &p, 0); 169 else if (val) 170 *val = strtol(s, &p, 0); 171 else 172 p = NULL; 173 174 return (p); 175} 176 177static int 178read_reg(long addr, int size, long long *val) 179{ 180 struct t4_reg reg; 181 int rc; 182 183 reg.addr = (uint32_t) addr; 184 reg.size = (uint32_t) size; 185 reg.val = 0; 186 187 rc = doit(CHELSIO_T4_GETREG, ®); 188 189 *val = reg.val; 190 191 return (rc); 192} 193 194static int 195write_reg(long addr, int size, long long val) 196{ 197 struct t4_reg reg; 198 199 reg.addr = (uint32_t) addr; 200 reg.size = (uint32_t) size; 201 reg.val = (uint64_t) val; 202 203 return doit(CHELSIO_T4_SETREG, ®); 204} 205 206static int 207register_io(int argc, const char *argv[], int size) 208{ 209 char *p, *v; 210 long addr; 211 long long val; 212 int w = 0, rc; 213 214 if (argc == 1) { 215 /* <reg> OR <reg>=<value> */ 216 217 p = str_to_number(argv[0], &addr, NULL); 218 if (*p) { 219 if (*p != '=') { 220 warnx("invalid register \"%s\"", argv[0]); 221 return (EINVAL); 222 } 223 224 w = 1; 225 v = p + 1; 226 p = str_to_number(v, NULL, &val); 227 228 if (*p) { 229 warnx("invalid value \"%s\"", v); 230 return (EINVAL); 231 } 232 } 233 234 } else if (argc == 2) { 235 /* <reg> <value> */ 236 237 w = 1; 238 239 p = str_to_number(argv[0], &addr, NULL); 240 if (*p) { 241 warnx("invalid register \"%s\"", argv[0]); 242 return (EINVAL); 243 } 244 245 p = str_to_number(argv[1], NULL, &val); 246 if (*p) { 247 warnx("invalid value \"%s\"", argv[1]); 248 return (EINVAL); 249 } 250 } else { 251 warnx("reg: invalid number of arguments (%d)", argc); 252 return (EINVAL); 253 } 254 255 if (w) 256 rc = write_reg(addr, size, val); 257 else { 258 rc = read_reg(addr, size, &val); 259 if (rc == 0) 260 printf("0x%llx [%llu]\n", val, val); 261 } 262 263 return (rc); 264} 265 266static inline uint32_t 267xtract(uint32_t val, int shift, int len) 268{ 269 return (val >> shift) & ((1 << len) - 1); 270} 271 272static int 273dump_block_regs(const struct reg_info *reg_array, const uint32_t *regs) 274{ 275 uint32_t reg_val = 0; 276 277 for ( ; reg_array->name; ++reg_array) 278 if (!reg_array->len) { 279 reg_val = regs[reg_array->addr / 4]; 280 printf("[%#7x] %-47s %#-10x %u\n", reg_array->addr, 281 reg_array->name, reg_val, reg_val); 282 } else { 283 uint32_t v = xtract(reg_val, reg_array->addr, 284 reg_array->len); 285 286 printf(" %*u:%u %-47s %#-10x %u\n", 287 reg_array->addr < 10 ? 3 : 2, 288 reg_array->addr + reg_array->len - 1, 289 reg_array->addr, reg_array->name, v, v); 290 } 291 292 return (1); 293} 294 295static int 296dump_regs_table(int argc, const char *argv[], const uint32_t *regs, 297 const struct mod_regs *modtab, int nmodules) 298{ 299 int i, j, match; 300 301 for (i = 0; i < argc; i++) { 302 for (j = 0; j < nmodules; j++) { 303 if (!strcmp(argv[i], modtab[j].name)) 304 break; 305 } 306 307 if (j == nmodules) { 308 warnx("invalid register block \"%s\"", argv[i]); 309 fprintf(stderr, "\nAvailable blocks:"); 310 for ( ; nmodules; nmodules--, modtab++) 311 fprintf(stderr, " %s", modtab->name); 312 fprintf(stderr, "\n"); 313 return (EINVAL); 314 } 315 } 316 317 for ( ; nmodules; nmodules--, modtab++) { 318 319 match = argc == 0 ? 1 : 0; 320 for (i = 0; !match && i < argc; i++) { 321 if (!strcmp(argv[i], modtab->name)) 322 match = 1; 323 } 324 325 if (match) 326 dump_block_regs(modtab->ri, regs); 327 } 328 329 return (0); 330} 331 332#define T4_MODREGS(name) { #name, t4_##name##_regs } 333static int 334dump_regs_t4(int argc, const char *argv[], const uint32_t *regs) 335{ 336 static struct mod_regs t4_mod[] = { 337 T4_MODREGS(sge), 338 { "pci", t4_pcie_regs }, 339 T4_MODREGS(dbg), 340 T4_MODREGS(mc), 341 T4_MODREGS(ma), 342 { "edc0", t4_edc_0_regs }, 343 { "edc1", t4_edc_1_regs }, 344 T4_MODREGS(cim), 345 T4_MODREGS(tp), 346 T4_MODREGS(ulp_rx), 347 T4_MODREGS(ulp_tx), 348 { "pmrx", t4_pm_rx_regs }, 349 { "pmtx", t4_pm_tx_regs }, 350 T4_MODREGS(mps), 351 { "cplsw", t4_cpl_switch_regs }, 352 T4_MODREGS(smb), 353 { "i2c", t4_i2cm_regs }, 354 T4_MODREGS(mi), 355 T4_MODREGS(uart), 356 T4_MODREGS(pmu), 357 T4_MODREGS(sf), 358 T4_MODREGS(pl), 359 T4_MODREGS(le), 360 T4_MODREGS(ncsi), 361 T4_MODREGS(xgmac) 362 }; 363 364 return dump_regs_table(argc, argv, regs, t4_mod, nitems(t4_mod)); 365} 366#undef T4_MODREGS 367 368#define T5_MODREGS(name) { #name, t5_##name##_regs } 369static int 370dump_regs_t5(int argc, const char *argv[], const uint32_t *regs) 371{ 372 static struct mod_regs t5_mod[] = { 373 T5_MODREGS(sge), 374 { "pci", t5_pcie_regs }, 375 T5_MODREGS(dbg), 376 { "mc0", t5_mc_0_regs }, 377 { "mc1", t5_mc_1_regs }, 378 T5_MODREGS(ma), 379 { "edc0", t5_edc_t50_regs }, 380 { "edc1", t5_edc_t51_regs }, 381 T5_MODREGS(cim), 382 T5_MODREGS(tp), 383 { "ulprx", t5_ulp_rx_regs }, 384 { "ulptx", t5_ulp_tx_regs }, 385 { "pmrx", t5_pm_rx_regs }, 386 { "pmtx", t5_pm_tx_regs }, 387 T5_MODREGS(mps), 388 { "cplsw", t5_cpl_switch_regs }, 389 T5_MODREGS(smb), 390 { "i2c", t5_i2cm_regs }, 391 T5_MODREGS(mi), 392 T5_MODREGS(uart), 393 T5_MODREGS(pmu), 394 T5_MODREGS(sf), 395 T5_MODREGS(pl), 396 T5_MODREGS(le), 397 T5_MODREGS(ncsi), 398 T5_MODREGS(mac), 399 { "hma", t5_hma_t5_regs } 400 }; 401 402 return dump_regs_table(argc, argv, regs, t5_mod, nitems(t5_mod)); 403} 404#undef T5_MODREGS 405 406#define T6_MODREGS(name) { #name, t6_##name##_regs } 407static int 408dump_regs_t6(int argc, const char *argv[], const uint32_t *regs) 409{ 410 static struct mod_regs t6_mod[] = { 411 T6_MODREGS(sge), 412 { "pci", t6_pcie_regs }, 413 T6_MODREGS(dbg), 414 { "mc0", t6_mc_0_regs }, 415 T6_MODREGS(ma), 416 { "edc0", t6_edc_t60_regs }, 417 { "edc1", t6_edc_t61_regs }, 418 T6_MODREGS(cim), 419 T6_MODREGS(tp), 420 { "ulprx", t6_ulp_rx_regs }, 421 { "ulptx", t6_ulp_tx_regs }, 422 { "pmrx", t6_pm_rx_regs }, 423 { "pmtx", t6_pm_tx_regs }, 424 T6_MODREGS(mps), 425 { "cplsw", t6_cpl_switch_regs }, 426 T6_MODREGS(smb), 427 { "i2c", t6_i2cm_regs }, 428 T6_MODREGS(mi), 429 T6_MODREGS(uart), 430 T6_MODREGS(pmu), 431 T6_MODREGS(sf), 432 T6_MODREGS(pl), 433 T6_MODREGS(le), 434 T6_MODREGS(ncsi), 435 T6_MODREGS(mac), 436 { "hma", t6_hma_t6_regs } 437 }; 438 439 return dump_regs_table(argc, argv, regs, t6_mod, nitems(t6_mod)); 440} 441#undef T6_MODREGS 442 443static int 444dump_regs_t4vf(int argc, const char *argv[], const uint32_t *regs) 445{ 446 static struct mod_regs t4vf_mod[] = { 447 { "sge", t4vf_sge_regs }, 448 { "mps", t4vf_mps_regs }, 449 { "pl", t4vf_pl_regs }, 450 { "mbdata", t4vf_mbdata_regs }, 451 { "cim", t4vf_cim_regs }, 452 }; 453 454 return dump_regs_table(argc, argv, regs, t4vf_mod, nitems(t4vf_mod)); 455} 456 457static int 458dump_regs_t5vf(int argc, const char *argv[], const uint32_t *regs) 459{ 460 static struct mod_regs t5vf_mod[] = { 461 { "sge", t5vf_sge_regs }, 462 { "mps", t4vf_mps_regs }, 463 { "pl", t5vf_pl_regs }, 464 { "mbdata", t4vf_mbdata_regs }, 465 { "cim", t4vf_cim_regs }, 466 }; 467 468 return dump_regs_table(argc, argv, regs, t5vf_mod, nitems(t5vf_mod)); 469} 470 471static int 472dump_regs_t6vf(int argc, const char *argv[], const uint32_t *regs) 473{ 474 static struct mod_regs t6vf_mod[] = { 475 { "sge", t5vf_sge_regs }, 476 { "mps", t4vf_mps_regs }, 477 { "pl", t6vf_pl_regs }, 478 { "mbdata", t4vf_mbdata_regs }, 479 { "cim", t4vf_cim_regs }, 480 }; 481 482 return dump_regs_table(argc, argv, regs, t6vf_mod, nitems(t6vf_mod)); 483} 484 485static int 486dump_regs(int argc, const char *argv[]) 487{ 488 int vers, revision, rc; 489 struct t4_regdump regs; 490 uint32_t len; 491 492 len = max(T4_REGDUMP_SIZE, T5_REGDUMP_SIZE); 493 regs.data = calloc(1, len); 494 if (regs.data == NULL) { 495 warnc(ENOMEM, "regdump"); 496 return (ENOMEM); 497 } 498 499 regs.len = len; 500 rc = doit(CHELSIO_T4_REGDUMP, ®s); 501 if (rc != 0) 502 return (rc); 503 504 vers = get_card_vers(regs.version); 505 revision = (regs.version >> 10) & 0x3f; 506 507 if (vers == 4) { 508 if (revision == 0x3f) 509 rc = dump_regs_t4vf(argc, argv, regs.data); 510 else 511 rc = dump_regs_t4(argc, argv, regs.data); 512 } else if (vers == 5) { 513 if (revision == 0x3f) 514 rc = dump_regs_t5vf(argc, argv, regs.data); 515 else 516 rc = dump_regs_t5(argc, argv, regs.data); 517 } else if (vers == 6) { 518 if (revision == 0x3f) 519 rc = dump_regs_t6vf(argc, argv, regs.data); 520 else 521 rc = dump_regs_t6(argc, argv, regs.data); 522 } else { 523 warnx("%s (type %d, rev %d) is not a known card.", 524 nexus, vers, revision); 525 return (ENOTSUP); 526 } 527 528 free(regs.data); 529 return (rc); 530} 531 532static void 533do_show_info_header(uint32_t mode) 534{ 535 uint32_t i; 536 537 printf("%4s %8s", "Idx", "Hits"); 538 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 539 switch (mode & i) { 540 case T4_FILTER_FCoE: 541 printf(" FCoE"); 542 break; 543 544 case T4_FILTER_PORT: 545 printf(" Port"); 546 break; 547 548 case T4_FILTER_VNIC: 549 if (mode & T4_FILTER_IC_VNIC) 550 printf(" VFvld:PF:VF"); 551 else 552 printf(" vld:oVLAN"); 553 break; 554 555 case T4_FILTER_VLAN: 556 printf(" vld:VLAN"); 557 break; 558 559 case T4_FILTER_IP_TOS: 560 printf(" TOS"); 561 break; 562 563 case T4_FILTER_IP_PROTO: 564 printf(" Prot"); 565 break; 566 567 case T4_FILTER_ETH_TYPE: 568 printf(" EthType"); 569 break; 570 571 case T4_FILTER_MAC_IDX: 572 printf(" MACIdx"); 573 break; 574 575 case T4_FILTER_MPS_HIT_TYPE: 576 printf(" MPS"); 577 break; 578 579 case T4_FILTER_IP_FRAGMENT: 580 printf(" Frag"); 581 break; 582 583 default: 584 /* compressed filter field not enabled */ 585 break; 586 } 587 } 588 printf(" %20s %20s %9s %9s %s\n", 589 "DIP", "SIP", "DPORT", "SPORT", "Action"); 590} 591 592/* 593 * Parse an argument sub-vector as a { <parameter name> <value>[:<mask>] } 594 * ordered tuple. If the parameter name in the argument sub-vector does not 595 * match the passed in parameter name, then a zero is returned for the 596 * function and no parsing is performed. If there is a match, then the value 597 * and optional mask are parsed and returned in the provided return value 598 * pointers. If no optional mask is specified, then a default mask of all 1s 599 * will be returned. 600 * 601 * An error in parsing the value[:mask] will result in an error message and 602 * program termination. 603 */ 604static int 605parse_val_mask(const char *param, const char *args[], uint32_t *val, 606 uint32_t *mask, int hashfilter) 607{ 608 long l; 609 char *p; 610 611 if (strcmp(param, args[0]) != 0) 612 return (EINVAL); 613 614 p = str_to_number(args[1], &l, NULL); 615 if (l >= 0 && l <= UINT32_MAX) { 616 *val = (uint32_t)l; 617 if (p > args[1]) { 618 if (p[0] == 0) { 619 *mask = ~0; 620 return (0); 621 } 622 623 if (p[0] == ':' && p[1] != 0) { 624 if (hashfilter) { 625 warnx("param %s: mask not allowed for " 626 "hashfilter or nat params", param); 627 return (EINVAL); 628 } 629 p = str_to_number(p + 1, &l, NULL); 630 if (l >= 0 && l <= UINT32_MAX && p[0] == 0) { 631 *mask = (uint32_t)l; 632 return (0); 633 } 634 } 635 } 636 } 637 638 warnx("parameter \"%s\" has bad \"value[:mask]\" %s", 639 args[0], args[1]); 640 641 return (EINVAL); 642} 643 644/* 645 * Parse an argument sub-vector as a { <parameter name> <addr>[/<mask>] } 646 * ordered tuple. If the parameter name in the argument sub-vector does not 647 * match the passed in parameter name, then a zero is returned for the 648 * function and no parsing is performed. If there is a match, then the value 649 * and optional mask are parsed and returned in the provided return value 650 * pointers. If no optional mask is specified, then a default mask of all 1s 651 * will be returned. 652 * 653 * The value return parameter "afp" is used to specify the expected address 654 * family -- IPv4 or IPv6 -- of the address[/mask] and return its actual 655 * format. A passed in value of AF_UNSPEC indicates that either IPv4 or IPv6 656 * is acceptable; AF_INET means that only IPv4 addresses are acceptable; and 657 * AF_INET6 means that only IPv6 are acceptable. AF_INET is returned for IPv4 658 * and AF_INET6 for IPv6 addresses, respectively. IPv4 address/mask pairs are 659 * returned in the first four bytes of the address and mask return values with 660 * the address A.B.C.D returned with { A, B, C, D } returned in addresses { 0, 661 * 1, 2, 3}, respectively. 662 * 663 * An error in parsing the value[:mask] will result in an error message and 664 * program termination. 665 */ 666static int 667parse_ipaddr(const char *param, const char *args[], int *afp, uint8_t addr[], 668 uint8_t mask[], int maskless) 669{ 670 const char *colon, *afn; 671 char *slash; 672 uint8_t *m; 673 int af, ret; 674 unsigned int masksize; 675 676 /* 677 * Is this our parameter? 678 */ 679 if (strcmp(param, args[0]) != 0) 680 return (EINVAL); 681 682 /* 683 * Fundamental IPv4 versus IPv6 selection. 684 */ 685 colon = strchr(args[1], ':'); 686 if (!colon) { 687 afn = "IPv4"; 688 af = AF_INET; 689 masksize = 32; 690 } else { 691 afn = "IPv6"; 692 af = AF_INET6; 693 masksize = 128; 694 } 695 if (*afp == AF_UNSPEC) 696 *afp = af; 697 else if (*afp != af) { 698 warnx("address %s is not of expected family %s", 699 args[1], *afp == AF_INET ? "IP" : "IPv6"); 700 return (EINVAL); 701 } 702 703 /* 704 * Parse address (temporarily stripping off any "/mask" 705 * specification). 706 */ 707 slash = strchr(args[1], '/'); 708 if (slash) 709 *slash = 0; 710 ret = inet_pton(af, args[1], addr); 711 if (slash) 712 *slash = '/'; 713 if (ret <= 0) { 714 warnx("Cannot parse %s %s address %s", param, afn, args[1]); 715 return (EINVAL); 716 } 717 718 /* 719 * Parse optional mask specification. 720 */ 721 if (slash) { 722 char *p; 723 unsigned int prefix = strtoul(slash + 1, &p, 10); 724 725 if (maskless) { 726 warnx("mask cannot be provided for maskless specification"); 727 return (EINVAL); 728 } 729 730 if (p == slash + 1) { 731 warnx("missing address prefix for %s", param); 732 return (EINVAL); 733 } 734 if (*p) { 735 warnx("%s is not a valid address prefix", slash + 1); 736 return (EINVAL); 737 } 738 if (prefix > masksize) { 739 warnx("prefix %u is too long for an %s address", 740 prefix, afn); 741 return (EINVAL); 742 } 743 memset(mask, 0, masksize / 8); 744 masksize = prefix; 745 } 746 747 if (mask != NULL) { 748 /* 749 * Fill in mask. 750 */ 751 for (m = mask; masksize >= 8; m++, masksize -= 8) 752 *m = ~0; 753 if (masksize) 754 *m = ~0 << (8 - masksize); 755 } 756 757 return (0); 758} 759 760/* 761 * Parse an argument sub-vector as a { <parameter name> <value> } ordered 762 * tuple. If the parameter name in the argument sub-vector does not match the 763 * passed in parameter name, then a zero is returned for the function and no 764 * parsing is performed. If there is a match, then the value is parsed and 765 * returned in the provided return value pointer. 766 */ 767static int 768parse_val(const char *param, const char *args[], uint32_t *val) 769{ 770 char *p; 771 long l; 772 773 if (strcmp(param, args[0]) != 0) 774 return (EINVAL); 775 776 p = str_to_number(args[1], &l, NULL); 777 if (*p || l < 0 || l > UINT32_MAX) { 778 warnx("parameter \"%s\" has bad \"value\" %s", args[0], args[1]); 779 return (EINVAL); 780 } 781 782 *val = (uint32_t)l; 783 return (0); 784} 785 786static void 787filters_show_ipaddr(int type, uint8_t *addr, uint8_t *addrm) 788{ 789 int noctets, octet; 790 791 printf(" "); 792 if (type == 0) { 793 noctets = 4; 794 printf("%3s", " "); 795 } else 796 noctets = 16; 797 798 for (octet = 0; octet < noctets; octet++) 799 printf("%02x", addr[octet]); 800 printf("/"); 801 for (octet = 0; octet < noctets; octet++) 802 printf("%02x", addrm[octet]); 803} 804 805static void 806do_show_one_filter_info(struct t4_filter *t, uint32_t mode) 807{ 808 uint32_t i; 809 810 printf("%4d", t->idx); 811 if (t->hits == UINT64_MAX) 812 printf(" %8s", "-"); 813 else 814 printf(" %8ju", t->hits); 815 816 /* 817 * Compressed header portion of filter. 818 */ 819 for (i = T4_FILTER_FCoE; i <= T4_FILTER_IP_FRAGMENT; i <<= 1) { 820 switch (mode & i) { 821 case T4_FILTER_FCoE: 822 printf(" %1d/%1d", t->fs.val.fcoe, t->fs.mask.fcoe); 823 break; 824 825 case T4_FILTER_PORT: 826 printf(" %1d/%1d", t->fs.val.iport, t->fs.mask.iport); 827 break; 828 829 case T4_FILTER_VNIC: 830 if (mode & T4_FILTER_IC_VNIC) { 831 printf(" %1d:%1x:%02x/%1d:%1x:%02x", 832 t->fs.val.pfvf_vld, 833 (t->fs.val.vnic >> 13) & 0x7, 834 t->fs.val.vnic & 0x1fff, 835 t->fs.mask.pfvf_vld, 836 (t->fs.mask.vnic >> 13) & 0x7, 837 t->fs.mask.vnic & 0x1fff); 838 } else { 839 printf(" %1d:%04x/%1d:%04x", 840 t->fs.val.ovlan_vld, t->fs.val.vnic, 841 t->fs.mask.ovlan_vld, t->fs.mask.vnic); 842 } 843 break; 844 845 case T4_FILTER_VLAN: 846 printf(" %1d:%04x/%1d:%04x", 847 t->fs.val.vlan_vld, t->fs.val.vlan, 848 t->fs.mask.vlan_vld, t->fs.mask.vlan); 849 break; 850 851 case T4_FILTER_IP_TOS: 852 printf(" %02x/%02x", t->fs.val.tos, t->fs.mask.tos); 853 break; 854 855 case T4_FILTER_IP_PROTO: 856 printf(" %02x/%02x", t->fs.val.proto, t->fs.mask.proto); 857 break; 858 859 case T4_FILTER_ETH_TYPE: 860 printf(" %04x/%04x", t->fs.val.ethtype, 861 t->fs.mask.ethtype); 862 break; 863 864 case T4_FILTER_MAC_IDX: 865 printf(" %03x/%03x", t->fs.val.macidx, 866 t->fs.mask.macidx); 867 break; 868 869 case T4_FILTER_MPS_HIT_TYPE: 870 printf(" %1x/%1x", t->fs.val.matchtype, 871 t->fs.mask.matchtype); 872 break; 873 874 case T4_FILTER_IP_FRAGMENT: 875 printf(" %1d/%1d", t->fs.val.frag, t->fs.mask.frag); 876 break; 877 878 default: 879 /* compressed filter field not enabled */ 880 break; 881 } 882 } 883 884 /* 885 * Fixed portion of filter. 886 */ 887 filters_show_ipaddr(t->fs.type, t->fs.val.dip, t->fs.mask.dip); 888 filters_show_ipaddr(t->fs.type, t->fs.val.sip, t->fs.mask.sip); 889 printf(" %04x/%04x %04x/%04x", 890 t->fs.val.dport, t->fs.mask.dport, 891 t->fs.val.sport, t->fs.mask.sport); 892 893 /* 894 * Variable length filter action. 895 */ 896 if (t->fs.action == FILTER_DROP) 897 printf(" Drop"); 898 else if (t->fs.action == FILTER_SWITCH) { 899 printf(" Switch: port=%d", t->fs.eport); 900 if (t->fs.newdmac) 901 printf( 902 ", dmac=%02x:%02x:%02x:%02x:%02x:%02x " 903 ", l2tidx=%d", 904 t->fs.dmac[0], t->fs.dmac[1], 905 t->fs.dmac[2], t->fs.dmac[3], 906 t->fs.dmac[4], t->fs.dmac[5], 907 t->l2tidx); 908 if (t->fs.newsmac) 909 printf( 910 ", smac=%02x:%02x:%02x:%02x:%02x:%02x " 911 ", smtidx=%d", 912 t->fs.smac[0], t->fs.smac[1], 913 t->fs.smac[2], t->fs.smac[3], 914 t->fs.smac[4], t->fs.smac[5], 915 t->smtidx); 916 if (t->fs.newvlan == VLAN_REMOVE) 917 printf(", vlan=none"); 918 else if (t->fs.newvlan == VLAN_INSERT) 919 printf(", vlan=insert(%x)", t->fs.vlan); 920 else if (t->fs.newvlan == VLAN_REWRITE) 921 printf(", vlan=rewrite(%x)", t->fs.vlan); 922 } else { 923 printf(" Pass: Q="); 924 if (t->fs.dirsteer == 0) { 925 printf("RSS"); 926 if (t->fs.maskhash) 927 printf("(region %d)", t->fs.iq << 1); 928 } else { 929 printf("%d", t->fs.iq); 930 if (t->fs.dirsteerhash == 0) 931 printf("(QID)"); 932 else 933 printf("(hash)"); 934 } 935 } 936 if (chip_id <= 5 && t->fs.prio) 937 printf(" Prio"); 938 if (t->fs.rpttid) 939 printf(" RptTID"); 940 printf("\n"); 941} 942 943static int 944show_filters(int hash) 945{ 946 uint32_t mode = 0, header, hpfilter = 0; 947 struct t4_filter t; 948 int rc; 949 950 /* Get the global filter mode first */ 951 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 952 if (rc != 0) 953 return (rc); 954 955 if (!hash && chip_id >= 6) { 956 header = 0; 957 bzero(&t, sizeof (t)); 958 t.idx = 0; 959 t.fs.hash = 0; 960 t.fs.prio = 1; 961 for (t.idx = 0; ; t.idx++) { 962 rc = doit(CHELSIO_T4_GET_FILTER, &t); 963 if (rc != 0 || t.idx == 0xffffffff) 964 break; 965 966 if (!header) { 967 printf("High Priority TCAM Region:\n"); 968 do_show_info_header(mode); 969 header = 1; 970 hpfilter = 1; 971 } 972 do_show_one_filter_info(&t, mode); 973 } 974 } 975 976 header = 0; 977 bzero(&t, sizeof (t)); 978 t.idx = 0; 979 t.fs.hash = hash; 980 for (t.idx = 0; ; t.idx++) { 981 rc = doit(CHELSIO_T4_GET_FILTER, &t); 982 if (rc != 0 || t.idx == 0xffffffff) 983 break; 984 985 if (!header) { 986 if (hpfilter) 987 printf("\nNormal Priority TCAM Region:\n"); 988 do_show_info_header(mode); 989 header = 1; 990 } 991 do_show_one_filter_info(&t, mode); 992 } 993 994 return (rc); 995} 996 997static int 998get_filter_mode(int hashfilter) 999{ 1000 uint32_t mode = hashfilter; 1001 int rc; 1002 1003 rc = doit(CHELSIO_T4_GET_FILTER_MODE, &mode); 1004 if (rc != 0) 1005 return (rc); 1006 1007 if (mode & T4_FILTER_IPv4) 1008 printf("ipv4 "); 1009 1010 if (mode & T4_FILTER_IPv6) 1011 printf("ipv6 "); 1012 1013 if (mode & T4_FILTER_IP_SADDR) 1014 printf("sip "); 1015 1016 if (mode & T4_FILTER_IP_DADDR) 1017 printf("dip "); 1018 1019 if (mode & T4_FILTER_IP_SPORT) 1020 printf("sport "); 1021 1022 if (mode & T4_FILTER_IP_DPORT) 1023 printf("dport "); 1024 1025 if (mode & T4_FILTER_IP_FRAGMENT) 1026 printf("frag "); 1027 1028 if (mode & T4_FILTER_MPS_HIT_TYPE) 1029 printf("matchtype "); 1030 1031 if (mode & T4_FILTER_MAC_IDX) 1032 printf("macidx "); 1033 1034 if (mode & T4_FILTER_ETH_TYPE) 1035 printf("ethtype "); 1036 1037 if (mode & T4_FILTER_IP_PROTO) 1038 printf("proto "); 1039 1040 if (mode & T4_FILTER_IP_TOS) 1041 printf("tos "); 1042 1043 if (mode & T4_FILTER_VLAN) 1044 printf("vlan "); 1045 1046 if (mode & T4_FILTER_VNIC) { 1047 if (mode & T4_FILTER_IC_VNIC) 1048 printf("vnic_id "); 1049 else 1050 printf("ovlan "); 1051 } 1052 1053 if (mode & T4_FILTER_PORT) 1054 printf("iport "); 1055 1056 if (mode & T4_FILTER_FCoE) 1057 printf("fcoe "); 1058 1059 printf("\n"); 1060 1061 return (0); 1062} 1063 1064static int 1065set_filter_mode(int argc, const char *argv[]) 1066{ 1067 uint32_t mode = 0; 1068 int vnic = 0, ovlan = 0; 1069 1070 for (; argc; argc--, argv++) { 1071 if (!strcmp(argv[0], "frag")) 1072 mode |= T4_FILTER_IP_FRAGMENT; 1073 1074 if (!strcmp(argv[0], "matchtype")) 1075 mode |= T4_FILTER_MPS_HIT_TYPE; 1076 1077 if (!strcmp(argv[0], "macidx")) 1078 mode |= T4_FILTER_MAC_IDX; 1079 1080 if (!strcmp(argv[0], "ethtype")) 1081 mode |= T4_FILTER_ETH_TYPE; 1082 1083 if (!strcmp(argv[0], "proto")) 1084 mode |= T4_FILTER_IP_PROTO; 1085 1086 if (!strcmp(argv[0], "tos")) 1087 mode |= T4_FILTER_IP_TOS; 1088 1089 if (!strcmp(argv[0], "vlan")) 1090 mode |= T4_FILTER_VLAN; 1091 1092 if (!strcmp(argv[0], "ovlan")) { 1093 mode |= T4_FILTER_VNIC; 1094 ovlan++; 1095 } 1096 1097 if (!strcmp(argv[0], "vnic_id")) { 1098 mode |= T4_FILTER_VNIC; 1099 mode |= T4_FILTER_IC_VNIC; 1100 vnic++; 1101 } 1102 1103 if (!strcmp(argv[0], "iport")) 1104 mode |= T4_FILTER_PORT; 1105 1106 if (!strcmp(argv[0], "fcoe")) 1107 mode |= T4_FILTER_FCoE; 1108 } 1109 1110 if (vnic > 0 && ovlan > 0) { 1111 warnx("\"vnic_id\" and \"ovlan\" are mutually exclusive."); 1112 return (EINVAL); 1113 } 1114 1115 return doit(CHELSIO_T4_SET_FILTER_MODE, &mode); 1116} 1117 1118static int 1119del_filter(uint32_t idx, int prio, int hashfilter) 1120{ 1121 struct t4_filter t; 1122 1123 t.fs.prio = prio; 1124 t.fs.hash = hashfilter; 1125 t.idx = idx; 1126 1127 return doit(CHELSIO_T4_DEL_FILTER, &t); 1128} 1129 1130#define MAX_VLANID (4095) 1131 1132static int 1133set_filter(uint32_t idx, int argc, const char *argv[], int hash) 1134{ 1135 int rc, af = AF_UNSPEC, start_arg = 0; 1136 struct t4_filter t; 1137 1138 if (argc < 2) { 1139 warnc(EINVAL, "%s", __func__); 1140 return (EINVAL); 1141 }; 1142 bzero(&t, sizeof (t)); 1143 t.idx = idx; 1144 t.fs.hitcnts = 1; 1145 t.fs.hash = hash; 1146 1147 for (start_arg = 0; start_arg + 2 <= argc; start_arg += 2) { 1148 const char **args = &argv[start_arg]; 1149 uint32_t val, mask; 1150 1151 if (!strcmp(argv[start_arg], "type")) { 1152 int newaf; 1153 if (!strcasecmp(argv[start_arg + 1], "ipv4")) 1154 newaf = AF_INET; 1155 else if (!strcasecmp(argv[start_arg + 1], "ipv6")) 1156 newaf = AF_INET6; 1157 else { 1158 warnx("invalid type \"%s\"; " 1159 "must be one of \"ipv4\" or \"ipv6\"", 1160 argv[start_arg + 1]); 1161 return (EINVAL); 1162 } 1163 1164 if (af != AF_UNSPEC && af != newaf) { 1165 warnx("conflicting IPv4/IPv6 specifications."); 1166 return (EINVAL); 1167 } 1168 af = newaf; 1169 } else if (!parse_val_mask("fcoe", args, &val, &mask, hash)) { 1170 t.fs.val.fcoe = val; 1171 t.fs.mask.fcoe = mask; 1172 } else if (!parse_val_mask("iport", args, &val, &mask, hash)) { 1173 t.fs.val.iport = val; 1174 t.fs.mask.iport = mask; 1175 } else if (!parse_val_mask("ovlan", args, &val, &mask, hash)) { 1176 t.fs.val.vnic = val; 1177 t.fs.mask.vnic = mask; 1178 t.fs.val.ovlan_vld = 1; 1179 t.fs.mask.ovlan_vld = 1; 1180 } else if (!parse_val_mask("ivlan", args, &val, &mask, hash)) { 1181 t.fs.val.vlan = val; 1182 t.fs.mask.vlan = mask; 1183 t.fs.val.vlan_vld = 1; 1184 t.fs.mask.vlan_vld = 1; 1185 } else if (!parse_val_mask("pf", args, &val, &mask, hash)) { 1186 t.fs.val.vnic &= 0x1fff; 1187 t.fs.val.vnic |= (val & 0x7) << 13; 1188 t.fs.mask.vnic &= 0x1fff; 1189 t.fs.mask.vnic |= (mask & 0x7) << 13; 1190 t.fs.val.pfvf_vld = 1; 1191 t.fs.mask.pfvf_vld = 1; 1192 } else if (!parse_val_mask("vf", args, &val, &mask, hash)) { 1193 t.fs.val.vnic &= 0xe000; 1194 t.fs.val.vnic |= val & 0x1fff; 1195 t.fs.mask.vnic &= 0xe000; 1196 t.fs.mask.vnic |= mask & 0x1fff; 1197 t.fs.val.pfvf_vld = 1; 1198 t.fs.mask.pfvf_vld = 1; 1199 } else if (!parse_val_mask("tos", args, &val, &mask, hash)) { 1200 t.fs.val.tos = val; 1201 t.fs.mask.tos = mask; 1202 } else if (!parse_val_mask("proto", args, &val, &mask, hash)) { 1203 t.fs.val.proto = val; 1204 t.fs.mask.proto = mask; 1205 } else if (!parse_val_mask("ethtype", args, &val, &mask, hash)) { 1206 t.fs.val.ethtype = val; 1207 t.fs.mask.ethtype = mask; 1208 } else if (!parse_val_mask("macidx", args, &val, &mask, hash)) { 1209 t.fs.val.macidx = val; 1210 t.fs.mask.macidx = mask; 1211 } else if (!parse_val_mask("matchtype", args, &val, &mask, hash)) { 1212 t.fs.val.matchtype = val; 1213 t.fs.mask.matchtype = mask; 1214 } else if (!parse_val_mask("frag", args, &val, &mask, hash)) { 1215 t.fs.val.frag = val; 1216 t.fs.mask.frag = mask; 1217 } else if (!parse_val_mask("dport", args, &val, &mask, hash)) { 1218 t.fs.val.dport = val; 1219 t.fs.mask.dport = mask; 1220 } else if (!parse_val_mask("sport", args, &val, &mask, hash)) { 1221 t.fs.val.sport = val; 1222 t.fs.mask.sport = mask; 1223 } else if (!parse_ipaddr("dip", args, &af, t.fs.val.dip, 1224 t.fs.mask.dip, hash)) { 1225 /* nada */; 1226 } else if (!parse_ipaddr("sip", args, &af, t.fs.val.sip, 1227 t.fs.mask.sip, hash)) { 1228 /* nada */; 1229 } else if (!parse_ipaddr("nat_dip", args, &af, t.fs.nat_dip, NULL, 1)) { 1230 /*nada*/; 1231 } else if (!parse_ipaddr("nat_sip", args, &af, t.fs.nat_sip, NULL, 1)) { 1232 /*nada*/ 1233 } else if (!parse_val_mask("nat_dport", args, &val, &mask, 1)) { 1234 t.fs.nat_dport = val; 1235 } else if (!parse_val_mask("nat_sport", args, &val, &mask, 1)) { 1236 t.fs.nat_sport = val; 1237 } else if (!strcmp(argv[start_arg], "action")) { 1238 if (!strcmp(argv[start_arg + 1], "pass")) 1239 t.fs.action = FILTER_PASS; 1240 else if (!strcmp(argv[start_arg + 1], "drop")) 1241 t.fs.action = FILTER_DROP; 1242 else if (!strcmp(argv[start_arg + 1], "switch")) 1243 t.fs.action = FILTER_SWITCH; 1244 else { 1245 warnx("invalid action \"%s\"; must be one of" 1246 " \"pass\", \"drop\" or \"switch\"", 1247 argv[start_arg + 1]); 1248 return (EINVAL); 1249 } 1250 } else if (!parse_val("hitcnts", args, &val)) { 1251 t.fs.hitcnts = val; 1252 } else if (!parse_val("prio", args, &val)) { 1253 if (hash) { 1254 warnx("Hashfilters doesn't support \"prio\"\n"); 1255 return (EINVAL); 1256 } 1257 if (val != 0 && val != 1) { 1258 warnx("invalid priority \"%s\"; must be" 1259 " \"0\" or \"1\"", argv[start_arg + 1]); 1260 return (EINVAL); 1261 } 1262 t.fs.prio = val; 1263 } else if (!parse_val("rpttid", args, &val)) { 1264 t.fs.rpttid = 1; 1265 } else if (!parse_val("queue", args, &val)) { 1266 t.fs.dirsteer = 1; /* direct steer */ 1267 t.fs.iq = val; /* to the iq with this cntxt_id */ 1268 } else if (!parse_val("tcbhash", args, &val)) { 1269 t.fs.dirsteerhash = 1; /* direct steer */ 1270 /* XXX: use (val << 1) as the rss_hash? */ 1271 t.fs.iq = val; 1272 } else if (!parse_val("tcbrss", args, &val)) { 1273 t.fs.maskhash = 1; /* steer to RSS region */ 1274 /* 1275 * val = start idx of the region but the internal TCB 1276 * field is 10b only and is left shifted by 1 before use. 1277 */ 1278 t.fs.iq = val >> 1; 1279 } else if (!parse_val("eport", args, &val)) { 1280 t.fs.eport = val; 1281 } else if (!parse_val("swapmac", args, &val)) { 1282 t.fs.swapmac = 1; 1283 } else if (!strcmp(argv[start_arg], "nat")) { 1284 if (!strcmp(argv[start_arg + 1], "dip")) 1285 t.fs.nat_mode = NAT_MODE_DIP; 1286 else if (!strcmp(argv[start_arg + 1], "dip-dp")) 1287 t.fs.nat_mode = NAT_MODE_DIP_DP; 1288 else if (!strcmp(argv[start_arg + 1], "dip-dp-sip")) 1289 t.fs.nat_mode = NAT_MODE_DIP_DP_SIP; 1290 else if (!strcmp(argv[start_arg + 1], "dip-dp-sp")) 1291 t.fs.nat_mode = NAT_MODE_DIP_DP_SP; 1292 else if (!strcmp(argv[start_arg + 1], "sip-sp")) 1293 t.fs.nat_mode = NAT_MODE_SIP_SP; 1294 else if (!strcmp(argv[start_arg + 1], "dip-sip-sp")) 1295 t.fs.nat_mode = NAT_MODE_DIP_SIP_SP; 1296 else if (!strcmp(argv[start_arg + 1], "all")) 1297 t.fs.nat_mode = NAT_MODE_ALL; 1298 else { 1299 warnx("unknown nat type \"%s\"; known types are dip, " 1300 "dip-dp, dip-dp-sip, dip-dp-sp, sip-sp, " 1301 "dip-sip-sp, and all", argv[start_arg + 1]); 1302 return (EINVAL); 1303 } 1304 } else if (!parse_val("natseq", args, &val)) { 1305 t.fs.nat_seq_chk = val; 1306 } else if (!parse_val("natflag", args, &val)) { 1307 t.fs.nat_flag_chk = 1; 1308 } else if (!strcmp(argv[start_arg], "dmac")) { 1309 struct ether_addr *daddr; 1310 1311 daddr = ether_aton(argv[start_arg + 1]); 1312 if (daddr == NULL) { 1313 warnx("invalid dmac address \"%s\"", 1314 argv[start_arg + 1]); 1315 return (EINVAL); 1316 } 1317 memcpy(t.fs.dmac, daddr, ETHER_ADDR_LEN); 1318 t.fs.newdmac = 1; 1319 } else if (!strcmp(argv[start_arg], "smac")) { 1320 struct ether_addr *saddr; 1321 1322 saddr = ether_aton(argv[start_arg + 1]); 1323 if (saddr == NULL) { 1324 warnx("invalid smac address \"%s\"", 1325 argv[start_arg + 1]); 1326 return (EINVAL); 1327 } 1328 memcpy(t.fs.smac, saddr, ETHER_ADDR_LEN); 1329 t.fs.newsmac = 1; 1330 } else if (!strcmp(argv[start_arg], "vlan")) { 1331 char *p; 1332 if (!strcmp(argv[start_arg + 1], "none")) { 1333 t.fs.newvlan = VLAN_REMOVE; 1334 } else if (argv[start_arg + 1][0] == '=') { 1335 t.fs.newvlan = VLAN_REWRITE; 1336 } else if (argv[start_arg + 1][0] == '+') { 1337 t.fs.newvlan = VLAN_INSERT; 1338 } else { 1339 warnx("unknown vlan parameter \"%s\"; must" 1340 " be one of \"none\", \"=<vlan>\", " 1341 " \"+<vlan>\"", argv[start_arg + 1]); 1342 return (EINVAL); 1343 } 1344 if (t.fs.newvlan == VLAN_REWRITE || 1345 t.fs.newvlan == VLAN_INSERT) { 1346 t.fs.vlan = strtoul(argv[start_arg + 1] + 1, 1347 &p, 0); 1348 if (p == argv[start_arg + 1] + 1 || p[0] != 0 || 1349 t.fs.vlan > MAX_VLANID) { 1350 warnx("invalid vlan \"%s\"", 1351 argv[start_arg + 1]); 1352 return (EINVAL); 1353 } 1354 } 1355 } else { 1356 warnx("invalid parameter \"%s\"", argv[start_arg]); 1357 return (EINVAL); 1358 } 1359 } 1360 if (start_arg != argc) { 1361 warnx("no value for \"%s\"", argv[start_arg]); 1362 return (EINVAL); 1363 } 1364 1365 /* 1366 * Check basic sanity of option combinations. 1367 */ 1368 if (t.fs.action != FILTER_SWITCH && 1369 (t.fs.eport || t.fs.newdmac || t.fs.newsmac || t.fs.newvlan || 1370 t.fs.swapmac || t.fs.nat_mode)) { 1371 warnx("port, dmac, smac, vlan, and nat only make sense with" 1372 " \"action switch\""); 1373 return (EINVAL); 1374 } 1375 if (!t.fs.nat_mode && (t.fs.nat_seq_chk || t.fs.nat_flag_chk || 1376 *t.fs.nat_dip || *t.fs.nat_sip || t.fs.nat_dport || t.fs.nat_sport)) { 1377 warnx("nat params only make sense with valid nat mode"); 1378 return (EINVAL); 1379 } 1380 if (t.fs.action != FILTER_PASS && 1381 (t.fs.rpttid || t.fs.dirsteer || t.fs.maskhash)) { 1382 warnx("rpttid, queue and tcbhash don't make sense with" 1383 " action \"drop\" or \"switch\""); 1384 return (EINVAL); 1385 } 1386 if (t.fs.val.ovlan_vld && t.fs.val.pfvf_vld) { 1387 warnx("ovlan and vnic_id (pf/vf) are mutually exclusive"); 1388 return (EINVAL); 1389 } 1390 1391 t.fs.type = (af == AF_INET6 ? 1 : 0); /* default IPv4 */ 1392 rc = doit(CHELSIO_T4_SET_FILTER, &t); 1393 if (hash && rc == 0) 1394 printf("%d\n", t.idx); 1395 return (rc); 1396} 1397 1398static int 1399filter_cmd(int argc, const char *argv[], int hashfilter) 1400{ 1401 long long val; 1402 uint32_t idx; 1403 char *s; 1404 1405 if (argc == 0) { 1406 warnx("%sfilter: no arguments.", hashfilter ? "hash" : ""); 1407 return (EINVAL); 1408 }; 1409 1410 /* list */ 1411 if (strcmp(argv[0], "list") == 0) { 1412 if (argc != 1) 1413 warnx("trailing arguments after \"list\" ignored."); 1414 1415 return show_filters(hashfilter); 1416 } 1417 1418 /* mode */ 1419 if (argc == 1 && strcmp(argv[0], "mode") == 0) 1420 return get_filter_mode(hashfilter); 1421 1422 /* mode <mode> */ 1423 if (!hashfilter && strcmp(argv[0], "mode") == 0) 1424 return set_filter_mode(argc - 1, argv + 1); 1425 1426 /* <idx> ... */ 1427 s = str_to_number(argv[0], NULL, &val); 1428 if (*s || val < 0 || val > 0xffffffffU) { 1429 if (hashfilter) { 1430 /* 1431 * No numeric index means this must be a request to 1432 * create a new hashfilter and we are already at the 1433 * paramter/value list. 1434 */ 1435 idx = (uint32_t) -1; 1436 goto setf; 1437 } 1438 warnx("\"%s\" is neither an index nor a filter subcommand.", 1439 argv[0]); 1440 return (EINVAL); 1441 } 1442 idx = (uint32_t) val; 1443 1444 /* <idx> delete|clear [prio 0|1] */ 1445 if ((argc == 2 || argc == 4) && 1446 (strcmp(argv[1], "delete") == 0 || strcmp(argv[1], "clear") == 0)) { 1447 int prio = 0; 1448 1449 if (argc == 4) { 1450 if (hashfilter) { 1451 warnx("stray arguments after \"%s\".", argv[1]); 1452 return (EINVAL); 1453 } 1454 1455 if (strcmp(argv[2], "prio") != 0) { 1456 warnx("\"prio\" is the only valid keyword " 1457 "after \"%s\", found \"%s\" instead.", 1458 argv[1], argv[2]); 1459 return (EINVAL); 1460 } 1461 1462 s = str_to_number(argv[3], NULL, &val); 1463 if (*s || val < 0 || val > 1) { 1464 warnx("%s \"%s\"; must be \"0\" or \"1\".", 1465 argv[2], argv[3]); 1466 return (EINVAL); 1467 } 1468 prio = (int)val; 1469 } 1470 return del_filter(idx, prio, hashfilter); 1471 } 1472 1473 /* skip <idx> */ 1474 argc--; 1475 argv++; 1476 1477setf: 1478 /* [<param> <val>] ... */ 1479 return set_filter(idx, argc, argv, hashfilter); 1480} 1481 1482/* 1483 * Shows the fields of a multi-word structure. The structure is considered to 1484 * consist of @nwords 32-bit words (i.e, it's an (@nwords * 32)-bit structure) 1485 * whose fields are described by @fd. The 32-bit words are given in @words 1486 * starting with the least significant 32-bit word. 1487 */ 1488static void 1489show_struct(const uint32_t *words, int nwords, const struct field_desc *fd) 1490{ 1491 unsigned int w = 0; 1492 const struct field_desc *p; 1493 1494 for (p = fd; p->name; p++) 1495 w = max(w, strlen(p->name)); 1496 1497 while (fd->name) { 1498 unsigned long long data; 1499 int first_word = fd->start / 32; 1500 int shift = fd->start % 32; 1501 int width = fd->end - fd->start + 1; 1502 unsigned long long mask = (1ULL << width) - 1; 1503 1504 data = (words[first_word] >> shift) | 1505 ((uint64_t)words[first_word + 1] << (32 - shift)); 1506 if (shift) 1507 data |= ((uint64_t)words[first_word + 2] << (64 - shift)); 1508 data &= mask; 1509 if (fd->islog2) 1510 data = 1 << data; 1511 printf("%-*s ", w, fd->name); 1512 printf(fd->hex ? "%#llx\n" : "%llu\n", data << fd->shift); 1513 fd++; 1514 } 1515} 1516 1517#define FIELD(name, start, end) { name, start, end, 0, 0, 0 } 1518#define FIELD1(name, start) FIELD(name, start, start) 1519 1520static void 1521show_t5t6_ctxt(const struct t4_sge_context *p, int vers) 1522{ 1523 static struct field_desc egress_t5[] = { 1524 FIELD("DCA_ST:", 181, 191), 1525 FIELD1("StatusPgNS:", 180), 1526 FIELD1("StatusPgRO:", 179), 1527 FIELD1("FetchNS:", 178), 1528 FIELD1("FetchRO:", 177), 1529 FIELD1("Valid:", 176), 1530 FIELD("PCIeDataChannel:", 174, 175), 1531 FIELD1("StatusPgTPHintEn:", 173), 1532 FIELD("StatusPgTPHint:", 171, 172), 1533 FIELD1("FetchTPHintEn:", 170), 1534 FIELD("FetchTPHint:", 168, 169), 1535 FIELD1("FCThreshOverride:", 167), 1536 { "WRLength:", 162, 166, 9, 0, 1 }, 1537 FIELD1("WRLengthKnown:", 161), 1538 FIELD1("ReschedulePending:", 160), 1539 FIELD1("OnChipQueue:", 159), 1540 FIELD1("FetchSizeMode:", 158), 1541 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1542 FIELD1("FLMPacking:", 155), 1543 FIELD("FetchBurstMax:", 153, 154), 1544 FIELD("uPToken:", 133, 152), 1545 FIELD1("uPTokenEn:", 132), 1546 FIELD1("UserModeIO:", 131), 1547 FIELD("uPFLCredits:", 123, 130), 1548 FIELD1("uPFLCreditEn:", 122), 1549 FIELD("FID:", 111, 121), 1550 FIELD("HostFCMode:", 109, 110), 1551 FIELD1("HostFCOwner:", 108), 1552 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1553 FIELD("CIDX:", 89, 104), 1554 FIELD("PIDX:", 73, 88), 1555 { "BaseAddress:", 18, 72, 9, 1 }, 1556 FIELD("QueueSize:", 2, 17), 1557 FIELD1("QueueType:", 1), 1558 FIELD1("CachePriority:", 0), 1559 { NULL } 1560 }; 1561 static struct field_desc egress_t6[] = { 1562 FIELD("DCA_ST:", 181, 191), 1563 FIELD1("StatusPgNS:", 180), 1564 FIELD1("StatusPgRO:", 179), 1565 FIELD1("FetchNS:", 178), 1566 FIELD1("FetchRO:", 177), 1567 FIELD1("Valid:", 176), 1568 FIELD1("ReschedulePending_1:", 175), 1569 FIELD1("PCIeDataChannel:", 174), 1570 FIELD1("StatusPgTPHintEn:", 173), 1571 FIELD("StatusPgTPHint:", 171, 172), 1572 FIELD1("FetchTPHintEn:", 170), 1573 FIELD("FetchTPHint:", 168, 169), 1574 FIELD1("FCThreshOverride:", 167), 1575 { "WRLength:", 162, 166, 9, 0, 1 }, 1576 FIELD1("WRLengthKnown:", 161), 1577 FIELD1("ReschedulePending:", 160), 1578 FIELD("TimerIx:", 157, 159), 1579 FIELD1("FetchBurstMin:", 156), 1580 FIELD1("FLMPacking:", 155), 1581 FIELD("FetchBurstMax:", 153, 154), 1582 FIELD("uPToken:", 133, 152), 1583 FIELD1("uPTokenEn:", 132), 1584 FIELD1("UserModeIO:", 131), 1585 FIELD("uPFLCredits:", 123, 130), 1586 FIELD1("uPFLCreditEn:", 122), 1587 FIELD("FID:", 111, 121), 1588 FIELD("HostFCMode:", 109, 110), 1589 FIELD1("HostFCOwner:", 108), 1590 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1591 FIELD("CIDX:", 89, 104), 1592 FIELD("PIDX:", 73, 88), 1593 { "BaseAddress:", 18, 72, 9, 1 }, 1594 FIELD("QueueSize:", 2, 17), 1595 FIELD1("QueueType:", 1), 1596 FIELD1("FetchSizeMode:", 0), 1597 { NULL } 1598 }; 1599 static struct field_desc fl_t5[] = { 1600 FIELD("DCA_ST:", 181, 191), 1601 FIELD1("StatusPgNS:", 180), 1602 FIELD1("StatusPgRO:", 179), 1603 FIELD1("FetchNS:", 178), 1604 FIELD1("FetchRO:", 177), 1605 FIELD1("Valid:", 176), 1606 FIELD("PCIeDataChannel:", 174, 175), 1607 FIELD1("StatusPgTPHintEn:", 173), 1608 FIELD("StatusPgTPHint:", 171, 172), 1609 FIELD1("FetchTPHintEn:", 170), 1610 FIELD("FetchTPHint:", 168, 169), 1611 FIELD1("FCThreshOverride:", 167), 1612 FIELD1("ReschedulePending:", 160), 1613 FIELD1("OnChipQueue:", 159), 1614 FIELD1("FetchSizeMode:", 158), 1615 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1616 FIELD1("FLMPacking:", 155), 1617 FIELD("FetchBurstMax:", 153, 154), 1618 FIELD1("FLMcongMode:", 152), 1619 FIELD("MaxuPFLCredits:", 144, 151), 1620 FIELD("FLMcontextID:", 133, 143), 1621 FIELD1("uPTokenEn:", 132), 1622 FIELD1("UserModeIO:", 131), 1623 FIELD("uPFLCredits:", 123, 130), 1624 FIELD1("uPFLCreditEn:", 122), 1625 FIELD("FID:", 111, 121), 1626 FIELD("HostFCMode:", 109, 110), 1627 FIELD1("HostFCOwner:", 108), 1628 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1629 FIELD("CIDX:", 89, 104), 1630 FIELD("PIDX:", 73, 88), 1631 { "BaseAddress:", 18, 72, 9, 1 }, 1632 FIELD("QueueSize:", 2, 17), 1633 FIELD1("QueueType:", 1), 1634 FIELD1("CachePriority:", 0), 1635 { NULL } 1636 }; 1637 static struct field_desc ingress_t5[] = { 1638 FIELD("DCA_ST:", 143, 153), 1639 FIELD1("ISCSICoalescing:", 142), 1640 FIELD1("Queue_Valid:", 141), 1641 FIELD1("TimerPending:", 140), 1642 FIELD1("DropRSS:", 139), 1643 FIELD("PCIeChannel:", 137, 138), 1644 FIELD1("SEInterruptArmed:", 136), 1645 FIELD1("CongestionMgtEnable:", 135), 1646 FIELD1("NoSnoop:", 134), 1647 FIELD1("RelaxedOrdering:", 133), 1648 FIELD1("GTSmode:", 132), 1649 FIELD1("TPHintEn:", 131), 1650 FIELD("TPHint:", 129, 130), 1651 FIELD1("UpdateScheduling:", 128), 1652 FIELD("UpdateDelivery:", 126, 127), 1653 FIELD1("InterruptSent:", 125), 1654 FIELD("InterruptIDX:", 114, 124), 1655 FIELD1("InterruptDestination:", 113), 1656 FIELD1("InterruptArmed:", 112), 1657 FIELD("RxIntCounter:", 106, 111), 1658 FIELD("RxIntCounterThreshold:", 104, 105), 1659 FIELD1("Generation:", 103), 1660 { "BaseAddress:", 48, 102, 9, 1 }, 1661 FIELD("PIDX:", 32, 47), 1662 FIELD("CIDX:", 16, 31), 1663 { "QueueSize:", 4, 15, 4, 0 }, 1664 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1665 FIELD1("QueueEntryOverride:", 1), 1666 FIELD1("CachePriority:", 0), 1667 { NULL } 1668 }; 1669 static struct field_desc ingress_t6[] = { 1670 FIELD1("SP_NS:", 158), 1671 FIELD1("SP_RO:", 157), 1672 FIELD1("SP_TPHintEn:", 156), 1673 FIELD("SP_TPHint:", 154, 155), 1674 FIELD("DCA_ST:", 143, 153), 1675 FIELD1("ISCSICoalescing:", 142), 1676 FIELD1("Queue_Valid:", 141), 1677 FIELD1("TimerPending:", 140), 1678 FIELD1("DropRSS:", 139), 1679 FIELD("PCIeChannel:", 137, 138), 1680 FIELD1("SEInterruptArmed:", 136), 1681 FIELD1("CongestionMgtEnable:", 135), 1682 FIELD1("NoSnoop:", 134), 1683 FIELD1("RelaxedOrdering:", 133), 1684 FIELD1("GTSmode:", 132), 1685 FIELD1("TPHintEn:", 131), 1686 FIELD("TPHint:", 129, 130), 1687 FIELD1("UpdateScheduling:", 128), 1688 FIELD("UpdateDelivery:", 126, 127), 1689 FIELD1("InterruptSent:", 125), 1690 FIELD("InterruptIDX:", 114, 124), 1691 FIELD1("InterruptDestination:", 113), 1692 FIELD1("InterruptArmed:", 112), 1693 FIELD("RxIntCounter:", 106, 111), 1694 FIELD("RxIntCounterThreshold:", 104, 105), 1695 FIELD1("Generation:", 103), 1696 { "BaseAddress:", 48, 102, 9, 1 }, 1697 FIELD("PIDX:", 32, 47), 1698 FIELD("CIDX:", 16, 31), 1699 { "QueueSize:", 4, 15, 4, 0 }, 1700 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1701 FIELD1("QueueEntryOverride:", 1), 1702 FIELD1("CachePriority:", 0), 1703 { NULL } 1704 }; 1705 static struct field_desc flm_t5[] = { 1706 FIELD1("Valid:", 89), 1707 FIELD("SplitLenMode:", 87, 88), 1708 FIELD1("TPHintEn:", 86), 1709 FIELD("TPHint:", 84, 85), 1710 FIELD1("NoSnoop:", 83), 1711 FIELD1("RelaxedOrdering:", 82), 1712 FIELD("DCA_ST:", 71, 81), 1713 FIELD("EQid:", 54, 70), 1714 FIELD("SplitEn:", 52, 53), 1715 FIELD1("PadEn:", 51), 1716 FIELD1("PackEn:", 50), 1717 FIELD1("Cache_Lock :", 49), 1718 FIELD1("CongDrop:", 48), 1719 FIELD("PackOffset:", 16, 47), 1720 FIELD("CIDX:", 8, 15), 1721 FIELD("PIDX:", 0, 7), 1722 { NULL } 1723 }; 1724 static struct field_desc flm_t6[] = { 1725 FIELD1("Valid:", 89), 1726 FIELD("SplitLenMode:", 87, 88), 1727 FIELD1("TPHintEn:", 86), 1728 FIELD("TPHint:", 84, 85), 1729 FIELD1("NoSnoop:", 83), 1730 FIELD1("RelaxedOrdering:", 82), 1731 FIELD("DCA_ST:", 71, 81), 1732 FIELD("EQid:", 54, 70), 1733 FIELD("SplitEn:", 52, 53), 1734 FIELD1("PadEn:", 51), 1735 FIELD1("PackEn:", 50), 1736 FIELD1("Cache_Lock :", 49), 1737 FIELD1("CongDrop:", 48), 1738 FIELD1("Inflight:", 47), 1739 FIELD1("CongEn:", 46), 1740 FIELD1("CongMode:", 45), 1741 FIELD("PackOffset:", 20, 39), 1742 FIELD("CIDX:", 8, 15), 1743 FIELD("PIDX:", 0, 7), 1744 { NULL } 1745 }; 1746 static struct field_desc conm_t5[] = { 1747 FIELD1("CngMPSEnable:", 21), 1748 FIELD("CngTPMode:", 19, 20), 1749 FIELD1("CngDBPHdr:", 18), 1750 FIELD1("CngDBPData:", 17), 1751 FIELD1("CngIMSG:", 16), 1752 { "CngChMap:", 0, 15, 0, 1, 0 }, 1753 { NULL } 1754 }; 1755 1756 if (p->mem_id == SGE_CONTEXT_EGRESS) { 1757 if (p->data[0] & 2) 1758 show_struct(p->data, 6, fl_t5); 1759 else if (vers == 5) 1760 show_struct(p->data, 6, egress_t5); 1761 else 1762 show_struct(p->data, 6, egress_t6); 1763 } else if (p->mem_id == SGE_CONTEXT_FLM) 1764 show_struct(p->data, 3, vers == 5 ? flm_t5 : flm_t6); 1765 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1766 show_struct(p->data, 5, vers == 5 ? ingress_t5 : ingress_t6); 1767 else if (p->mem_id == SGE_CONTEXT_CNM) 1768 show_struct(p->data, 1, conm_t5); 1769} 1770 1771static void 1772show_t4_ctxt(const struct t4_sge_context *p) 1773{ 1774 static struct field_desc egress_t4[] = { 1775 FIELD1("StatusPgNS:", 180), 1776 FIELD1("StatusPgRO:", 179), 1777 FIELD1("FetchNS:", 178), 1778 FIELD1("FetchRO:", 177), 1779 FIELD1("Valid:", 176), 1780 FIELD("PCIeDataChannel:", 174, 175), 1781 FIELD1("DCAEgrQEn:", 173), 1782 FIELD("DCACPUID:", 168, 172), 1783 FIELD1("FCThreshOverride:", 167), 1784 FIELD("WRLength:", 162, 166), 1785 FIELD1("WRLengthKnown:", 161), 1786 FIELD1("ReschedulePending:", 160), 1787 FIELD1("OnChipQueue:", 159), 1788 FIELD1("FetchSizeMode", 158), 1789 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1790 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1791 FIELD("uPToken:", 133, 152), 1792 FIELD1("uPTokenEn:", 132), 1793 FIELD1("UserModeIO:", 131), 1794 FIELD("uPFLCredits:", 123, 130), 1795 FIELD1("uPFLCreditEn:", 122), 1796 FIELD("FID:", 111, 121), 1797 FIELD("HostFCMode:", 109, 110), 1798 FIELD1("HostFCOwner:", 108), 1799 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1800 FIELD("CIDX:", 89, 104), 1801 FIELD("PIDX:", 73, 88), 1802 { "BaseAddress:", 18, 72, 9, 1 }, 1803 FIELD("QueueSize:", 2, 17), 1804 FIELD1("QueueType:", 1), 1805 FIELD1("CachePriority:", 0), 1806 { NULL } 1807 }; 1808 static struct field_desc fl_t4[] = { 1809 FIELD1("StatusPgNS:", 180), 1810 FIELD1("StatusPgRO:", 179), 1811 FIELD1("FetchNS:", 178), 1812 FIELD1("FetchRO:", 177), 1813 FIELD1("Valid:", 176), 1814 FIELD("PCIeDataChannel:", 174, 175), 1815 FIELD1("DCAEgrQEn:", 173), 1816 FIELD("DCACPUID:", 168, 172), 1817 FIELD1("FCThreshOverride:", 167), 1818 FIELD1("ReschedulePending:", 160), 1819 FIELD1("OnChipQueue:", 159), 1820 FIELD1("FetchSizeMode", 158), 1821 { "FetchBurstMin:", 156, 157, 4, 0, 1 }, 1822 { "FetchBurstMax:", 153, 154, 6, 0, 1 }, 1823 FIELD1("FLMcongMode:", 152), 1824 FIELD("MaxuPFLCredits:", 144, 151), 1825 FIELD("FLMcontextID:", 133, 143), 1826 FIELD1("uPTokenEn:", 132), 1827 FIELD1("UserModeIO:", 131), 1828 FIELD("uPFLCredits:", 123, 130), 1829 FIELD1("uPFLCreditEn:", 122), 1830 FIELD("FID:", 111, 121), 1831 FIELD("HostFCMode:", 109, 110), 1832 FIELD1("HostFCOwner:", 108), 1833 { "CIDXFlushThresh:", 105, 107, 0, 0, 1 }, 1834 FIELD("CIDX:", 89, 104), 1835 FIELD("PIDX:", 73, 88), 1836 { "BaseAddress:", 18, 72, 9, 1 }, 1837 FIELD("QueueSize:", 2, 17), 1838 FIELD1("QueueType:", 1), 1839 FIELD1("CachePriority:", 0), 1840 { NULL } 1841 }; 1842 static struct field_desc ingress_t4[] = { 1843 FIELD1("NoSnoop:", 145), 1844 FIELD1("RelaxedOrdering:", 144), 1845 FIELD1("GTSmode:", 143), 1846 FIELD1("ISCSICoalescing:", 142), 1847 FIELD1("Valid:", 141), 1848 FIELD1("TimerPending:", 140), 1849 FIELD1("DropRSS:", 139), 1850 FIELD("PCIeChannel:", 137, 138), 1851 FIELD1("SEInterruptArmed:", 136), 1852 FIELD1("CongestionMgtEnable:", 135), 1853 FIELD1("DCAIngQEnable:", 134), 1854 FIELD("DCACPUID:", 129, 133), 1855 FIELD1("UpdateScheduling:", 128), 1856 FIELD("UpdateDelivery:", 126, 127), 1857 FIELD1("InterruptSent:", 125), 1858 FIELD("InterruptIDX:", 114, 124), 1859 FIELD1("InterruptDestination:", 113), 1860 FIELD1("InterruptArmed:", 112), 1861 FIELD("RxIntCounter:", 106, 111), 1862 FIELD("RxIntCounterThreshold:", 104, 105), 1863 FIELD1("Generation:", 103), 1864 { "BaseAddress:", 48, 102, 9, 1 }, 1865 FIELD("PIDX:", 32, 47), 1866 FIELD("CIDX:", 16, 31), 1867 { "QueueSize:", 4, 15, 4, 0 }, 1868 { "QueueEntrySize:", 2, 3, 4, 0, 1 }, 1869 FIELD1("QueueEntryOverride:", 1), 1870 FIELD1("CachePriority:", 0), 1871 { NULL } 1872 }; 1873 static struct field_desc flm_t4[] = { 1874 FIELD1("NoSnoop:", 79), 1875 FIELD1("RelaxedOrdering:", 78), 1876 FIELD1("Valid:", 77), 1877 FIELD("DCACPUID:", 72, 76), 1878 FIELD1("DCAFLEn:", 71), 1879 FIELD("EQid:", 54, 70), 1880 FIELD("SplitEn:", 52, 53), 1881 FIELD1("PadEn:", 51), 1882 FIELD1("PackEn:", 50), 1883 FIELD1("DBpriority:", 48), 1884 FIELD("PackOffset:", 16, 47), 1885 FIELD("CIDX:", 8, 15), 1886 FIELD("PIDX:", 0, 7), 1887 { NULL } 1888 }; 1889 static struct field_desc conm_t4[] = { 1890 FIELD1("CngDBPHdr:", 6), 1891 FIELD1("CngDBPData:", 5), 1892 FIELD1("CngIMSG:", 4), 1893 { "CngChMap:", 0, 3, 0, 1, 0}, 1894 { NULL } 1895 }; 1896 1897 if (p->mem_id == SGE_CONTEXT_EGRESS) 1898 show_struct(p->data, 6, (p->data[0] & 2) ? fl_t4 : egress_t4); 1899 else if (p->mem_id == SGE_CONTEXT_FLM) 1900 show_struct(p->data, 3, flm_t4); 1901 else if (p->mem_id == SGE_CONTEXT_INGRESS) 1902 show_struct(p->data, 5, ingress_t4); 1903 else if (p->mem_id == SGE_CONTEXT_CNM) 1904 show_struct(p->data, 1, conm_t4); 1905} 1906 1907#undef FIELD 1908#undef FIELD1 1909 1910static int 1911get_sge_context(int argc, const char *argv[]) 1912{ 1913 int rc; 1914 char *p; 1915 long cid; 1916 struct t4_sge_context cntxt = {0}; 1917 1918 if (argc != 2) { 1919 warnx("sge_context: incorrect number of arguments."); 1920 return (EINVAL); 1921 } 1922 1923 if (!strcmp(argv[0], "egress")) 1924 cntxt.mem_id = SGE_CONTEXT_EGRESS; 1925 else if (!strcmp(argv[0], "ingress")) 1926 cntxt.mem_id = SGE_CONTEXT_INGRESS; 1927 else if (!strcmp(argv[0], "fl")) 1928 cntxt.mem_id = SGE_CONTEXT_FLM; 1929 else if (!strcmp(argv[0], "cong")) 1930 cntxt.mem_id = SGE_CONTEXT_CNM; 1931 else { 1932 warnx("unknown context type \"%s\"; known types are egress, " 1933 "ingress, fl, and cong.", argv[0]); 1934 return (EINVAL); 1935 } 1936 1937 p = str_to_number(argv[1], &cid, NULL); 1938 if (*p) { 1939 warnx("invalid context id \"%s\"", argv[1]); 1940 return (EINVAL); 1941 } 1942 cntxt.cid = cid; 1943 1944 rc = doit(CHELSIO_T4_GET_SGE_CONTEXT, &cntxt); 1945 if (rc != 0) 1946 return (rc); 1947 1948 if (chip_id == 4) 1949 show_t4_ctxt(&cntxt); 1950 else 1951 show_t5t6_ctxt(&cntxt, chip_id); 1952 1953 return (0); 1954} 1955 1956static int 1957loadfw(int argc, const char *argv[]) 1958{ 1959 int rc, fd; 1960 struct t4_data data = {0}; 1961 const char *fname = argv[0]; 1962 struct stat st = {0}; 1963 1964 if (argc != 1) { 1965 warnx("loadfw: incorrect number of arguments."); 1966 return (EINVAL); 1967 } 1968 1969 fd = open(fname, O_RDONLY); 1970 if (fd < 0) { 1971 warn("open(%s)", fname); 1972 return (errno); 1973 } 1974 1975 if (fstat(fd, &st) < 0) { 1976 warn("fstat"); 1977 close(fd); 1978 return (errno); 1979 } 1980 1981 data.len = st.st_size; 1982 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 1983 if (data.data == MAP_FAILED) { 1984 warn("mmap"); 1985 close(fd); 1986 return (errno); 1987 } 1988 1989 rc = doit(CHELSIO_T4_LOAD_FW, &data); 1990 munmap(data.data, data.len); 1991 close(fd); 1992 return (rc); 1993} 1994 1995static int 1996loadcfg(int argc, const char *argv[]) 1997{ 1998 int rc, fd; 1999 struct t4_data data = {0}; 2000 const char *fname = argv[0]; 2001 struct stat st = {0}; 2002 2003 if (argc != 1) { 2004 warnx("loadcfg: incorrect number of arguments."); 2005 return (EINVAL); 2006 } 2007 2008 if (strcmp(fname, "clear") == 0) 2009 return (doit(CHELSIO_T4_LOAD_CFG, &data)); 2010 2011 fd = open(fname, O_RDONLY); 2012 if (fd < 0) { 2013 warn("open(%s)", fname); 2014 return (errno); 2015 } 2016 2017 if (fstat(fd, &st) < 0) { 2018 warn("fstat"); 2019 close(fd); 2020 return (errno); 2021 } 2022 2023 data.len = st.st_size; 2024 data.len &= ~3; /* Clip off to make it a multiple of 4 */ 2025 data.data = mmap(0, data.len, PROT_READ, MAP_PRIVATE, fd, 0); 2026 if (data.data == MAP_FAILED) { 2027 warn("mmap"); 2028 close(fd); 2029 return (errno); 2030 } 2031 2032 rc = doit(CHELSIO_T4_LOAD_CFG, &data); 2033 munmap(data.data, data.len); 2034 close(fd); 2035 return (rc); 2036} 2037 2038static int 2039dumpstate(int argc, const char *argv[]) 2040{ 2041 int rc, fd; 2042 struct t4_cudbg_dump dump = {0}; 2043 const char *fname = argv[0]; 2044 2045 if (argc != 1) { 2046 warnx("dumpstate: incorrect number of arguments."); 2047 return (EINVAL); 2048 } 2049 2050 dump.wr_flash = 0; 2051 memset(&dump.bitmap, 0xff, sizeof(dump.bitmap)); 2052 dump.len = 8 * 1024 * 1024; 2053 dump.data = malloc(dump.len); 2054 if (dump.data == NULL) { 2055 return (ENOMEM); 2056 } 2057 2058 rc = doit(CHELSIO_T4_CUDBG_DUMP, &dump); 2059 if (rc != 0) 2060 goto done; 2061 2062 fd = open(fname, O_CREAT | O_TRUNC | O_EXCL | O_WRONLY, 2063 S_IRUSR | S_IRGRP | S_IROTH); 2064 if (fd < 0) { 2065 warn("open(%s)", fname); 2066 rc = errno; 2067 goto done; 2068 } 2069 write(fd, dump.data, dump.len); 2070 close(fd); 2071done: 2072 free(dump.data); 2073 return (rc); 2074} 2075 2076static int 2077read_mem(uint32_t addr, uint32_t len, void (*output)(uint32_t *, uint32_t)) 2078{ 2079 int rc; 2080 struct t4_mem_range mr; 2081 2082 mr.addr = addr; 2083 mr.len = len; 2084 mr.data = malloc(mr.len); 2085 2086 if (mr.data == 0) { 2087 warn("read_mem: malloc"); 2088 return (errno); 2089 } 2090 2091 rc = doit(CHELSIO_T4_GET_MEM, &mr); 2092 if (rc != 0) 2093 goto done; 2094 2095 if (output) 2096 (*output)(mr.data, mr.len); 2097done: 2098 free(mr.data); 2099 return (rc); 2100} 2101 2102static int 2103loadboot(int argc, const char *argv[]) 2104{ 2105 int rc, fd; 2106 long l; 2107 char *p; 2108 struct t4_bootrom br = {0}; 2109 const char *fname = argv[0]; 2110 struct stat st = {0}; 2111 2112 if (argc == 1) { 2113 br.pf_offset = 0; 2114 br.pfidx_addr = 0; 2115 } else if (argc == 3) { 2116 if (!strcmp(argv[1], "pf")) 2117 br.pf_offset = 0; 2118 else if (!strcmp(argv[1], "offset")) 2119 br.pf_offset = 1; 2120 else 2121 return (EINVAL); 2122 2123 p = str_to_number(argv[2], &l, NULL); 2124 if (*p) 2125 return (EINVAL); 2126 br.pfidx_addr = l; 2127 } else { 2128 warnx("loadboot: incorrect number of arguments."); 2129 return (EINVAL); 2130 } 2131 2132 if (strcmp(fname, "clear") == 0) 2133 return (doit(CHELSIO_T4_LOAD_BOOT, &br)); 2134 2135 fd = open(fname, O_RDONLY); 2136 if (fd < 0) { 2137 warn("open(%s)", fname); 2138 return (errno); 2139 } 2140 2141 if (fstat(fd, &st) < 0) { 2142 warn("fstat"); 2143 close(fd); 2144 return (errno); 2145 } 2146 2147 br.len = st.st_size; 2148 br.data = mmap(0, br.len, PROT_READ, MAP_PRIVATE, fd, 0); 2149 if (br.data == MAP_FAILED) { 2150 warn("mmap"); 2151 close(fd); 2152 return (errno); 2153 } 2154 2155 rc = doit(CHELSIO_T4_LOAD_BOOT, &br); 2156 munmap(br.data, br.len); 2157 close(fd); 2158 return (rc); 2159} 2160 2161static int 2162loadbootcfg(int argc, const char *argv[]) 2163{ 2164 int rc, fd; 2165 struct t4_data bc = {0}; 2166 const char *fname = argv[0]; 2167 struct stat st = {0}; 2168 2169 if (argc != 1) { 2170 warnx("loadbootcfg: incorrect number of arguments."); 2171 return (EINVAL); 2172 } 2173 2174 if (strcmp(fname, "clear") == 0) 2175 return (doit(CHELSIO_T4_LOAD_BOOTCFG, &bc)); 2176 2177 fd = open(fname, O_RDONLY); 2178 if (fd < 0) { 2179 warn("open(%s)", fname); 2180 return (errno); 2181 } 2182 2183 if (fstat(fd, &st) < 0) { 2184 warn("fstat"); 2185 close(fd); 2186 return (errno); 2187 } 2188 2189 bc.len = st.st_size; 2190 bc.data = mmap(0, bc.len, PROT_READ, MAP_PRIVATE, fd, 0); 2191 if (bc.data == MAP_FAILED) { 2192 warn("mmap"); 2193 close(fd); 2194 return (errno); 2195 } 2196 2197 rc = doit(CHELSIO_T4_LOAD_BOOTCFG, &bc); 2198 munmap(bc.data, bc.len); 2199 close(fd); 2200 return (rc); 2201} 2202 2203/* 2204 * Display memory as list of 'n' 4-byte values per line. 2205 */ 2206static void 2207show_mem(uint32_t *buf, uint32_t len) 2208{ 2209 const char *s; 2210 int i, n = 8; 2211 2212 while (len) { 2213 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2214 s = i ? " " : ""; 2215 printf("%s%08x", s, htonl(*buf)); 2216 } 2217 printf("\n"); 2218 } 2219} 2220 2221static int 2222memdump(int argc, const char *argv[]) 2223{ 2224 char *p; 2225 long l; 2226 uint32_t addr, len; 2227 2228 if (argc != 2) { 2229 warnx("incorrect number of arguments."); 2230 return (EINVAL); 2231 } 2232 2233 p = str_to_number(argv[0], &l, NULL); 2234 if (*p) { 2235 warnx("invalid address \"%s\"", argv[0]); 2236 return (EINVAL); 2237 } 2238 addr = l; 2239 2240 p = str_to_number(argv[1], &l, NULL); 2241 if (*p) { 2242 warnx("memdump: invalid length \"%s\"", argv[1]); 2243 return (EINVAL); 2244 } 2245 len = l; 2246 2247 return (read_mem(addr, len, show_mem)); 2248} 2249 2250/* 2251 * Display TCB as list of 'n' 4-byte values per line. 2252 */ 2253static void 2254show_tcb(uint32_t *buf, uint32_t len) 2255{ 2256 unsigned char *tcb = (unsigned char *)buf; 2257 const char *s; 2258 int i, n = 8; 2259 2260 while (len) { 2261 for (i = 0; len && i < n; i++, buf++, len -= 4) { 2262 s = i ? " " : ""; 2263 printf("%s%08x", s, htonl(*buf)); 2264 } 2265 printf("\n"); 2266 } 2267 set_tcb_info(TIDTYPE_TCB, chip_id); 2268 set_print_style(PRNTSTYL_COMP); 2269 swizzle_tcb(tcb); 2270 parse_n_display_xcb(tcb); 2271} 2272 2273#define A_TP_CMM_TCB_BASE 0x7d10 2274#define TCB_SIZE 128 2275static int 2276read_tcb(int argc, const char *argv[]) 2277{ 2278 char *p; 2279 long l; 2280 long long val; 2281 unsigned int tid; 2282 uint32_t addr; 2283 int rc; 2284 2285 if (argc != 1) { 2286 warnx("incorrect number of arguments."); 2287 return (EINVAL); 2288 } 2289 2290 p = str_to_number(argv[0], &l, NULL); 2291 if (*p) { 2292 warnx("invalid tid \"%s\"", argv[0]); 2293 return (EINVAL); 2294 } 2295 tid = l; 2296 2297 rc = read_reg(A_TP_CMM_TCB_BASE, 4, &val); 2298 if (rc != 0) 2299 return (rc); 2300 2301 addr = val + tid * TCB_SIZE; 2302 2303 return (read_mem(addr, TCB_SIZE, show_tcb)); 2304} 2305 2306static int 2307read_i2c(int argc, const char *argv[]) 2308{ 2309 char *p; 2310 long l; 2311 struct t4_i2c_data i2cd; 2312 int rc, i; 2313 2314 if (argc < 3 || argc > 4) { 2315 warnx("incorrect number of arguments."); 2316 return (EINVAL); 2317 } 2318 2319 p = str_to_number(argv[0], &l, NULL); 2320 if (*p || l > UCHAR_MAX) { 2321 warnx("invalid port id \"%s\"", argv[0]); 2322 return (EINVAL); 2323 } 2324 i2cd.port_id = l; 2325 2326 p = str_to_number(argv[1], &l, NULL); 2327 if (*p || l > UCHAR_MAX) { 2328 warnx("invalid i2c device address \"%s\"", argv[1]); 2329 return (EINVAL); 2330 } 2331 i2cd.dev_addr = l; 2332 2333 p = str_to_number(argv[2], &l, NULL); 2334 if (*p || l > UCHAR_MAX) { 2335 warnx("invalid byte offset \"%s\"", argv[2]); 2336 return (EINVAL); 2337 } 2338 i2cd.offset = l; 2339 2340 if (argc == 4) { 2341 p = str_to_number(argv[3], &l, NULL); 2342 if (*p || l > sizeof(i2cd.data)) { 2343 warnx("invalid number of bytes \"%s\"", argv[3]); 2344 return (EINVAL); 2345 } 2346 i2cd.len = l; 2347 } else 2348 i2cd.len = 1; 2349 2350 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2351 if (rc != 0) 2352 return (rc); 2353 2354 for (i = 0; i < i2cd.len; i++) 2355 printf("0x%x [%u]\n", i2cd.data[i], i2cd.data[i]); 2356 2357 return (0); 2358} 2359 2360static int 2361clearstats(int argc, const char *argv[]) 2362{ 2363 char *p; 2364 long l; 2365 uint32_t port; 2366 2367 if (argc != 1) { 2368 warnx("incorrect number of arguments."); 2369 return (EINVAL); 2370 } 2371 2372 p = str_to_number(argv[0], &l, NULL); 2373 if (*p) { 2374 warnx("invalid port id \"%s\"", argv[0]); 2375 return (EINVAL); 2376 } 2377 port = l; 2378 2379 return doit(CHELSIO_T4_CLEAR_STATS, &port); 2380} 2381 2382static int 2383show_tracers(void) 2384{ 2385 struct t4_tracer t; 2386 char *s; 2387 int rc, port_idx, i; 2388 long long val; 2389 2390 /* Magic values: MPS_TRC_CFG = 0x9800. MPS_TRC_CFG[1:1] = TrcEn */ 2391 rc = read_reg(0x9800, 4, &val); 2392 if (rc != 0) 2393 return (rc); 2394 printf("tracing is %s\n", val & 2 ? "ENABLED" : "DISABLED"); 2395 2396 t.idx = 0; 2397 for (t.idx = 0; ; t.idx++) { 2398 rc = doit(CHELSIO_T4_GET_TRACER, &t); 2399 if (rc != 0 || t.idx == 0xff) 2400 break; 2401 2402 if (t.tp.port < 4) { 2403 s = "Rx"; 2404 port_idx = t.tp.port; 2405 } else if (t.tp.port < 8) { 2406 s = "Tx"; 2407 port_idx = t.tp.port - 4; 2408 } else if (t.tp.port < 12) { 2409 s = "loopback"; 2410 port_idx = t.tp.port - 8; 2411 } else if (t.tp.port < 16) { 2412 s = "MPS Rx"; 2413 port_idx = t.tp.port - 12; 2414 } else if (t.tp.port < 20) { 2415 s = "MPS Tx"; 2416 port_idx = t.tp.port - 16; 2417 } else { 2418 s = "unknown"; 2419 port_idx = t.tp.port; 2420 } 2421 2422 printf("\ntracer %u (currently %s) captures ", t.idx, 2423 t.enabled ? "ENABLED" : "DISABLED"); 2424 if (t.tp.port < 8) 2425 printf("port %u %s, ", port_idx, s); 2426 else 2427 printf("%s %u, ", s, port_idx); 2428 printf("snap length: %u, min length: %u\n", t.tp.snap_len, 2429 t.tp.min_len); 2430 printf("packets captured %smatch filter\n", 2431 t.tp.invert ? "do not " : ""); 2432 if (t.tp.skip_ofst) { 2433 printf("filter pattern: "); 2434 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2435 printf("%08x%08x", t.tp.data[i], 2436 t.tp.data[i + 1]); 2437 printf("/"); 2438 for (i = 0; i < t.tp.skip_ofst * 2; i += 2) 2439 printf("%08x%08x", t.tp.mask[i], 2440 t.tp.mask[i + 1]); 2441 printf("@0\n"); 2442 } 2443 printf("filter pattern: "); 2444 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2445 printf("%08x%08x", t.tp.data[i], t.tp.data[i + 1]); 2446 printf("/"); 2447 for (i = t.tp.skip_ofst * 2; i < T4_TRACE_LEN / 4; i += 2) 2448 printf("%08x%08x", t.tp.mask[i], t.tp.mask[i + 1]); 2449 printf("@%u\n", (t.tp.skip_ofst + t.tp.skip_len) * 8); 2450 } 2451 2452 return (rc); 2453} 2454 2455static int 2456tracer_onoff(uint8_t idx, int enabled) 2457{ 2458 struct t4_tracer t; 2459 2460 t.idx = idx; 2461 t.enabled = enabled; 2462 t.valid = 0; 2463 2464 return doit(CHELSIO_T4_SET_TRACER, &t); 2465} 2466 2467static void 2468create_tracing_ifnet() 2469{ 2470 char *cmd[] = { 2471 "/sbin/ifconfig", __DECONST(char *, nexus), "create", NULL 2472 }; 2473 char *env[] = {NULL}; 2474 2475 if (vfork() == 0) { 2476 close(STDERR_FILENO); 2477 execve(cmd[0], cmd, env); 2478 _exit(0); 2479 } 2480} 2481 2482/* 2483 * XXX: Allow user to specify snaplen, minlen, and pattern (including inverted 2484 * matching). Right now this is a quick-n-dirty implementation that traces the 2485 * first 128B of all tx or rx on a port 2486 */ 2487static int 2488set_tracer(uint8_t idx, int argc, const char *argv[]) 2489{ 2490 struct t4_tracer t; 2491 int len, port; 2492 2493 bzero(&t, sizeof (t)); 2494 t.idx = idx; 2495 t.enabled = 1; 2496 t.valid = 1; 2497 2498 if (argc != 1) { 2499 warnx("must specify tx<n> or rx<n>."); 2500 return (EINVAL); 2501 } 2502 2503 len = strlen(argv[0]); 2504 if (len != 3) { 2505 warnx("argument must be 3 characters (tx<n> or rx<n>)"); 2506 return (EINVAL); 2507 } 2508 2509 if (strncmp(argv[0], "tx", 2) == 0) { 2510 port = argv[0][2] - '0'; 2511 if (port < 0 || port > 3) { 2512 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2513 return (EINVAL); 2514 } 2515 port += 4; 2516 } else if (strncmp(argv[0], "rx", 2) == 0) { 2517 port = argv[0][2] - '0'; 2518 if (port < 0 || port > 3) { 2519 warnx("'%c' in %s is invalid", argv[0][2], argv[0]); 2520 return (EINVAL); 2521 } 2522 } else { 2523 warnx("argument '%s' isn't tx<n> or rx<n>", argv[0]); 2524 return (EINVAL); 2525 } 2526 2527 t.tp.snap_len = 128; 2528 t.tp.min_len = 0; 2529 t.tp.skip_ofst = 0; 2530 t.tp.skip_len = 0; 2531 t.tp.invert = 0; 2532 t.tp.port = port; 2533 2534 create_tracing_ifnet(); 2535 return doit(CHELSIO_T4_SET_TRACER, &t); 2536} 2537 2538static int 2539tracer_cmd(int argc, const char *argv[]) 2540{ 2541 long long val; 2542 uint8_t idx; 2543 char *s; 2544 2545 if (argc == 0) { 2546 warnx("tracer: no arguments."); 2547 return (EINVAL); 2548 }; 2549 2550 /* list */ 2551 if (strcmp(argv[0], "list") == 0) { 2552 if (argc != 1) 2553 warnx("trailing arguments after \"list\" ignored."); 2554 2555 return show_tracers(); 2556 } 2557 2558 /* <idx> ... */ 2559 s = str_to_number(argv[0], NULL, &val); 2560 if (*s || val > 0xff) { 2561 warnx("\"%s\" is neither an index nor a tracer subcommand.", 2562 argv[0]); 2563 return (EINVAL); 2564 } 2565 idx = (int8_t)val; 2566 2567 /* <idx> disable */ 2568 if (argc == 2 && strcmp(argv[1], "disable") == 0) 2569 return tracer_onoff(idx, 0); 2570 2571 /* <idx> enable */ 2572 if (argc == 2 && strcmp(argv[1], "enable") == 0) 2573 return tracer_onoff(idx, 1); 2574 2575 /* <idx> ... */ 2576 return set_tracer(idx, argc - 1, argv + 1); 2577} 2578 2579static int 2580modinfo_raw(int port_id) 2581{ 2582 uint8_t offset; 2583 struct t4_i2c_data i2cd; 2584 int rc; 2585 2586 for (offset = 0; offset < 96; offset += sizeof(i2cd.data)) { 2587 bzero(&i2cd, sizeof(i2cd)); 2588 i2cd.port_id = port_id; 2589 i2cd.dev_addr = 0xa0; 2590 i2cd.offset = offset; 2591 i2cd.len = sizeof(i2cd.data); 2592 rc = doit(CHELSIO_T4_GET_I2C, &i2cd); 2593 if (rc != 0) 2594 return (rc); 2595 printf("%02x: %02x %02x %02x %02x %02x %02x %02x %02x", 2596 offset, i2cd.data[0], i2cd.data[1], i2cd.data[2], 2597 i2cd.data[3], i2cd.data[4], i2cd.data[5], i2cd.data[6], 2598 i2cd.data[7]); 2599 2600 printf(" %c%c%c%c %c%c%c%c\n", 2601 isprint(i2cd.data[0]) ? i2cd.data[0] : '.', 2602 isprint(i2cd.data[1]) ? i2cd.data[1] : '.', 2603 isprint(i2cd.data[2]) ? i2cd.data[2] : '.', 2604 isprint(i2cd.data[3]) ? i2cd.data[3] : '.', 2605 isprint(i2cd.data[4]) ? i2cd.data[4] : '.', 2606 isprint(i2cd.data[5]) ? i2cd.data[5] : '.', 2607 isprint(i2cd.data[6]) ? i2cd.data[6] : '.', 2608 isprint(i2cd.data[7]) ? i2cd.data[7] : '.'); 2609 } 2610 2611 return (0); 2612} 2613 2614static int 2615modinfo(int argc, const char *argv[]) 2616{ 2617 long port; 2618 char string[16], *p; 2619 struct t4_i2c_data i2cd; 2620 int rc, i; 2621 uint16_t temp, vcc, tx_bias, tx_power, rx_power; 2622 2623 if (argc < 1) { 2624 warnx("must supply a port"); 2625 return (EINVAL); 2626 } 2627 2628 if (argc > 2) { 2629 warnx("too many arguments"); 2630 return (EINVAL); 2631 } 2632 2633 p = str_to_number(argv[0], &port, NULL); 2634 if (*p || port > UCHAR_MAX) { 2635 warnx("invalid port id \"%s\"", argv[0]); 2636 return (EINVAL); 2637 } 2638 2639 if (argc == 2) { 2640 if (!strcmp(argv[1], "raw")) 2641 return (modinfo_raw(port)); 2642 else { 2643 warnx("second argument can only be \"raw\""); 2644 return (EINVAL); 2645 } 2646 } 2647 2648 bzero(&i2cd, sizeof(i2cd)); 2649 i2cd.len = 1; 2650 i2cd.port_id = port; 2651 i2cd.dev_addr = SFF_8472_BASE; 2652 2653 i2cd.offset = SFF_8472_ID; 2654 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2655 goto fail; 2656 2657 if (i2cd.data[0] > SFF_8472_ID_LAST) 2658 printf("Unknown ID\n"); 2659 else 2660 printf("ID: %s\n", sff_8472_id[i2cd.data[0]]); 2661 2662 bzero(&string, sizeof(string)); 2663 for (i = SFF_8472_VENDOR_START; i < SFF_8472_VENDOR_END; i++) { 2664 i2cd.offset = i; 2665 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2666 goto fail; 2667 string[i - SFF_8472_VENDOR_START] = i2cd.data[0]; 2668 } 2669 printf("Vendor %s\n", string); 2670 2671 bzero(&string, sizeof(string)); 2672 for (i = SFF_8472_SN_START; i < SFF_8472_SN_END; i++) { 2673 i2cd.offset = i; 2674 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2675 goto fail; 2676 string[i - SFF_8472_SN_START] = i2cd.data[0]; 2677 } 2678 printf("SN %s\n", string); 2679 2680 bzero(&string, sizeof(string)); 2681 for (i = SFF_8472_PN_START; i < SFF_8472_PN_END; i++) { 2682 i2cd.offset = i; 2683 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2684 goto fail; 2685 string[i - SFF_8472_PN_START] = i2cd.data[0]; 2686 } 2687 printf("PN %s\n", string); 2688 2689 bzero(&string, sizeof(string)); 2690 for (i = SFF_8472_REV_START; i < SFF_8472_REV_END; i++) { 2691 i2cd.offset = i; 2692 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2693 goto fail; 2694 string[i - SFF_8472_REV_START] = i2cd.data[0]; 2695 } 2696 printf("Rev %s\n", string); 2697 2698 i2cd.offset = SFF_8472_DIAG_TYPE; 2699 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2700 goto fail; 2701 2702 if ((char )i2cd.data[0] & (SFF_8472_DIAG_IMPL | 2703 SFF_8472_DIAG_INTERNAL)) { 2704 2705 /* Switch to reading from the Diagnostic address. */ 2706 i2cd.dev_addr = SFF_8472_DIAG; 2707 i2cd.len = 1; 2708 2709 i2cd.offset = SFF_8472_TEMP; 2710 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2711 goto fail; 2712 temp = i2cd.data[0] << 8; 2713 printf("Temp: "); 2714 if ((temp & SFF_8472_TEMP_SIGN) == SFF_8472_TEMP_SIGN) 2715 printf("-"); 2716 else 2717 printf("+"); 2718 printf("%dC\n", (temp & SFF_8472_TEMP_MSK) >> 2719 SFF_8472_TEMP_SHIFT); 2720 2721 i2cd.offset = SFF_8472_VCC; 2722 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2723 goto fail; 2724 vcc = i2cd.data[0] << 8; 2725 printf("Vcc %fV\n", vcc / SFF_8472_VCC_FACTOR); 2726 2727 i2cd.offset = SFF_8472_TX_BIAS; 2728 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2729 goto fail; 2730 tx_bias = i2cd.data[0] << 8; 2731 printf("TX Bias %fuA\n", tx_bias / SFF_8472_BIAS_FACTOR); 2732 2733 i2cd.offset = SFF_8472_TX_POWER; 2734 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2735 goto fail; 2736 tx_power = i2cd.data[0] << 8; 2737 printf("TX Power %fmW\n", tx_power / SFF_8472_POWER_FACTOR); 2738 2739 i2cd.offset = SFF_8472_RX_POWER; 2740 if ((rc = doit(CHELSIO_T4_GET_I2C, &i2cd)) != 0) 2741 goto fail; 2742 rx_power = i2cd.data[0] << 8; 2743 printf("RX Power %fmW\n", rx_power / SFF_8472_POWER_FACTOR); 2744 2745 } else 2746 printf("Diagnostics not supported.\n"); 2747 2748 return(0); 2749 2750fail: 2751 if (rc == EPERM) 2752 warnx("No module/cable in port %ld", port); 2753 return (rc); 2754 2755} 2756 2757/* XXX: pass in a low/high and do range checks as well */ 2758static int 2759get_sched_param(const char *param, const char *args[], long *val) 2760{ 2761 char *p; 2762 2763 if (strcmp(param, args[0]) != 0) 2764 return (EINVAL); 2765 2766 p = str_to_number(args[1], val, NULL); 2767 if (*p) { 2768 warnx("parameter \"%s\" has bad value \"%s\"", args[0], 2769 args[1]); 2770 return (EINVAL); 2771 } 2772 2773 return (0); 2774} 2775 2776static int 2777sched_class(int argc, const char *argv[]) 2778{ 2779 struct t4_sched_params op; 2780 int errs, i; 2781 2782 memset(&op, 0xff, sizeof(op)); 2783 op.subcmd = -1; 2784 op.type = -1; 2785 if (argc == 0) { 2786 warnx("missing scheduling sub-command"); 2787 return (EINVAL); 2788 } 2789 if (!strcmp(argv[0], "config")) { 2790 op.subcmd = SCHED_CLASS_SUBCMD_CONFIG; 2791 op.u.config.minmax = -1; 2792 } else if (!strcmp(argv[0], "params")) { 2793 op.subcmd = SCHED_CLASS_SUBCMD_PARAMS; 2794 op.u.params.level = op.u.params.mode = op.u.params.rateunit = 2795 op.u.params.ratemode = op.u.params.channel = 2796 op.u.params.cl = op.u.params.minrate = op.u.params.maxrate = 2797 op.u.params.weight = op.u.params.pktsize = -1; 2798 } else { 2799 warnx("invalid scheduling sub-command \"%s\"", argv[0]); 2800 return (EINVAL); 2801 } 2802 2803 /* Decode remaining arguments ... */ 2804 errs = 0; 2805 for (i = 1; i < argc; i += 2) { 2806 const char **args = &argv[i]; 2807 long l; 2808 2809 if (i + 1 == argc) { 2810 warnx("missing argument for \"%s\"", args[0]); 2811 errs++; 2812 break; 2813 } 2814 2815 if (!strcmp(args[0], "type")) { 2816 if (!strcmp(args[1], "packet")) 2817 op.type = SCHED_CLASS_TYPE_PACKET; 2818 else { 2819 warnx("invalid type parameter \"%s\"", args[1]); 2820 errs++; 2821 } 2822 2823 continue; 2824 } 2825 2826 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2827 if(!get_sched_param("minmax", args, &l)) 2828 op.u.config.minmax = (int8_t)l; 2829 else { 2830 warnx("unknown scheduler config parameter " 2831 "\"%s\"", args[0]); 2832 errs++; 2833 } 2834 2835 continue; 2836 } 2837 2838 /* Rest applies only to SUBCMD_PARAMS */ 2839 if (op.subcmd != SCHED_CLASS_SUBCMD_PARAMS) 2840 continue; 2841 2842 if (!strcmp(args[0], "level")) { 2843 if (!strcmp(args[1], "cl-rl")) 2844 op.u.params.level = SCHED_CLASS_LEVEL_CL_RL; 2845 else if (!strcmp(args[1], "cl-wrr")) 2846 op.u.params.level = SCHED_CLASS_LEVEL_CL_WRR; 2847 else if (!strcmp(args[1], "ch-rl")) 2848 op.u.params.level = SCHED_CLASS_LEVEL_CH_RL; 2849 else { 2850 warnx("invalid level parameter \"%s\"", 2851 args[1]); 2852 errs++; 2853 } 2854 } else if (!strcmp(args[0], "mode")) { 2855 if (!strcmp(args[1], "class")) 2856 op.u.params.mode = SCHED_CLASS_MODE_CLASS; 2857 else if (!strcmp(args[1], "flow")) 2858 op.u.params.mode = SCHED_CLASS_MODE_FLOW; 2859 else { 2860 warnx("invalid mode parameter \"%s\"", args[1]); 2861 errs++; 2862 } 2863 } else if (!strcmp(args[0], "rate-unit")) { 2864 if (!strcmp(args[1], "bits")) 2865 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_BITS; 2866 else if (!strcmp(args[1], "pkts")) 2867 op.u.params.rateunit = SCHED_CLASS_RATEUNIT_PKTS; 2868 else { 2869 warnx("invalid rate-unit parameter \"%s\"", 2870 args[1]); 2871 errs++; 2872 } 2873 } else if (!strcmp(args[0], "rate-mode")) { 2874 if (!strcmp(args[1], "relative")) 2875 op.u.params.ratemode = SCHED_CLASS_RATEMODE_REL; 2876 else if (!strcmp(args[1], "absolute")) 2877 op.u.params.ratemode = SCHED_CLASS_RATEMODE_ABS; 2878 else { 2879 warnx("invalid rate-mode parameter \"%s\"", 2880 args[1]); 2881 errs++; 2882 } 2883 } else if (!get_sched_param("channel", args, &l)) 2884 op.u.params.channel = (int8_t)l; 2885 else if (!get_sched_param("class", args, &l)) 2886 op.u.params.cl = (int8_t)l; 2887 else if (!get_sched_param("min-rate", args, &l)) 2888 op.u.params.minrate = (int32_t)l; 2889 else if (!get_sched_param("max-rate", args, &l)) 2890 op.u.params.maxrate = (int32_t)l; 2891 else if (!get_sched_param("weight", args, &l)) 2892 op.u.params.weight = (int16_t)l; 2893 else if (!get_sched_param("pkt-size", args, &l)) 2894 op.u.params.pktsize = (int16_t)l; 2895 else { 2896 warnx("unknown scheduler parameter \"%s\"", args[0]); 2897 errs++; 2898 } 2899 } 2900 2901 /* 2902 * Catch some logical fallacies in terms of argument combinations here 2903 * so we can offer more than just the EINVAL return from the driver. 2904 * The driver will be able to catch a lot more issues since it knows 2905 * the specifics of the device hardware capabilities like how many 2906 * channels, classes, etc. the device supports. 2907 */ 2908 if (op.type < 0) { 2909 warnx("sched \"type\" parameter missing"); 2910 errs++; 2911 } 2912 if (op.subcmd == SCHED_CLASS_SUBCMD_CONFIG) { 2913 if (op.u.config.minmax < 0) { 2914 warnx("sched config \"minmax\" parameter missing"); 2915 errs++; 2916 } 2917 } 2918 if (op.subcmd == SCHED_CLASS_SUBCMD_PARAMS) { 2919 if (op.u.params.level < 0) { 2920 warnx("sched params \"level\" parameter missing"); 2921 errs++; 2922 } 2923 if (op.u.params.mode < 0 && 2924 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2925 warnx("sched params \"mode\" parameter missing"); 2926 errs++; 2927 } 2928 if (op.u.params.rateunit < 0 && 2929 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2930 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2931 warnx("sched params \"rate-unit\" parameter missing"); 2932 errs++; 2933 } 2934 if (op.u.params.ratemode < 0 && 2935 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2936 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2937 warnx("sched params \"rate-mode\" parameter missing"); 2938 errs++; 2939 } 2940 if (op.u.params.channel < 0) { 2941 warnx("sched params \"channel\" missing"); 2942 errs++; 2943 } 2944 if (op.u.params.cl < 0 && 2945 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2946 op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR)) { 2947 warnx("sched params \"class\" missing"); 2948 errs++; 2949 } 2950 if (op.u.params.maxrate < 0 && 2951 (op.u.params.level == SCHED_CLASS_LEVEL_CL_RL || 2952 op.u.params.level == SCHED_CLASS_LEVEL_CH_RL)) { 2953 warnx("sched params \"max-rate\" missing for " 2954 "rate-limit level"); 2955 errs++; 2956 } 2957 if (op.u.params.level == SCHED_CLASS_LEVEL_CL_WRR && 2958 (op.u.params.weight < 1 || op.u.params.weight > 99)) { 2959 warnx("sched params \"weight\" missing or invalid " 2960 "(not 1-99) for weighted-round-robin level"); 2961 errs++; 2962 } 2963 if (op.u.params.pktsize < 0 && 2964 op.u.params.level == SCHED_CLASS_LEVEL_CL_RL) { 2965 warnx("sched params \"pkt-size\" missing for " 2966 "rate-limit level"); 2967 errs++; 2968 } 2969 if (op.u.params.mode == SCHED_CLASS_MODE_FLOW && 2970 op.u.params.ratemode != SCHED_CLASS_RATEMODE_ABS) { 2971 warnx("sched params mode flow needs rate-mode absolute"); 2972 errs++; 2973 } 2974 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_REL && 2975 !in_range(op.u.params.maxrate, 1, 100)) { 2976 warnx("sched params \"max-rate\" takes " 2977 "percentage value(1-100) for rate-mode relative"); 2978 errs++; 2979 } 2980 if (op.u.params.ratemode == SCHED_CLASS_RATEMODE_ABS && 2981 !in_range(op.u.params.maxrate, 1, 100000000)) { 2982 warnx("sched params \"max-rate\" takes " 2983 "value(1-100000000) for rate-mode absolute"); 2984 errs++; 2985 } 2986 if (op.u.params.maxrate > 0 && 2987 op.u.params.maxrate < op.u.params.minrate) { 2988 warnx("sched params \"max-rate\" is less than " 2989 "\"min-rate\""); 2990 errs++; 2991 } 2992 } 2993 2994 if (errs > 0) { 2995 warnx("%d error%s in sched-class command", errs, 2996 errs == 1 ? "" : "s"); 2997 return (EINVAL); 2998 } 2999 3000 return doit(CHELSIO_T4_SCHED_CLASS, &op); 3001} 3002 3003static int 3004sched_queue(int argc, const char *argv[]) 3005{ 3006 struct t4_sched_queue op = {0}; 3007 char *p; 3008 long val; 3009 3010 if (argc != 3) { 3011 /* need "<port> <queue> <class> */ 3012 warnx("incorrect number of arguments."); 3013 return (EINVAL); 3014 } 3015 3016 p = str_to_number(argv[0], &val, NULL); 3017 if (*p || val > UCHAR_MAX) { 3018 warnx("invalid port id \"%s\"", argv[0]); 3019 return (EINVAL); 3020 } 3021 op.port = (uint8_t)val; 3022 3023 if (!strcmp(argv[1], "all") || !strcmp(argv[1], "*")) 3024 op.queue = -1; 3025 else { 3026 p = str_to_number(argv[1], &val, NULL); 3027 if (*p || val < -1) { 3028 warnx("invalid queue \"%s\"", argv[1]); 3029 return (EINVAL); 3030 } 3031 op.queue = (int8_t)val; 3032 } 3033 3034 if (!strcmp(argv[2], "unbind") || !strcmp(argv[2], "clear")) 3035 op.cl = -1; 3036 else { 3037 p = str_to_number(argv[2], &val, NULL); 3038 if (*p || val < -1) { 3039 warnx("invalid class \"%s\"", argv[2]); 3040 return (EINVAL); 3041 } 3042 op.cl = (int8_t)val; 3043 } 3044 3045 return doit(CHELSIO_T4_SCHED_QUEUE, &op); 3046} 3047 3048static int 3049parse_offload_settings_word(const char *s, char **pnext, const char *ws, 3050 int *pneg, struct offload_settings *os) 3051{ 3052 3053 while (*s == '!') { 3054 (*pneg)++; 3055 s++; 3056 } 3057 3058 if (!strcmp(s, "not")) { 3059 (*pneg)++; 3060 return (0); 3061 } 3062 3063 if (!strcmp(s, "offload")) { 3064 os->offload = (*pneg + 1) & 1; 3065 *pneg = 0; 3066 } else if (!strcmp(s , "coalesce")) { 3067 os->rx_coalesce = (*pneg + 1) & 1; 3068 *pneg = 0; 3069 } else if (!strcmp(s, "timestamp") || !strcmp(s, "tstamp")) { 3070 os->tstamp = (*pneg + 1) & 1; 3071 *pneg = 0; 3072 } else if (!strcmp(s, "sack")) { 3073 os->sack = (*pneg + 1) & 1; 3074 *pneg = 0; 3075 } else if (!strcmp(s, "nagle")) { 3076 os->nagle = (*pneg + 1) & 1; 3077 *pneg = 0; 3078 } else if (!strcmp(s, "ecn")) { 3079 os->ecn = (*pneg + 1) & 1; 3080 *pneg = 0; 3081 } else if (!strcmp(s, "ddp")) { 3082 os->ddp = (*pneg + 1) & 1; 3083 *pneg = 0; 3084 } else if (!strcmp(s, "tls")) { 3085 os->tls = (*pneg + 1) & 1; 3086 *pneg = 0; 3087 } else { 3088 char *param, *p; 3089 long val; 3090 3091 /* Settings with additional parameter handled here. */ 3092 3093 if (*pneg) { 3094 warnx("\"%s\" is not a valid keyword, or it does not " 3095 "support negation.", s); 3096 return (EINVAL); 3097 } 3098 3099 while ((param = strsep(pnext, ws)) != NULL) { 3100 if (*param != '\0') 3101 break; 3102 } 3103 if (param == NULL) { 3104 warnx("\"%s\" is not a valid keyword, or it requires a " 3105 "parameter that has not been provided.", s); 3106 return (EINVAL); 3107 } 3108 3109 if (!strcmp(s, "cong")) { 3110 if (!strcmp(param, "reno")) 3111 os->cong_algo = 0; 3112 else if (!strcmp(param, "tahoe")) 3113 os->cong_algo = 1; 3114 else if (!strcmp(param, "newreno")) 3115 os->cong_algo = 2; 3116 else if (!strcmp(param, "highspeed")) 3117 os->cong_algo = 3; 3118 else { 3119 warnx("unknown congestion algorithm \"%s\".", s); 3120 return (EINVAL); 3121 } 3122 } else if (!strcmp(s, "class")) { 3123 val = -1; 3124 p = str_to_number(param, &val, NULL); 3125 /* (nsched_cls - 1) is spelled 15 here. */ 3126 if (*p || val < 0 || val > 15) { 3127 warnx("invalid scheduling class \"%s\". " 3128 "\"class\" needs an integer value where " 3129 "0 <= value <= 15", param); 3130 return (EINVAL); 3131 } 3132 os->sched_class = val; 3133 } else if (!strcmp(s, "bind") || !strcmp(s, "txq") || 3134 !strcmp(s, "rxq")) { 3135 val = -1; 3136 if (strcmp(param, "random")) { 3137 p = str_to_number(param, &val, NULL); 3138 if (*p || val < 0 || val > 0xffff) { 3139 warnx("invalid queue specification " 3140 "\"%s\". \"%s\" needs an integer" 3141 " value, or \"random\".", 3142 param, s); 3143 return (EINVAL); 3144 } 3145 } 3146 if (!strcmp(s, "bind")) { 3147 os->txq = val; 3148 os->rxq = val; 3149 } else if (!strcmp(s, "txq")) { 3150 os->txq = val; 3151 } else if (!strcmp(s, "rxq")) { 3152 os->rxq = val; 3153 } else { 3154 return (EDOOFUS); 3155 } 3156 } else if (!strcmp(s, "mss")) { 3157 val = -1; 3158 p = str_to_number(param, &val, NULL); 3159 if (*p || val <= 0) { 3160 warnx("invalid MSS specification \"%s\". " 3161 "\"mss\" needs a positive integer value", 3162 param); 3163 return (EINVAL); 3164 } 3165 os->mss = val; 3166 } else { 3167 warnx("unknown settings keyword: \"%s\"", s); 3168 return (EINVAL); 3169 } 3170 } 3171 3172 return (0); 3173} 3174 3175static int 3176parse_offload_settings(const char *settings_ro, struct offload_settings *os) 3177{ 3178 const char *ws = " \f\n\r\v\t"; 3179 char *settings, *s, *next; 3180 int rc, nsettings, neg; 3181 static const struct offload_settings default_settings = { 3182 .offload = 0, /* No settings imply !offload */ 3183 .rx_coalesce = -1, 3184 .cong_algo = -1, 3185 .sched_class = -1, 3186 .tstamp = -1, 3187 .sack = -1, 3188 .nagle = -1, 3189 .ecn = -1, 3190 .ddp = -1, 3191 .tls = -1, 3192 .txq = -1, 3193 .rxq = -1, 3194 .mss = -1, 3195 }; 3196 3197 *os = default_settings; 3198 3199 next = settings = strdup(settings_ro); 3200 if (settings == NULL) { 3201 warn (NULL); 3202 return (errno); 3203 } 3204 3205 nsettings = 0; 3206 rc = 0; 3207 neg = 0; 3208 while ((s = strsep(&next, ws)) != NULL) { 3209 if (*s == '\0') 3210 continue; 3211 nsettings++; 3212 rc = parse_offload_settings_word(s, &next, ws, &neg, os); 3213 if (rc != 0) 3214 goto done; 3215 } 3216 if (nsettings == 0) { 3217 warnx("no settings provided"); 3218 rc = EINVAL; 3219 goto done; 3220 } 3221 if (neg > 0) { 3222 warnx("%d stray negation(s) at end of offload settings", neg); 3223 rc = EINVAL; 3224 goto done; 3225 } 3226done: 3227 free(settings); 3228 return (rc); 3229} 3230 3231static int 3232isempty_line(char *line, size_t llen) 3233{ 3234 3235 /* skip leading whitespace */ 3236 while (isspace(*line)) { 3237 line++; 3238 llen--; 3239 } 3240 if (llen == 0 || *line == '#' || *line == '\n') 3241 return (1); 3242 3243 return (0); 3244} 3245 3246static int 3247special_offload_rule(char *str) 3248{ 3249 3250 /* skip leading whitespaces */ 3251 while (isspace(*str)) 3252 str++; 3253 3254 /* check for special strings: "-", "all", "any" */ 3255 if (*str == '-') { 3256 str++; 3257 } else if (!strncmp(str, "all", 3) || !strncmp(str, "any", 3)) { 3258 str += 3; 3259 } else { 3260 return (0); 3261 } 3262 3263 /* skip trailing whitespaces */ 3264 while (isspace(*str)) 3265 str++; 3266 3267 return (*str == '\0'); 3268} 3269 3270/* 3271 * A rule has 3 parts: an open-type, a match expression, and offload settings. 3272 * 3273 * [<open-type>] <expr> => <settings> 3274 */ 3275static int 3276parse_offload_policy_line(size_t lno, char *line, size_t llen, pcap_t *pd, 3277 struct offload_rule *r) 3278{ 3279 char *expr, *settings, *s; 3280 3281 bzero(r, sizeof(*r)); 3282 3283 /* Skip leading whitespace. */ 3284 while (isspace(*line)) 3285 line++; 3286 /* Trim trailing whitespace */ 3287 s = &line[llen - 1]; 3288 while (isspace(*s)) { 3289 *s-- = '\0'; 3290 llen--; 3291 } 3292 3293 /* 3294 * First part of the rule: '[X]' where X = A/D/L/P 3295 */ 3296 if (*line++ != '[') { 3297 warnx("missing \"[\" on line %zd", lno); 3298 return (EINVAL); 3299 } 3300 switch (*line) { 3301 case 'A': 3302 case 'D': 3303 case 'L': 3304 case 'P': 3305 r->open_type = *line; 3306 break; 3307 default: 3308 warnx("invalid socket-type \"%c\" on line %zd.", *line, lno); 3309 return (EINVAL); 3310 } 3311 line++; 3312 if (*line++ != ']') { 3313 warnx("missing \"]\" after \"[%c\" on line %zd", 3314 r->open_type, lno); 3315 return (EINVAL); 3316 } 3317 3318 /* Skip whitespace. */ 3319 while (isspace(*line)) 3320 line++; 3321 3322 /* 3323 * Rest of the rule: <expr> => <settings> 3324 */ 3325 expr = line; 3326 s = strstr(line, "=>"); 3327 if (s == NULL) 3328 return (EINVAL); 3329 settings = s + 2; 3330 while (isspace(*settings)) 3331 settings++; 3332 *s = '\0'; 3333 3334 /* 3335 * <expr> is either a special name (all, any) or a pcap-filter(7). 3336 * In case of a special name the bpf_prog stays all-zero. 3337 */ 3338 if (!special_offload_rule(expr)) { 3339 if (pcap_compile(pd, &r->bpf_prog, expr, 1, 3340 PCAP_NETMASK_UNKNOWN) < 0) { 3341 warnx("failed to compile \"%s\" on line %zd: %s", expr, 3342 lno, pcap_geterr(pd)); 3343 return (EINVAL); 3344 } 3345 } 3346 3347 /* settings to apply on a match. */ 3348 if (parse_offload_settings(settings, &r->settings) != 0) { 3349 warnx("failed to parse offload settings \"%s\" on line %zd", 3350 settings, lno); 3351 pcap_freecode(&r->bpf_prog); 3352 return (EINVAL); 3353 } 3354 3355 return (0); 3356 3357} 3358 3359/* 3360 * Note that op itself is not dynamically allocated. 3361 */ 3362static void 3363free_offload_policy(struct t4_offload_policy *op) 3364{ 3365 int i; 3366 3367 for (i = 0; i < op->nrules; i++) { 3368 /* 3369 * pcap_freecode can cope with empty bpf_prog, which is the case 3370 * for an rule that matches on 'any/all/-'. 3371 */ 3372 pcap_freecode(&op->rule[i].bpf_prog); 3373 } 3374 free(op->rule); 3375 op->nrules = 0; 3376 op->rule = NULL; 3377} 3378 3379#define REALLOC_STRIDE 32 3380 3381/* 3382 * Fills up op->nrules and op->rule. 3383 */ 3384static int 3385parse_offload_policy(const char *fname, struct t4_offload_policy *op) 3386{ 3387 FILE *fp; 3388 char *line; 3389 int lno, maxrules, rc; 3390 size_t lcap, llen; 3391 struct offload_rule *r; 3392 pcap_t *pd; 3393 3394 fp = fopen(fname, "r"); 3395 if (fp == NULL) { 3396 warn("Unable to open file \"%s\"", fname); 3397 return (errno); 3398 } 3399 pd = pcap_open_dead(DLT_EN10MB, 128); 3400 if (pd == NULL) { 3401 warnx("Failed to open pcap device"); 3402 fclose(fp); 3403 return (EIO); 3404 } 3405 3406 rc = 0; 3407 lno = 0; 3408 lcap = 0; 3409 maxrules = 0; 3410 op->nrules = 0; 3411 op->rule = NULL; 3412 line = NULL; 3413 3414 while ((llen = getline(&line, &lcap, fp)) != -1) { 3415 lno++; 3416 3417 /* Skip empty lines. */ 3418 if (isempty_line(line, llen)) 3419 continue; 3420 3421 if (op->nrules == maxrules) { 3422 maxrules += REALLOC_STRIDE; 3423 r = realloc(op->rule, 3424 maxrules * sizeof(struct offload_rule)); 3425 if (r == NULL) { 3426 warnx("failed to allocate memory for %d rules", 3427 maxrules); 3428 rc = ENOMEM; 3429 goto done; 3430 } 3431 op->rule = r; 3432 } 3433 3434 r = &op->rule[op->nrules]; 3435 rc = parse_offload_policy_line(lno, line, llen, pd, r); 3436 if (rc != 0) { 3437 warnx("Error parsing line %d of \"%s\"", lno, fname); 3438 goto done; 3439 } 3440 3441 op->nrules++; 3442 } 3443 free(line); 3444 3445 if (!feof(fp)) { 3446 warn("Error while reading from file \"%s\" at line %d", 3447 fname, lno); 3448 rc = errno; 3449 goto done; 3450 } 3451 3452 if (op->nrules == 0) { 3453 warnx("No valid rules found in \"%s\"", fname); 3454 rc = EINVAL; 3455 } 3456done: 3457 pcap_close(pd); 3458 fclose(fp); 3459 if (rc != 0) { 3460 free_offload_policy(op); 3461 } 3462 3463 return (rc); 3464} 3465 3466static int 3467load_offload_policy(int argc, const char *argv[]) 3468{ 3469 int rc = 0; 3470 const char *fname = argv[0]; 3471 struct t4_offload_policy op = {0}; 3472 3473 if (argc != 1) { 3474 warnx("incorrect number of arguments."); 3475 return (EINVAL); 3476 } 3477 3478 if (!strcmp(fname, "clear") || !strcmp(fname, "none")) { 3479 /* op.nrules is 0 and that means clear policy */ 3480 return (doit(CHELSIO_T4_SET_OFLD_POLICY, &op)); 3481 } 3482 3483 rc = parse_offload_policy(fname, &op); 3484 if (rc != 0) { 3485 /* Error message displayed already */ 3486 return (EINVAL); 3487 } 3488 3489 rc = doit(CHELSIO_T4_SET_OFLD_POLICY, &op); 3490 free_offload_policy(&op); 3491 3492 return (rc); 3493} 3494 3495static int 3496run_cmd(int argc, const char *argv[]) 3497{ 3498 int rc = -1; 3499 const char *cmd = argv[0]; 3500 3501 /* command */ 3502 argc--; 3503 argv++; 3504 3505 if (!strcmp(cmd, "reg") || !strcmp(cmd, "reg32")) 3506 rc = register_io(argc, argv, 4); 3507 else if (!strcmp(cmd, "reg64")) 3508 rc = register_io(argc, argv, 8); 3509 else if (!strcmp(cmd, "regdump")) 3510 rc = dump_regs(argc, argv); 3511 else if (!strcmp(cmd, "filter")) 3512 rc = filter_cmd(argc, argv, 0); 3513 else if (!strcmp(cmd, "context")) 3514 rc = get_sge_context(argc, argv); 3515 else if (!strcmp(cmd, "loadfw")) 3516 rc = loadfw(argc, argv); 3517 else if (!strcmp(cmd, "memdump")) 3518 rc = memdump(argc, argv); 3519 else if (!strcmp(cmd, "tcb")) 3520 rc = read_tcb(argc, argv); 3521 else if (!strcmp(cmd, "i2c")) 3522 rc = read_i2c(argc, argv); 3523 else if (!strcmp(cmd, "clearstats")) 3524 rc = clearstats(argc, argv); 3525 else if (!strcmp(cmd, "tracer")) 3526 rc = tracer_cmd(argc, argv); 3527 else if (!strcmp(cmd, "modinfo")) 3528 rc = modinfo(argc, argv); 3529 else if (!strcmp(cmd, "sched-class")) 3530 rc = sched_class(argc, argv); 3531 else if (!strcmp(cmd, "sched-queue")) 3532 rc = sched_queue(argc, argv); 3533 else if (!strcmp(cmd, "loadcfg")) 3534 rc = loadcfg(argc, argv); 3535 else if (!strcmp(cmd, "loadboot")) 3536 rc = loadboot(argc, argv); 3537 else if (!strcmp(cmd, "loadboot-cfg")) 3538 rc = loadbootcfg(argc, argv); 3539 else if (!strcmp(cmd, "dumpstate")) 3540 rc = dumpstate(argc, argv); 3541 else if (!strcmp(cmd, "policy")) 3542 rc = load_offload_policy(argc, argv); 3543 else if (!strcmp(cmd, "hashfilter")) 3544 rc = filter_cmd(argc, argv, 1); 3545 else { 3546 rc = EINVAL; 3547 warnx("invalid command \"%s\"", cmd); 3548 } 3549 3550 return (rc); 3551} 3552 3553#define MAX_ARGS 15 3554static int 3555run_cmd_loop(void) 3556{ 3557 int i, rc = 0; 3558 char buffer[128], *buf; 3559 const char *args[MAX_ARGS + 1]; 3560 3561 /* 3562 * Simple loop: displays a "> " prompt and processes any input as a 3563 * cxgbetool command. You're supposed to enter only the part after 3564 * "cxgbetool t4nexX". Use "quit" or "exit" to exit. 3565 */ 3566 for (;;) { 3567 fprintf(stdout, "> "); 3568 fflush(stdout); 3569 buf = fgets(buffer, sizeof(buffer), stdin); 3570 if (buf == NULL) { 3571 if (ferror(stdin)) { 3572 warn("stdin error"); 3573 rc = errno; /* errno from fgets */ 3574 } 3575 break; 3576 } 3577 3578 i = 0; 3579 while ((args[i] = strsep(&buf, " \t\n")) != NULL) { 3580 if (args[i][0] != 0 && ++i == MAX_ARGS) 3581 break; 3582 } 3583 args[i] = 0; 3584 3585 if (i == 0) 3586 continue; /* skip empty line */ 3587 3588 if (!strcmp(args[0], "quit") || !strcmp(args[0], "exit")) 3589 break; 3590 3591 rc = run_cmd(i, args); 3592 } 3593 3594 /* rc normally comes from the last command (not including quit/exit) */ 3595 return (rc); 3596} 3597 3598int 3599main(int argc, const char *argv[]) 3600{ 3601 int rc = -1; 3602 3603 progname = argv[0]; 3604 3605 if (argc == 2) { 3606 if (!strcmp(argv[1], "-h") || !strcmp(argv[1], "--help")) { 3607 usage(stdout); 3608 exit(0); 3609 } 3610 } 3611 3612 if (argc < 3) { 3613 usage(stderr); 3614 exit(EINVAL); 3615 } 3616 3617 nexus = argv[1]; 3618 chip_id = nexus[1] - '0'; 3619 3620 /* progname and nexus */ 3621 argc -= 2; 3622 argv += 2; 3623 3624 if (argc == 1 && !strcmp(argv[0], "stdio")) 3625 rc = run_cmd_loop(); 3626 else 3627 rc = run_cmd(argc, argv); 3628 3629 return (rc); 3630} 3631