1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright 2003 by Peter Grehan. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 *    notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 *    notice, this list of conditions and the following disclaimer in the
13 *    documentation and/or other materials provided with the distribution.
14 * 3. The name of the author may not be used to endorse or promote products
15 *    derived from this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 * SUCH DAMAGE.
28 *
29 * $FreeBSD$
30 */
31
32/*
33 * A driver for the PIC found in the Heathrow/Paddington MacIO chips.
34 * This was superseded by an OpenPIC in the Keylargo and beyond
35 * MacIO versions.
36 */
37
38#include <sys/param.h>
39#include <sys/systm.h>
40#include <sys/module.h>
41#include <sys/bus.h>
42#include <sys/conf.h>
43#include <sys/kernel.h>
44#include <sys/rman.h>
45
46#include <dev/ofw/ofw_bus.h>
47#include <dev/ofw/openfirm.h>
48
49#include <machine/bus.h>
50#include <machine/intr_machdep.h>
51#include <machine/md_var.h>
52#include <machine/pio.h>
53#include <machine/resource.h>
54
55#include <vm/vm.h>
56#include <vm/pmap.h>
57
58#include <powerpc/powermac/hrowpicvar.h>
59
60#include "pic_if.h"
61
62/*
63 * MacIO interface
64 */
65static int	hrowpic_probe(device_t);
66static int	hrowpic_attach(device_t);
67
68static void	hrowpic_dispatch(device_t, struct trapframe *);
69static void	hrowpic_enable(device_t, u_int, u_int);
70static void	hrowpic_eoi(device_t, u_int);
71static void	hrowpic_ipi(device_t, u_int);
72static void	hrowpic_mask(device_t, u_int);
73static void	hrowpic_unmask(device_t, u_int);
74
75static device_method_t  hrowpic_methods[] = {
76	/* Device interface */
77	DEVMETHOD(device_probe,         hrowpic_probe),
78	DEVMETHOD(device_attach,        hrowpic_attach),
79
80	/* PIC interface */
81	DEVMETHOD(pic_dispatch,		hrowpic_dispatch),
82	DEVMETHOD(pic_enable,		hrowpic_enable),
83	DEVMETHOD(pic_eoi,		hrowpic_eoi),
84	DEVMETHOD(pic_ipi,		hrowpic_ipi),
85	DEVMETHOD(pic_mask,		hrowpic_mask),
86	DEVMETHOD(pic_unmask,		hrowpic_unmask),
87
88	{ 0, 0 },
89};
90
91static driver_t hrowpic_driver = {
92	"hrowpic",
93	hrowpic_methods,
94	sizeof(struct hrowpic_softc)
95};
96
97static devclass_t hrowpic_devclass;
98
99DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0);
100
101static uint32_t
102hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank)
103{
104	if (bank == HPIC_PRIMARY)
105		reg += HPIC_1ST_OFFSET;
106
107	return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
108}
109
110static void
111hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank,
112    uint32_t val)
113{
114
115	if (bank == HPIC_PRIMARY)
116		reg += HPIC_1ST_OFFSET;
117
118	bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
119
120	/* XXX Issue a read to force the write to complete. */
121	bus_space_read_4(sc->sc_bt, sc->sc_bh, reg);
122}
123
124static int
125hrowpic_probe(device_t dev)
126{
127	const char *type = ofw_bus_get_type(dev);
128
129	/*
130	 * OpenPIC cells have a type of "open-pic", so this
131	 * is sufficient to identify a Heathrow cell
132	 */
133	if (strcmp(type, "interrupt-controller") != 0)
134		return (ENXIO);
135
136	/*
137	 * The description was already printed out in the nexus
138	 * probe, so don't do it again here
139	 */
140	device_set_desc(dev, "Heathrow MacIO interrupt controller");
141	return (0);
142}
143
144static int
145hrowpic_attach(device_t dev)
146{
147	struct hrowpic_softc *sc;
148
149	sc = device_get_softc(dev);
150	sc->sc_dev = dev;
151
152	sc->sc_rrid = 0;
153	sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid,
154	    RF_ACTIVE);
155
156	if (sc->sc_rres == NULL) {
157		device_printf(dev, "Could not alloc mem resource!\n");
158		return (ENXIO);
159	}
160
161	sc->sc_bt = rman_get_bustag(sc->sc_rres);
162	sc->sc_bh = rman_get_bushandle(sc->sc_rres);
163
164	/*
165	 * Disable all interrupt sources and clear outstanding interrupts
166	 */
167	hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0);
168	hrowpic_write_reg(sc, HPIC_CLEAR,  HPIC_PRIMARY, 0xffffffff);
169	hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0);
170	hrowpic_write_reg(sc, HPIC_CLEAR,  HPIC_SECONDARY, 0xffffffff);
171
172	powerpc_register_pic(dev, ofw_bus_get_node(dev), 64, 0, FALSE);
173	return (0);
174}
175
176/*
177 * Local routines
178 */
179
180static void
181hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable)
182{
183	u_int roffset;
184	u_int rbit;
185
186	KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range"));
187
188	/*
189	 * Humor the SMP layer if it wants to set up an IPI handler.
190	 */
191	if (irq == HROWPIC_IRQMAX)
192		return;
193
194	/*
195	 * Calculate prim/sec register bank for the IRQ, update soft copy,
196	 * and enable the IRQ as an interrupt source
197	 */
198	roffset = HPIC_INT_TO_BANK(irq);
199	rbit = HPIC_INT_TO_REGBIT(irq);
200
201	if (enable)
202		sc->sc_softreg[roffset] |= (1 << rbit);
203	else
204		sc->sc_softreg[roffset] &= ~(1 << rbit);
205
206	hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]);
207}
208
209/*
210 * PIC I/F methods.
211 */
212
213static void
214hrowpic_dispatch(device_t dev, struct trapframe *tf)
215{
216	struct hrowpic_softc *sc;
217	uint64_t mask;
218	uint32_t reg;
219	u_int irq;
220
221	sc = device_get_softc(dev);
222	while (1) {
223		mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY);
224		reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY);
225		mask = (mask << 32) | reg;
226		if (mask == 0)
227			break;
228
229		irq = 0;
230		while (irq < HROWPIC_IRQMAX) {
231			if (mask & 1)
232				powerpc_dispatch_intr(sc->sc_vector[irq], tf);
233			mask >>= 1;
234			irq++;
235		}
236	}
237}
238
239static void
240hrowpic_enable(device_t dev, u_int irq, u_int vector)
241{
242	struct hrowpic_softc *sc;
243
244	sc = device_get_softc(dev);
245	sc->sc_vector[irq] = vector;
246	hrowpic_toggle_irq(sc, irq, 1);
247}
248
249static void
250hrowpic_eoi(device_t dev, u_int irq)
251{
252	struct hrowpic_softc *sc;
253	int bank;
254
255	sc = device_get_softc(dev);
256	bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ;
257	hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f));
258}
259
260static void
261hrowpic_ipi(device_t dev, u_int irq)
262{
263	/* No SMP support. */
264}
265
266static void
267hrowpic_mask(device_t dev, u_int irq)
268{
269	struct hrowpic_softc *sc;
270
271	sc = device_get_softc(dev);
272	hrowpic_toggle_irq(sc, irq, 0);
273}
274
275static void
276hrowpic_unmask(device_t dev, u_int irq)
277{
278	struct hrowpic_softc *sc;
279
280	sc = device_get_softc(dev);
281	hrowpic_toggle_irq(sc, irq, 1);
282}
283