1/*-
2 * Copyright (C) 2006-2012 Semihalf
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
17 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
19 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
20 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
21 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
22 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
23 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24 */
25/*-
26 * Copyright (C) 2001 Benno Rice
27 * All rights reserved.
28 *
29 * Redistribution and use in source and binary forms, with or without
30 * modification, are permitted provided that the following conditions
31 * are met:
32 * 1. Redistributions of source code must retain the above copyright
33 *    notice, this list of conditions and the following disclaimer.
34 * 2. Redistributions in binary form must reproduce the above copyright
35 *    notice, this list of conditions and the following disclaimer in the
36 *    documentation and/or other materials provided with the distribution.
37 *
38 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
39 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
40 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
41 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
43 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
44 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
45 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
46 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
47 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 * $NetBSD: machdep.c,v 1.74.2.1 2000/11/01 16:13:48 tv Exp $
49 */
50/*-
51 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
52 * Copyright (C) 1995, 1996 TooLs GmbH.
53 * All rights reserved.
54 *
55 * Redistribution and use in source and binary forms, with or without
56 * modification, are permitted provided that the following conditions
57 * are met:
58 * 1. Redistributions of source code must retain the above copyright
59 *    notice, this list of conditions and the following disclaimer.
60 * 2. Redistributions in binary form must reproduce the above copyright
61 *    notice, this list of conditions and the following disclaimer in the
62 *    documentation and/or other materials provided with the distribution.
63 * 3. All advertising materials mentioning features or use of this software
64 *    must display the following acknowledgement:
65 *      This product includes software developed by TooLs GmbH.
66 * 4. The name of TooLs GmbH may not be used to endorse or promote products
67 *    derived from this software without specific prior written permission.
68 *
69 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
72 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
73 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
74 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
75 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
76 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
77 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
78 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
79 */
80
81#include <sys/cdefs.h>
82__FBSDID("$FreeBSD$");
83
84#include "opt_ddb.h"
85#include "opt_hwpmc_hooks.h"
86#include "opt_kstack_pages.h"
87#include "opt_platform.h"
88
89#include <sys/cdefs.h>
90#include <sys/types.h>
91#include <sys/param.h>
92#include <sys/proc.h>
93#include <sys/systm.h>
94#include <sys/time.h>
95#include <sys/bio.h>
96#include <sys/buf.h>
97#include <sys/bus.h>
98#include <sys/cons.h>
99#include <sys/cpu.h>
100#include <sys/kdb.h>
101#include <sys/kernel.h>
102#include <sys/lock.h>
103#include <sys/mutex.h>
104#include <sys/rwlock.h>
105#include <sys/sysctl.h>
106#include <sys/exec.h>
107#include <sys/ktr.h>
108#include <sys/syscallsubr.h>
109#include <sys/sysproto.h>
110#include <sys/signalvar.h>
111#include <sys/sysent.h>
112#include <sys/imgact.h>
113#include <sys/msgbuf.h>
114#include <sys/ptrace.h>
115
116#include <vm/vm.h>
117#include <vm/pmap.h>
118#include <vm/vm_page.h>
119#include <vm/vm_object.h>
120#include <vm/vm_pager.h>
121
122#include <machine/cpu.h>
123#include <machine/kdb.h>
124#include <machine/reg.h>
125#include <machine/vmparam.h>
126#include <machine/spr.h>
127#include <machine/hid.h>
128#include <machine/psl.h>
129#include <machine/trap.h>
130#include <machine/md_var.h>
131#include <machine/mmuvar.h>
132#include <machine/sigframe.h>
133#include <machine/machdep.h>
134#include <machine/metadata.h>
135#include <machine/platform.h>
136
137#include <sys/linker.h>
138#include <sys/reboot.h>
139
140#include <contrib/libfdt/libfdt.h>
141#include <dev/fdt/fdt_common.h>
142#include <dev/ofw/openfirm.h>
143
144#ifdef DDB
145#include <ddb/ddb.h>
146#endif
147
148#ifdef  DEBUG
149#define debugf(fmt, args...) printf(fmt, ##args)
150#else
151#define debugf(fmt, args...)
152#endif
153
154extern unsigned char _etext[];
155extern unsigned char _edata[];
156extern unsigned char __bss_start[];
157extern unsigned char __sbss_start[];
158extern unsigned char __sbss_end[];
159extern unsigned char _end[];
160extern vm_offset_t __endkernel;
161extern vm_paddr_t kernload;
162
163/*
164 * Bootinfo is passed to us by legacy loaders. Save the address of the
165 * structure to handle backward compatibility.
166 */
167uint32_t *bootinfo;
168
169void print_kernel_section_addr(void);
170void print_kenv(void);
171uintptr_t booke_init(u_long, u_long);
172void ivor_setup(void);
173
174extern void *interrupt_vector_base;
175extern void *int_critical_input;
176extern void *int_machine_check;
177extern void *int_data_storage;
178extern void *int_instr_storage;
179extern void *int_external_input;
180extern void *int_alignment;
181extern void *int_fpu;
182extern void *int_program;
183extern void *int_syscall;
184extern void *int_decrementer;
185extern void *int_fixed_interval_timer;
186extern void *int_watchdog;
187extern void *int_data_tlb_error;
188extern void *int_inst_tlb_error;
189extern void *int_debug;
190extern void *int_debug_ed;
191extern void *int_vec;
192extern void *int_vecast;
193#ifdef __SPE__
194extern void *int_spe_fpdata;
195extern void *int_spe_fpround;
196#endif
197#ifdef HWPMC_HOOKS
198extern void *int_performance_counter;
199#endif
200
201#define SET_TRAP(ivor, handler) \
202	KASSERT(((uintptr_t)(&handler) & ~0xffffUL) == \
203	    ((uintptr_t)(&interrupt_vector_base) & ~0xffffUL), \
204	    ("Handler " #handler " too far from interrupt vector base")); \
205	mtspr(ivor, (uintptr_t)(&handler) & 0xffffUL);
206
207uintptr_t powerpc_init(vm_offset_t fdt, vm_offset_t, vm_offset_t, void *mdp,
208    uint32_t mdp_cookie);
209void booke_cpu_init(void);
210
211void
212booke_cpu_init(void)
213{
214
215	cpu_features |= PPC_FEATURE_BOOKE;
216
217	psl_kernset = PSL_CE | PSL_ME | PSL_EE;
218#ifdef __powerpc64__
219	psl_kernset |= PSL_CM;
220#endif
221	psl_userset = psl_kernset | PSL_PR;
222#ifdef __powerpc64__
223	psl_userset32 = psl_userset & ~PSL_CM;
224#endif
225	psl_userstatic = ~(PSL_VEC | PSL_FP | PSL_FE0 | PSL_FE1);
226
227	pmap_mmu_install(MMU_TYPE_BOOKE, BUS_PROBE_GENERIC);
228}
229
230void
231ivor_setup(void)
232{
233
234	mtspr(SPR_IVPR, ((uintptr_t)&interrupt_vector_base) & ~0xffffUL);
235
236	SET_TRAP(SPR_IVOR0, int_critical_input);
237	SET_TRAP(SPR_IVOR1, int_machine_check);
238	SET_TRAP(SPR_IVOR2, int_data_storage);
239	SET_TRAP(SPR_IVOR3, int_instr_storage);
240	SET_TRAP(SPR_IVOR4, int_external_input);
241	SET_TRAP(SPR_IVOR5, int_alignment);
242	SET_TRAP(SPR_IVOR6, int_program);
243	SET_TRAP(SPR_IVOR8, int_syscall);
244	SET_TRAP(SPR_IVOR10, int_decrementer);
245	SET_TRAP(SPR_IVOR11, int_fixed_interval_timer);
246	SET_TRAP(SPR_IVOR12, int_watchdog);
247	SET_TRAP(SPR_IVOR13, int_data_tlb_error);
248	SET_TRAP(SPR_IVOR14, int_inst_tlb_error);
249	SET_TRAP(SPR_IVOR15, int_debug);
250#ifdef HWPMC_HOOKS
251	SET_TRAP(SPR_IVOR35, int_performance_counter);
252#endif
253	switch ((mfpvr() >> 16) & 0xffff) {
254	case FSL_E6500:
255		SET_TRAP(SPR_IVOR32, int_vec);
256		SET_TRAP(SPR_IVOR33, int_vecast);
257		/* FALLTHROUGH */
258	case FSL_E500mc:
259	case FSL_E5500:
260		SET_TRAP(SPR_IVOR7, int_fpu);
261		SET_TRAP(SPR_IVOR15, int_debug_ed);
262		break;
263	case FSL_E500v1:
264	case FSL_E500v2:
265		SET_TRAP(SPR_IVOR32, int_vec);
266#ifdef __SPE__
267		SET_TRAP(SPR_IVOR33, int_spe_fpdata);
268		SET_TRAP(SPR_IVOR34, int_spe_fpround);
269#endif
270		break;
271	}
272
273#ifdef __powerpc64__
274	/* Set 64-bit interrupt mode. */
275	mtspr(SPR_EPCR, mfspr(SPR_EPCR) | EPCR_ICM);
276#endif
277}
278
279static int
280booke_check_for_fdt(uint32_t arg1, vm_offset_t *dtbp)
281{
282	void *ptr;
283	int fdt_size;
284
285	if (arg1 % 8 != 0)
286		return (-1);
287
288	ptr = (void *)pmap_early_io_map(arg1, PAGE_SIZE);
289	if (fdt_check_header(ptr) != 0)
290		return (-1);
291
292	/*
293	 * Read FDT total size from the header of FDT.
294	 * This for sure hits within first page which is
295	 * already mapped.
296	 */
297	fdt_size = fdt_totalsize((void *)ptr);
298
299	/*
300	 * Ok, arg1 points to FDT, so we need to map it in.
301	 * First, unmap this page and then map FDT again with full size
302	 */
303	pmap_early_io_unmap((vm_offset_t)ptr, PAGE_SIZE);
304	ptr = (void *)pmap_early_io_map(arg1, fdt_size);
305	*dtbp = (vm_offset_t)ptr;
306
307	return (0);
308}
309
310uintptr_t
311booke_init(u_long arg1, u_long arg2)
312{
313	uintptr_t ret;
314	void *mdp;
315	vm_offset_t dtbp, end;
316
317	end = (uintptr_t)_end;
318	dtbp = (vm_offset_t)NULL;
319
320	/* Set up TLB initially */
321	bootinfo = NULL;
322	bzero(__sbss_start, __sbss_end - __sbss_start);
323	bzero(__bss_start, _end - __bss_start);
324	tlb1_init();
325
326	/*
327	 * Handle the various ways we can get loaded and started:
328	 *  -	FreeBSD's loader passes the pointer to the metadata
329	 *	in arg1, with arg2 undefined. arg1 has a value that's
330	 *	relative to the kernel's link address (i.e. larger
331	 *	than 0xc0000000).
332	 *  -	Juniper's loader passes the metadata pointer in arg2
333	 *	and sets arg1 to zero. This is to signal that the
334	 *	loader maps the kernel and starts it at its link
335	 *	address (unlike the FreeBSD loader).
336	 *  -	U-Boot passes the standard argc and argv parameters
337	 *	in arg1 and arg2 (resp). arg1 is between 1 and some
338	 *	relatively small number, such as 64K. arg2 is the
339	 *	physical address of the argv vector.
340	 *  -   ePAPR loaders pass an FDT blob in r3 (arg1) and the magic hex
341	 *      string 0x45504150 ('EPAP') in r6 (which has been lost by now).
342	 *      r4 (arg2) is supposed to be set to zero, but is not always.
343	 */
344
345	if (arg1 == 0)				/* Juniper loader */
346		mdp = (void *)arg2;
347	else if (booke_check_for_fdt(arg1, &dtbp) == 0) { /* ePAPR */
348		end = roundup(end, 8);
349		memmove((void *)end, (void *)dtbp, fdt_totalsize((void *)dtbp));
350		dtbp = end;
351		end += fdt_totalsize((void *)dtbp);
352		__endkernel = end;
353		mdp = NULL;
354	} else if (arg1 > (uintptr_t)kernload)	/* FreeBSD loader */
355		mdp = (void *)arg1;
356	else					/* U-Boot */
357		mdp = NULL;
358
359	/* Default to 32 byte cache line size. */
360	switch ((mfpvr()) >> 16) {
361	case FSL_E500mc:
362	case FSL_E5500:
363	case FSL_E6500:
364		cacheline_size = 64;
365		break;
366	}
367
368	/*
369	 * Last element is a magic cookie that indicates that the metadata
370	 * pointer is meaningful.
371	 */
372	ret = powerpc_init(dtbp, 0, 0, mdp, (mdp == NULL) ? 0 : 0xfb5d104d);
373
374	/* Enable caches */
375	booke_enable_l1_cache();
376	booke_enable_l2_cache();
377
378	booke_enable_bpred();
379
380	return (ret);
381}
382
383#define RES_GRANULE cacheline_size
384extern uintptr_t tlb0_miss_locks[];
385
386/* Initialise a struct pcpu. */
387void
388cpu_pcpu_init(struct pcpu *pcpu, int cpuid, size_t sz)
389{
390
391	pcpu->pc_booke.tid_next = TID_MIN;
392
393#ifdef SMP
394	uintptr_t *ptr;
395	int words_per_gran = RES_GRANULE / sizeof(uintptr_t);
396
397	ptr = &tlb0_miss_locks[cpuid * words_per_gran];
398	pcpu->pc_booke.tlb_lock = ptr;
399	*ptr = TLB_UNLOCKED;
400	*(ptr + 1) = 0;		/* recurse counter */
401#endif
402}
403
404/* Shutdown the CPU as much as possible. */
405void
406cpu_halt(void)
407{
408
409	mtmsr(mfmsr() & ~(PSL_CE | PSL_EE | PSL_ME | PSL_DE));
410	while (1)
411		;
412}
413
414int
415ptrace_single_step(struct thread *td)
416{
417	struct trapframe *tf;
418
419	tf = td->td_frame;
420	tf->srr1 |= PSL_DE;
421	tf->cpu.booke.dbcr0 |= (DBCR0_IDM | DBCR0_IC);
422	return (0);
423}
424
425int
426ptrace_clear_single_step(struct thread *td)
427{
428	struct trapframe *tf;
429
430	tf = td->td_frame;
431	tf->srr1 &= ~PSL_DE;
432	tf->cpu.booke.dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
433	return (0);
434}
435
436void
437kdb_cpu_clear_singlestep(void)
438{
439	register_t r;
440
441	r = mfspr(SPR_DBCR0);
442	mtspr(SPR_DBCR0, r & ~DBCR0_IC);
443	kdb_frame->srr1 &= ~PSL_DE;
444}
445
446void
447kdb_cpu_set_singlestep(void)
448{
449	register_t r;
450
451	r = mfspr(SPR_DBCR0);
452	mtspr(SPR_DBCR0, r | DBCR0_IC | DBCR0_IDM);
453	kdb_frame->srr1 |= PSL_DE;
454}
455
456