1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright 2003-2011 Netlogic Microsystems (Netlogic). All rights
5 * reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions are
9 * met:
10 *
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in
15 *    the documentation and/or other materials provided with the
16 *    distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY Netlogic Microsystems ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL NETLOGIC OR CONTRIBUTORS BE
22 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
28 * THE POSSIBILITY OF SUCH DAMAGE.
29 *
30 * NETLOGIC_BSD
31 * $FreeBSD$
32 */
33
34#ifndef __NLM_XLP_H__
35#define __NLM_XLP_H__
36#include <mips/nlm/hal/mips-extns.h>
37#include <mips/nlm/hal/iomap.h>
38
39/* XLP 8xx/4xx A0, A1, A2 CPU COP0 PRIDs */
40#define	CHIP_PROCESSOR_ID_XLP_8XX		0x10
41#define	CHIP_PROCESSOR_ID_XLP_3XX		0x11
42#define	CHIP_PROCESSOR_ID_XLP_416		0x94
43#define	CHIP_PROCESSOR_ID_XLP_432		0x14
44
45/* Revision id's */
46#define	XLP_REVISION_A0				0x00
47#define	XLP_REVISION_A1				0x01
48#define	XLP_REVISION_A2				0x02
49#define	XLP_REVISION_B0				0x03
50#define	XLP_REVISION_B1				0x04
51
52#ifndef LOCORE
53/*
54 * FreeBSD can be started with few threads and cores turned off,
55 * so have a hardware thread id to FreeBSD cpuid mapping.
56 */
57extern int xlp_ncores;
58extern int xlp_threads_per_core;
59extern uint32_t xlp_hw_thread_mask;
60extern int xlp_cpuid_to_hwtid[];
61extern int xlp_hwtid_to_cpuid[];
62#ifdef SMP
63extern void xlp_enable_threads(int code);
64#endif
65uint32_t xlp_get_cpu_frequency(int node, int core);
66int nlm_set_device_frequency(int node, int devtype, int frequency);
67int xlp_irq_to_irt(int irq);
68
69static __inline int nlm_processor_id(void)
70{
71	return ((mips_rd_prid() >> 8) & 0xff);
72}
73
74static __inline int nlm_is_xlp3xx(void)
75{
76
77	return (nlm_processor_id() == CHIP_PROCESSOR_ID_XLP_3XX);
78}
79
80static __inline int nlm_is_xlp3xx_ax(void)
81{
82	uint32_t procid = mips_rd_prid();
83	int prid = (procid >> 8) & 0xff;
84	int rev = procid & 0xff;
85
86	return (prid == CHIP_PROCESSOR_ID_XLP_3XX &&
87		rev < XLP_REVISION_B0);
88}
89
90static __inline int nlm_is_xlp4xx(void)
91{
92	int prid = nlm_processor_id();
93
94	return (prid == CHIP_PROCESSOR_ID_XLP_432 ||
95	    prid == CHIP_PROCESSOR_ID_XLP_416);
96}
97
98static __inline int nlm_is_xlp8xx(void)
99{
100	int prid = nlm_processor_id();
101
102	return (prid == CHIP_PROCESSOR_ID_XLP_8XX ||
103	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
104	    prid == CHIP_PROCESSOR_ID_XLP_416);
105}
106
107static __inline int nlm_is_xlp8xx_ax(void)
108{
109	uint32_t procid = mips_rd_prid();
110	int prid = (procid >> 8) & 0xff;
111	int rev = procid & 0xff;
112
113	return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
114	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
115	    prid == CHIP_PROCESSOR_ID_XLP_416) &&
116	    (rev < XLP_REVISION_B0));
117}
118
119static __inline int nlm_is_xlp8xx_b0(void)
120{
121	uint32_t procid = mips_rd_prid();
122	int prid = (procid >> 8) & 0xff;
123	int rev = procid & 0xff;
124
125	return ((prid == CHIP_PROCESSOR_ID_XLP_8XX ||
126	    prid == CHIP_PROCESSOR_ID_XLP_432 ||
127	    prid == CHIP_PROCESSOR_ID_XLP_416) &&
128		rev == XLP_REVISION_B0);
129}
130
131static __inline int xlp_socdev_irt(uint32_t offset)
132{
133	uint64_t base;
134
135	base = nlm_pcicfg_base(offset);
136	return (nlm_irtstart(base));
137}
138#endif /* LOCORE */
139#endif /* __NLM_XLP_H__ */
140