1/* $OpenBSD: regnum.h,v 1.3 1999/01/27 04:46:06 imp Exp $ */ 2 3/*- 4 * SPDX-License-Identifier: BSD-3-Clause 5 * 6 * Copyright (c) 1988 University of Utah. 7 * Copyright (c) 1992, 1993 8 * The Regents of the University of California. All rights reserved. 9 * 10 * This code is derived from software contributed to Berkeley by 11 * the Systems Programming Group of the University of Utah Computer 12 * Science Department and Ralph Campbell. 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 3. Neither the name of the University nor the names of its contributors 23 * may be used to endorse or promote products derived from this software 24 * without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 27 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 28 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 29 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 30 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 31 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 32 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 33 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 34 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 35 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 36 * SUCH DAMAGE. 37 * 38 * from: Utah Hdr: reg.h 1.1 90/07/09 39 * @(#)reg.h 8.2 (Berkeley) 1/11/94 40 * JNPR: regnum.h,v 1.6 2007/08/09 11:23:32 katta 41 * $FreeBSD$ 42 */ 43 44#ifndef _MACHINE_REGNUM_H_ 45#define _MACHINE_REGNUM_H_ 46 47#define NUMSAVEREGS 40 48#define NUMFPREGS 34 49 50/* 51 * Location of the saved registers relative to ZERO. 52 * This must match struct trapframe defined in frame.h exactly. 53 * This must also match regdef.h. 54 */ 55#if defined(_KERNEL) || defined(_WANT_MIPS_REGNUM) 56#define ZERO 0 57#define AST 1 58#define V0 2 59#define V1 3 60#define A0 4 61#define A1 5 62#define A2 6 63#define A3 7 64#if defined(__mips_n32) || defined(__mips_n64) 65#define A4 8 66#define A5 9 67#define A6 10 68#define A7 11 69#define T0 12 70#define T1 13 71#define T2 14 72#define T3 15 73#else 74#define T0 8 75#define T1 9 76#define T2 10 77#define T3 11 78#define T4 12 79#define T5 13 80#define T6 14 81#define T7 15 82#endif 83#define S0 16 84#define S1 17 85#define S2 18 86#define S3 19 87#define S4 20 88#define S5 21 89#define S6 22 90#define S7 23 91#define T8 24 92#define T9 25 93#define K0 26 94#define K1 27 95#define GP 28 96#define SP 29 97#define S8 30 98#define RA 31 99#define SR 32 100#define PS SR /* alias for SR */ 101#define MULLO 33 102#define MULHI 34 103#define BADVADDR 35 104#define CAUSE 36 105#define PC 37 106/* 107 * IC is valid only on RM7K and RM9K processors. Access to this is 108 * controlled by IC_INT_REG which defined in kernel config 109 */ 110#define IC 38 111#define DUMMY 39 /* for 8 byte alignment */ 112 113/* 114 * Pseudo registers so we save a complete set of registers regardless of 115 * the ABI. See regdef.h for a more complete explanation. 116 */ 117#if defined(__mips_n32) || defined(__mips_n64) 118#define TA0 8 119#define TA1 9 120#define TA2 10 121#define TA3 11 122#else 123#define TA0 12 124#define TA1 13 125#define TA2 14 126#define TA3 15 127#endif 128 129 130/* 131 * Index of FP registers in 'struct frame', counting from the beginning 132 * of the frame (i.e., including the general registers). 133 */ 134#define FPBASE NUMSAVEREGS 135#define F0 (FPBASE+0) 136#define F1 (FPBASE+1) 137#define F2 (FPBASE+2) 138#define F3 (FPBASE+3) 139#define F4 (FPBASE+4) 140#define F5 (FPBASE+5) 141#define F6 (FPBASE+6) 142#define F7 (FPBASE+7) 143#define F8 (FPBASE+8) 144#define F9 (FPBASE+9) 145#define F10 (FPBASE+10) 146#define F11 (FPBASE+11) 147#define F12 (FPBASE+12) 148#define F13 (FPBASE+13) 149#define F14 (FPBASE+14) 150#define F15 (FPBASE+15) 151#define F16 (FPBASE+16) 152#define F17 (FPBASE+17) 153#define F18 (FPBASE+18) 154#define F19 (FPBASE+19) 155#define F20 (FPBASE+20) 156#define F21 (FPBASE+21) 157#define F22 (FPBASE+22) 158#define F23 (FPBASE+23) 159#define F24 (FPBASE+24) 160#define F25 (FPBASE+25) 161#define F26 (FPBASE+26) 162#define F27 (FPBASE+27) 163#define F28 (FPBASE+28) 164#define F29 (FPBASE+29) 165#define F30 (FPBASE+30) 166#define F31 (FPBASE+31) 167#define FSR (FPBASE+32) 168#define FIR (FPBASE+33) 169 170/* 171 * Index of FP registers in 'struct frame', relative to the base 172 * of the FP registers in frame (i.e., *not* including the general 173 * registers). 174 */ 175#define F0_NUM (0) 176#define F1_NUM (1) 177#define F2_NUM (2) 178#define F3_NUM (3) 179#define F4_NUM (4) 180#define F5_NUM (5) 181#define F6_NUM (6) 182#define F7_NUM (7) 183#define F8_NUM (8) 184#define F9_NUM (9) 185#define F10_NUM (10) 186#define F11_NUM (11) 187#define F12_NUM (12) 188#define F13_NUM (13) 189#define F14_NUM (14) 190#define F15_NUM (15) 191#define F16_NUM (16) 192#define F17_NUM (17) 193#define F18_NUM (18) 194#define F19_NUM (19) 195#define F20_NUM (20) 196#define F21_NUM (21) 197#define F22_NUM (22) 198#define F23_NUM (23) 199#define F24_NUM (24) 200#define F25_NUM (25) 201#define F26_NUM (26) 202#define F27_NUM (27) 203#define F28_NUM (28) 204#define F29_NUM (29) 205#define F30_NUM (30) 206#define F31_NUM (31) 207#define FSR_NUM (32) 208#define FIR_NUM (33) 209 210#endif /* _KERNEL || _WANT_MIPS_REGNUM */ 211 212#endif /* !_MACHINE_REGNUM_H_ */ 213