1/*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2004-2010 Juli Mallett <jmallett@FreeBSD.org>
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 *    notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 *    notice, this list of conditions and the following disclaimer in the
14 *    documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 *
28 * $FreeBSD$
29 */
30#include <sys/cdefs.h>
31__FBSDID("$FreeBSD$");
32
33#include <sys/param.h>
34#include <sys/conf.h>
35#include <sys/kernel.h>
36#include <sys/smp.h>
37#include <sys/systm.h>
38
39#include <machine/hwfunc.h>
40#include <machine/md_var.h>
41#include <machine/smp.h>
42
43#include <mips/cavium/octeon_pcmap_regs.h>
44
45#include <contrib/octeon-sdk/cvmx.h>
46#include <mips/cavium/octeon_irq.h>
47
48unsigned octeon_ap_boot = ~0;
49
50void
51platform_ipi_send(int cpuid)
52{
53	cvmx_write_csr(CVMX_CIU_MBOX_SETX(cpuid), 1);
54	mips_wbflush();
55}
56
57void
58platform_ipi_clear(void)
59{
60	uint64_t action;
61
62	action = cvmx_read_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)));
63	KASSERT(action == 1, ("unexpected IPIs: %#jx", (uintmax_t)action));
64	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(PCPU_GET(cpuid)), action);
65}
66
67int
68platform_ipi_hardintr_num(void)
69{
70
71	return (1);
72}
73
74int
75platform_ipi_softintr_num(void)
76{
77
78	return (-1);
79}
80
81void
82platform_init_ap(int cpuid)
83{
84	unsigned ciu_int_mask, clock_int_mask, ipi_int_mask;
85
86	/*
87	 * Set the exception base.
88	 */
89	mips_wr_ebase(0x80000000);
90
91	/*
92	 * Clear any pending IPIs.
93	 */
94	cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cpuid), 0xffffffff);
95
96	/*
97	 * Set up interrupts.
98	 */
99	octeon_ciu_reset();
100
101	/*
102	 * Unmask the clock, ipi and ciu interrupts.
103	 */
104	ciu_int_mask = hard_int_mask(0);
105	clock_int_mask = hard_int_mask(5);
106	ipi_int_mask = hard_int_mask(platform_ipi_hardintr_num());
107	set_intr_mask(ciu_int_mask | clock_int_mask | ipi_int_mask);
108
109	mips_wbflush();
110}
111
112void
113platform_cpu_mask(cpuset_t *mask)
114{
115	uint64_t core_mask = cvmx_sysinfo_get()->core_mask;
116	uint64_t i, m;
117
118	CPU_ZERO(mask);
119	for (i = 0, m = 1 ; i < MAXCPU; i++, m <<= 1)
120		if (core_mask & m)
121			CPU_SET(i, mask);
122}
123
124struct cpu_group *
125platform_smp_topo(void)
126{
127	return (smp_topo_none());
128}
129
130int
131platform_start_ap(int cpuid)
132{
133	uint64_t cores_in_reset;
134
135	/*
136	 * Release the core if it is in reset, and let it rev up a bit.
137	 * The real synchronization happens below via octeon_ap_boot.
138	 */
139	cores_in_reset = cvmx_read_csr(CVMX_CIU_PP_RST);
140	if (cores_in_reset & (1ULL << cpuid)) {
141	    if (bootverbose)
142		printf ("AP #%d still in reset\n", cpuid);
143	    cores_in_reset &= ~(1ULL << cpuid);
144	    cvmx_write_csr(CVMX_CIU_PP_RST, (uint64_t)(cores_in_reset));
145	    DELAY(2000);    /* Give it a moment to start */
146	}
147
148	if (atomic_cmpset_32(&octeon_ap_boot, ~0, cpuid) == 0)
149		return (-1);
150	for (;;) {
151		DELAY(1000);
152		if (atomic_cmpset_32(&octeon_ap_boot, 0, ~0) != 0)
153			return (0);
154		printf("Waiting for cpu%d to start\n", cpuid);
155	}
156}
157