1/*- 2 * Copyright (c) 2010 Adrian Chadd 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27/* $FreeBSD$ */ 28 29#ifndef __AR5315_CPUDEF_H__ 30#define __AR5315_CPUDEF_H__ 31 32struct ar5315_cpu_def { 33 void (* detect_mem_size) (void); 34 void (* detect_sys_frequency) (void); 35 void (* ar5315_chip_device_reset) (void); 36 void (* ar5315_chip_device_start) (void); 37 int (* ar5315_chip_device_stopped) (uint32_t); 38 void (* ar5315_chip_set_pll_ge) (int, int); 39 void (* ar5315_chip_set_mii_speed) (uint32_t, uint32_t); 40 void (* ar5315_chip_ddr_flush_ge) (int); 41 uint32_t (* ar5315_chip_get_eth_pll) (unsigned int, int); 42 void (* ar5315_chip_soc_init) (void); 43 44 /* 45 * Allow to change MII bus mode: 46 * AR5315_ARGE_MII_MODE_MII 47 * AR5315_ARGE_MII_MODE_RMII 48 * AR5315_ARGE_MII_MODE_GMII 49 * AR5315_ARGE_MII_MODE_RGMII 50 * mii_mode(unit, mode); 51 */ 52#define AR5315_ARGE_MII_MODE_MII 0x0100 53#define AR5315_ARGE_MII_MODE_RMII 0x0101 54#define AR5315_ARGE_MII_MODE_GMII 0x1000 55#define AR5315_ARGE_MII_MODE_RGMII 0x1001 56 void (* ar5315_chip_set_mii_mode) (int, int, int); 57}; 58 59extern struct ar5315_cpu_def * ar5315_cpu_ops; 60 61static inline void ar531x_detect_mem_size(void) 62{ 63 ar5315_cpu_ops->detect_mem_size(); 64} 65 66static inline void ar531x_detect_sys_frequency(void) 67{ 68 ar5315_cpu_ops->detect_sys_frequency(); 69} 70 71static inline void ar531x_device_reset(void) 72{ 73 ar5315_cpu_ops->ar5315_chip_device_reset(); 74} 75 76static inline void ar531x_device_start(void) 77{ 78 ar5315_cpu_ops->ar5315_chip_device_start(); 79} 80 81static inline int ar531x_device_stopped(uint32_t mask) 82{ 83 return ar5315_cpu_ops->ar5315_chip_device_stopped(mask); 84} 85 86static inline void ar531x_device_set_pll_ge(int unit, int speed) 87{ 88 ar5315_cpu_ops->ar5315_chip_set_pll_ge(unit, speed); 89} 90 91static inline void ar531x_device_set_mii_speed(int unit, int speed) 92{ 93 ar5315_cpu_ops->ar5315_chip_set_mii_speed(unit, speed); 94} 95 96static inline void ar531x_device_flush_ddr_ge(int unit) 97{ 98 ar5315_cpu_ops->ar5315_chip_ddr_flush_ge(unit); 99} 100 101static inline void ar531x_device_soc_init(void) 102{ 103 ar5315_cpu_ops->ar5315_chip_soc_init(); 104} 105 106static inline void ar531x_device_set_mii_mode(int unit, int mode, int speed) 107{ 108 ar5315_cpu_ops->ar5315_chip_set_mii_mode(unit, mode, speed); 109} 110 111/* XXX shouldn't be here! */ 112extern uint32_t u_ar531x_cpu_freq; 113extern uint32_t u_ar531x_ahb_freq; 114extern uint32_t u_ar531x_ddr_freq; 115 116extern uint32_t u_ar531x_uart_addr; 117 118extern uint32_t u_ar531x_gpio_di; 119extern uint32_t u_ar531x_gpio_do; 120extern uint32_t u_ar531x_gpio_cr; 121extern uint32_t u_ar531x_gpio_pins; 122 123extern uint32_t u_ar531x_wdog_ctl; 124extern uint32_t u_ar531x_wdog_timer; 125 126static inline uint32_t ar531x_cpu_freq(void) { return u_ar531x_cpu_freq; } 127static inline uint32_t ar531x_ahb_freq(void) { return u_ar531x_ahb_freq; } 128static inline uint32_t ar531x_ddr_freq(void) { return u_ar531x_ddr_freq; } 129 130static inline uint32_t ar531x_uart_addr(void) { return u_ar531x_uart_addr; } 131 132static inline uint32_t ar531x_gpio_di(void) { return u_ar531x_gpio_di; } 133static inline uint32_t ar531x_gpio_cr(void) { return u_ar531x_gpio_cr; } 134static inline uint32_t ar531x_gpio_do(void) { return u_ar531x_gpio_do; } 135static inline uint32_t ar531x_gpio_pins(void) { return u_ar531x_gpio_pins; } 136 137static inline uint32_t ar531x_wdog_ctl(void) { return u_ar531x_wdog_ctl; } 138static inline uint32_t ar531x_wdog_timer(void) { return u_ar531x_wdog_timer; } 139#endif 140