1/*- 2 * Copyright (c) 2008 Weongyo Jeong <weongyo@FreeBSD.org> 3 * 4 * Permission to use, copy, modify, and distribute this software for any 5 * purpose with or without fee is hereby granted, provided that the above 6 * copyright notice and this permission notice appear in all copies. 7 * 8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 15 */ 16 17#include <sys/cdefs.h> 18__FBSDID("$FreeBSD$"); 19 20#include "opt_wlan.h" 21 22#include <sys/param.h> 23#include <sys/sockio.h> 24#include <sys/sysctl.h> 25#include <sys/lock.h> 26#include <sys/mutex.h> 27#include <sys/mbuf.h> 28#include <sys/kernel.h> 29#include <sys/socket.h> 30#include <sys/systm.h> 31#include <sys/malloc.h> 32#include <sys/module.h> 33#include <sys/bus.h> 34#include <sys/endian.h> 35#include <sys/kdb.h> 36 37#include <net/if.h> 38#include <net/if_var.h> 39#include <net/if_arp.h> 40#include <net/ethernet.h> 41#include <net/if_dl.h> 42#include <net/if_media.h> 43#include <net/if_types.h> 44 45#ifdef INET 46#include <netinet/in.h> 47#include <netinet/in_systm.h> 48#include <netinet/in_var.h> 49#include <netinet/if_ether.h> 50#include <netinet/ip.h> 51#endif 52 53#include <net80211/ieee80211_var.h> 54#include <net80211/ieee80211_regdomain.h> 55#include <net80211/ieee80211_radiotap.h> 56 57#include <dev/usb/usb.h> 58#include <dev/usb/usbdi.h> 59#include "usbdevs.h" 60 61#include <dev/usb/wlan/if_urtwreg.h> 62#include <dev/usb/wlan/if_urtwvar.h> 63 64/* copy some rate indices from if_rtwn_ridx.h */ 65#define URTW_RIDX_CCK5 2 66#define URTW_RIDX_CCK11 3 67#define URTW_RIDX_OFDM6 4 68#define URTW_RIDX_OFDM24 8 69 70static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW, 0, "USB Realtek 8187L"); 71#ifdef URTW_DEBUG 72int urtw_debug = 0; 73SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0, 74 "control debugging printfs"); 75enum { 76 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */ 77 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */ 78 URTW_DEBUG_RESET = 0x00000004, /* reset processing */ 79 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */ 80 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */ 81 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */ 82 URTW_DEBUG_STAT = 0x00000040, /* statistic */ 83 URTW_DEBUG_INIT = 0x00000080, /* initialization of dev */ 84 URTW_DEBUG_TXSTATUS = 0x00000100, /* tx status */ 85 URTW_DEBUG_ANY = 0xffffffff 86}; 87#define DPRINTF(sc, m, fmt, ...) do { \ 88 if (sc->sc_debug & (m)) \ 89 printf(fmt, __VA_ARGS__); \ 90} while (0) 91#else 92#define DPRINTF(sc, m, fmt, ...) do { \ 93 (void) sc; \ 94} while (0) 95#endif 96static int urtw_preamble_mode = URTW_PREAMBLE_MODE_LONG; 97SYSCTL_INT(_hw_usb_urtw, OID_AUTO, preamble_mode, CTLFLAG_RWTUN, 98 &urtw_preamble_mode, 0, "set the preable mode (long or short)"); 99 100/* recognized device vendors/products */ 101#define urtw_lookup(v, p) \ 102 ((const struct urtw_type *)usb_lookup(urtw_devs, v, p)) 103#define URTW_DEV_B(v,p) \ 104 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187B) } 105#define URTW_DEV_L(v,p) \ 106 { USB_VPI(USB_VENDOR_##v, USB_PRODUCT_##v##_##p, URTW_REV_RTL8187L) } 107#define URTW_REV_RTL8187B 0 108#define URTW_REV_RTL8187L 1 109static const STRUCT_USB_HOST_ID urtw_devs[] = { 110 URTW_DEV_B(NETGEAR, WG111V3), 111 URTW_DEV_B(REALTEK, RTL8187B_0), 112 URTW_DEV_B(REALTEK, RTL8187B_1), 113 URTW_DEV_B(REALTEK, RTL8187B_2), 114 URTW_DEV_B(SITECOMEU, WL168V4), 115 URTW_DEV_L(ASUS, P5B_WIFI), 116 URTW_DEV_L(BELKIN, F5D7050E), 117 URTW_DEV_L(LINKSYS4, WUSB54GCV2), 118 URTW_DEV_L(NETGEAR, WG111V2), 119 URTW_DEV_L(REALTEK, RTL8187), 120 URTW_DEV_L(SITECOMEU, WL168V1), 121 URTW_DEV_L(SURECOM, EP9001G2A), 122 { USB_VPI(USB_VENDOR_OVISLINK, 0x8187, URTW_REV_RTL8187L) }, 123 { USB_VPI(USB_VENDOR_DICKSMITH, 0x9401, URTW_REV_RTL8187L) }, 124 { USB_VPI(USB_VENDOR_HP, 0xca02, URTW_REV_RTL8187L) }, 125 { USB_VPI(USB_VENDOR_LOGITEC, 0x010c, URTW_REV_RTL8187L) }, 126 { USB_VPI(USB_VENDOR_NETGEAR, 0x6100, URTW_REV_RTL8187L) }, 127 { USB_VPI(USB_VENDOR_SPHAIRON, 0x0150, URTW_REV_RTL8187L) }, 128 { USB_VPI(USB_VENDOR_QCOM, 0x6232, URTW_REV_RTL8187L) }, 129#undef URTW_DEV_L 130#undef URTW_DEV_B 131}; 132 133#define urtw_read8_m(sc, val, data) do { \ 134 error = urtw_read8_c(sc, val, data); \ 135 if (error != 0) \ 136 goto fail; \ 137} while (0) 138#define urtw_write8_m(sc, val, data) do { \ 139 error = urtw_write8_c(sc, val, data); \ 140 if (error != 0) \ 141 goto fail; \ 142} while (0) 143#define urtw_read16_m(sc, val, data) do { \ 144 error = urtw_read16_c(sc, val, data); \ 145 if (error != 0) \ 146 goto fail; \ 147} while (0) 148#define urtw_write16_m(sc, val, data) do { \ 149 error = urtw_write16_c(sc, val, data); \ 150 if (error != 0) \ 151 goto fail; \ 152} while (0) 153#define urtw_read32_m(sc, val, data) do { \ 154 error = urtw_read32_c(sc, val, data); \ 155 if (error != 0) \ 156 goto fail; \ 157} while (0) 158#define urtw_write32_m(sc, val, data) do { \ 159 error = urtw_write32_c(sc, val, data); \ 160 if (error != 0) \ 161 goto fail; \ 162} while (0) 163#define urtw_8187_write_phy_ofdm(sc, val, data) do { \ 164 error = urtw_8187_write_phy_ofdm_c(sc, val, data); \ 165 if (error != 0) \ 166 goto fail; \ 167} while (0) 168#define urtw_8187_write_phy_cck(sc, val, data) do { \ 169 error = urtw_8187_write_phy_cck_c(sc, val, data); \ 170 if (error != 0) \ 171 goto fail; \ 172} while (0) 173#define urtw_8225_write(sc, val, data) do { \ 174 error = urtw_8225_write_c(sc, val, data); \ 175 if (error != 0) \ 176 goto fail; \ 177} while (0) 178 179struct urtw_pair { 180 uint32_t reg; 181 uint32_t val; 182}; 183 184static uint8_t urtw_8225_agc[] = { 185 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9e, 0x9d, 0x9c, 0x9b, 186 0x9a, 0x99, 0x98, 0x97, 0x96, 0x95, 0x94, 0x93, 0x92, 0x91, 0x90, 187 0x8f, 0x8e, 0x8d, 0x8c, 0x8b, 0x8a, 0x89, 0x88, 0x87, 0x86, 0x85, 188 0x84, 0x83, 0x82, 0x81, 0x80, 0x3f, 0x3e, 0x3d, 0x3c, 0x3b, 0x3a, 189 0x39, 0x38, 0x37, 0x36, 0x35, 0x34, 0x33, 0x32, 0x31, 0x30, 0x2f, 190 0x2e, 0x2d, 0x2c, 0x2b, 0x2a, 0x29, 0x28, 0x27, 0x26, 0x25, 0x24, 191 0x23, 0x22, 0x21, 0x20, 0x1f, 0x1e, 0x1d, 0x1c, 0x1b, 0x1a, 0x19, 192 0x18, 0x17, 0x16, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x0f, 0x0e, 193 0x0d, 0x0c, 0x0b, 0x0a, 0x09, 0x08, 0x07, 0x06, 0x05, 0x04, 0x03, 194 0x02, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 195 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 196 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01 197}; 198 199static uint8_t urtw_8225z2_agc[] = { 200 0x5e, 0x5e, 0x5e, 0x5e, 0x5d, 0x5b, 0x59, 0x57, 0x55, 0x53, 0x51, 201 0x4f, 0x4d, 0x4b, 0x49, 0x47, 0x45, 0x43, 0x41, 0x3f, 0x3d, 0x3b, 202 0x39, 0x37, 0x35, 0x33, 0x31, 0x2f, 0x2d, 0x2b, 0x29, 0x27, 0x25, 203 0x23, 0x21, 0x1f, 0x1d, 0x1b, 0x19, 0x17, 0x15, 0x13, 0x11, 0x0f, 204 0x0d, 0x0b, 0x09, 0x07, 0x05, 0x03, 0x01, 0x01, 0x01, 0x01, 0x01, 205 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x19, 0x19, 206 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x19, 0x20, 0x21, 0x22, 0x23, 207 0x24, 0x25, 0x26, 0x26, 0x27, 0x27, 0x28, 0x28, 0x29, 0x2a, 0x2a, 208 0x2a, 0x2b, 0x2b, 0x2b, 0x2c, 0x2c, 0x2c, 0x2d, 0x2d, 0x2d, 0x2d, 209 0x2e, 0x2e, 0x2e, 0x2e, 0x2f, 0x2f, 0x2f, 0x30, 0x30, 0x31, 0x31, 210 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 211 0x31, 0x31, 0x31, 0x31, 0x31, 0x31, 0x31 212}; 213 214static uint32_t urtw_8225_channel[] = { 215 0x0000, /* dummy channel 0 */ 216 0x085c, /* 1 */ 217 0x08dc, /* 2 */ 218 0x095c, /* 3 */ 219 0x09dc, /* 4 */ 220 0x0a5c, /* 5 */ 221 0x0adc, /* 6 */ 222 0x0b5c, /* 7 */ 223 0x0bdc, /* 8 */ 224 0x0c5c, /* 9 */ 225 0x0cdc, /* 10 */ 226 0x0d5c, /* 11 */ 227 0x0ddc, /* 12 */ 228 0x0e5c, /* 13 */ 229 0x0f72, /* 14 */ 230}; 231 232static uint8_t urtw_8225_gain[] = { 233 0x23, 0x88, 0x7c, 0xa5, /* -82dbm */ 234 0x23, 0x88, 0x7c, 0xb5, /* -82dbm */ 235 0x23, 0x88, 0x7c, 0xc5, /* -82dbm */ 236 0x33, 0x80, 0x79, 0xc5, /* -78dbm */ 237 0x43, 0x78, 0x76, 0xc5, /* -74dbm */ 238 0x53, 0x60, 0x73, 0xc5, /* -70dbm */ 239 0x63, 0x58, 0x70, 0xc5, /* -66dbm */ 240}; 241 242static struct urtw_pair urtw_8225_rf_part1[] = { 243 { 0x00, 0x0067 }, { 0x01, 0x0fe0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 244 { 0x04, 0x0486 }, { 0x05, 0x0bc0 }, { 0x06, 0x0ae6 }, { 0x07, 0x082a }, 245 { 0x08, 0x001f }, { 0x09, 0x0334 }, { 0x0a, 0x0fd4 }, { 0x0b, 0x0391 }, 246 { 0x0c, 0x0050 }, { 0x0d, 0x06db }, { 0x0e, 0x0029 }, { 0x0f, 0x0914 }, 247}; 248 249static struct urtw_pair urtw_8225_rf_part2[] = { 250 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 251 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 252 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x09 }, { 0x0b, 0x80 }, 253 { 0x0c, 0x01 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, { 0x10, 0x84 }, 254 { 0x11, 0x06 }, { 0x12, 0x20 }, { 0x13, 0x20 }, { 0x14, 0x00 }, 255 { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, { 0x18, 0xef }, 256 { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x76 }, { 0x1c, 0x04 }, 257 { 0x1e, 0x95 }, { 0x1f, 0x75 }, { 0x20, 0x1f }, { 0x21, 0x27 }, 258 { 0x22, 0x16 }, { 0x24, 0x46 }, { 0x25, 0x20 }, { 0x26, 0x90 }, 259 { 0x27, 0x88 } 260}; 261 262static struct urtw_pair urtw_8225_rf_part3[] = { 263 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 264 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x10, 0x9b }, 265 { 0x11, 0x88 }, { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, 266 { 0x1a, 0xa0 }, { 0x1b, 0x08 }, { 0x40, 0x86 }, { 0x41, 0x8d }, 267 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x1f }, { 0x45, 0x1e }, 268 { 0x46, 0x1a }, { 0x47, 0x15 }, { 0x48, 0x10 }, { 0x49, 0x0a }, 269 { 0x4a, 0x05 }, { 0x4b, 0x02 }, { 0x4c, 0x05 } 270}; 271 272static uint16_t urtw_8225_rxgain[] = { 273 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 274 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 275 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 276 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 277 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 278 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 279 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 280 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 281 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 282 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 283 0x07aa, 0x07ab, 0x07ac, 0x07ad, 0x07b0, 0x07b1, 0x07b2, 0x07b3, 284 0x07b4, 0x07b5, 0x07b8, 0x07b9, 0x07ba, 0x07bb, 0x07bb 285}; 286 287static uint8_t urtw_8225_threshold[] = { 288 0x8d, 0x8d, 0x8d, 0x8d, 0x9d, 0xad, 0xbd, 289}; 290 291static uint8_t urtw_8225_tx_gain_cck_ofdm[] = { 292 0x02, 0x06, 0x0e, 0x1e, 0x3e, 0x7e 293}; 294 295static uint8_t urtw_8225_txpwr_cck[] = { 296 0x18, 0x17, 0x15, 0x11, 0x0c, 0x08, 0x04, 0x02, 297 0x1b, 0x1a, 0x17, 0x13, 0x0e, 0x09, 0x04, 0x02, 298 0x1f, 0x1e, 0x1a, 0x15, 0x10, 0x0a, 0x05, 0x02, 299 0x22, 0x21, 0x1d, 0x18, 0x11, 0x0b, 0x06, 0x02, 300 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03, 301 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03 302}; 303 304static uint8_t urtw_8225_txpwr_cck_ch14[] = { 305 0x18, 0x17, 0x15, 0x0c, 0x00, 0x00, 0x00, 0x00, 306 0x1b, 0x1a, 0x17, 0x0e, 0x00, 0x00, 0x00, 0x00, 307 0x1f, 0x1e, 0x1a, 0x0f, 0x00, 0x00, 0x00, 0x00, 308 0x22, 0x21, 0x1d, 0x11, 0x00, 0x00, 0x00, 0x00, 309 0x26, 0x25, 0x21, 0x13, 0x00, 0x00, 0x00, 0x00, 310 0x2b, 0x2a, 0x25, 0x15, 0x00, 0x00, 0x00, 0x00 311}; 312 313static uint8_t urtw_8225_txpwr_ofdm[]={ 314 0x80, 0x90, 0xa2, 0xb5, 0xcb, 0xe4 315}; 316 317static uint8_t urtw_8225v2_gain_bg[]={ 318 0x23, 0x15, 0xa5, /* -82-1dbm */ 319 0x23, 0x15, 0xb5, /* -82-2dbm */ 320 0x23, 0x15, 0xc5, /* -82-3dbm */ 321 0x33, 0x15, 0xc5, /* -78dbm */ 322 0x43, 0x15, 0xc5, /* -74dbm */ 323 0x53, 0x15, 0xc5, /* -70dbm */ 324 0x63, 0x15, 0xc5, /* -66dbm */ 325}; 326 327static struct urtw_pair urtw_8225v2_rf_part1[] = { 328 { 0x00, 0x02bf }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 329 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 330 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 331 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 332}; 333 334static struct urtw_pair urtw_8225v2b_rf_part0[] = { 335 { 0x00, 0x00b7 }, { 0x01, 0x0ee0 }, { 0x02, 0x044d }, { 0x03, 0x0441 }, 336 { 0x04, 0x08c3 }, { 0x05, 0x0c72 }, { 0x06, 0x00e6 }, { 0x07, 0x082a }, 337 { 0x08, 0x003f }, { 0x09, 0x0335 }, { 0x0a, 0x09d4 }, { 0x0b, 0x07bb }, 338 { 0x0c, 0x0850 }, { 0x0d, 0x0cdf }, { 0x0e, 0x002b }, { 0x0f, 0x0114 } 339}; 340 341static struct urtw_pair urtw_8225v2b_rf_part1[] = { 342 {0x0f0, 0x32}, {0x0f1, 0x32}, {0x0f2, 0x00}, 343 {0x0f3, 0x00}, {0x0f4, 0x32}, {0x0f5, 0x43}, 344 {0x0f6, 0x00}, {0x0f7, 0x00}, {0x0f8, 0x46}, 345 {0x0f9, 0xa4}, {0x0fa, 0x00}, {0x0fb, 0x00}, 346 {0x0fc, 0x96}, {0x0fd, 0xa4}, {0x0fe, 0x00}, 347 {0x0ff, 0x00}, {0x158, 0x4b}, {0x159, 0x00}, 348 {0x15a, 0x4b}, {0x15b, 0x00}, {0x160, 0x4b}, 349 {0x161, 0x09}, {0x162, 0x4b}, {0x163, 0x09}, 350 {0x1ce, 0x0f}, {0x1cf, 0x00}, {0x1e0, 0xff}, 351 {0x1e1, 0x0f}, {0x1e2, 0x00}, {0x1f0, 0x4e}, 352 {0x1f1, 0x01}, {0x1f2, 0x02}, {0x1f3, 0x03}, 353 {0x1f4, 0x04}, {0x1f5, 0x05}, {0x1f6, 0x06}, 354 {0x1f7, 0x07}, {0x1f8, 0x08}, {0x24e, 0x00}, 355 {0x20c, 0x04}, {0x221, 0x61}, {0x222, 0x68}, 356 {0x223, 0x6f}, {0x224, 0x76}, {0x225, 0x7d}, 357 {0x226, 0x84}, {0x227, 0x8d}, {0x24d, 0x08}, 358 {0x250, 0x05}, {0x251, 0xf5}, {0x252, 0x04}, 359 {0x253, 0xa0}, {0x254, 0x1f}, {0x255, 0x23}, 360 {0x256, 0x45}, {0x257, 0x67}, {0x258, 0x08}, 361 {0x259, 0x08}, {0x25a, 0x08}, {0x25b, 0x08}, 362 {0x260, 0x08}, {0x261, 0x08}, {0x262, 0x08}, 363 {0x263, 0x08}, {0x264, 0xcf}, {0x272, 0x56}, 364 {0x273, 0x9a}, {0x034, 0xf0}, {0x035, 0x0f}, 365 {0x05b, 0x40}, {0x084, 0x88}, {0x085, 0x24}, 366 {0x088, 0x54}, {0x08b, 0xb8}, {0x08c, 0x07}, 367 {0x08d, 0x00}, {0x094, 0x1b}, {0x095, 0x12}, 368 {0x096, 0x00}, {0x097, 0x06}, {0x09d, 0x1a}, 369 {0x09f, 0x10}, {0x0b4, 0x22}, {0x0be, 0x80}, 370 {0x0db, 0x00}, {0x0ee, 0x00}, {0x091, 0x03}, 371 {0x24c, 0x00}, {0x39f, 0x00}, {0x08c, 0x01}, 372 {0x08d, 0x10}, {0x08e, 0x08}, {0x08f, 0x00} 373}; 374 375static struct urtw_pair urtw_8225v2_rf_part2[] = { 376 { 0x00, 0x01 }, { 0x01, 0x02 }, { 0x02, 0x42 }, { 0x03, 0x00 }, 377 { 0x04, 0x00 }, { 0x05, 0x00 }, { 0x06, 0x40 }, { 0x07, 0x00 }, 378 { 0x08, 0x40 }, { 0x09, 0xfe }, { 0x0a, 0x08 }, { 0x0b, 0x80 }, 379 { 0x0c, 0x01 }, { 0x0d, 0x43 }, { 0x0e, 0xd3 }, { 0x0f, 0x38 }, 380 { 0x10, 0x84 }, { 0x11, 0x07 }, { 0x12, 0x20 }, { 0x13, 0x20 }, 381 { 0x14, 0x00 }, { 0x15, 0x40 }, { 0x16, 0x00 }, { 0x17, 0x40 }, 382 { 0x18, 0xef }, { 0x19, 0x19 }, { 0x1a, 0x20 }, { 0x1b, 0x15 }, 383 { 0x1c, 0x04 }, { 0x1d, 0xc5 }, { 0x1e, 0x95 }, { 0x1f, 0x75 }, 384 { 0x20, 0x1f }, { 0x21, 0x17 }, { 0x22, 0x16 }, { 0x23, 0x80 }, 385 { 0x24, 0x46 }, { 0x25, 0x00 }, { 0x26, 0x90 }, { 0x27, 0x88 } 386}; 387 388static struct urtw_pair urtw_8225v2b_rf_part2[] = { 389 { 0x00, 0x10 }, { 0x01, 0x0d }, { 0x02, 0x01 }, { 0x03, 0x00 }, 390 { 0x04, 0x14 }, { 0x05, 0xfb }, { 0x06, 0xfb }, { 0x07, 0x60 }, 391 { 0x08, 0x00 }, { 0x09, 0x60 }, { 0x0a, 0x00 }, { 0x0b, 0x00 }, 392 { 0x0c, 0x00 }, { 0x0d, 0x5c }, { 0x0e, 0x00 }, { 0x0f, 0x00 }, 393 { 0x10, 0x40 }, { 0x11, 0x00 }, { 0x12, 0x40 }, { 0x13, 0x00 }, 394 { 0x14, 0x00 }, { 0x15, 0x00 }, { 0x16, 0xa8 }, { 0x17, 0x26 }, 395 { 0x18, 0x32 }, { 0x19, 0x33 }, { 0x1a, 0x07 }, { 0x1b, 0xa5 }, 396 { 0x1c, 0x6f }, { 0x1d, 0x55 }, { 0x1e, 0xc8 }, { 0x1f, 0xb3 }, 397 { 0x20, 0x0a }, { 0x21, 0xe1 }, { 0x22, 0x2C }, { 0x23, 0x8a }, 398 { 0x24, 0x86 }, { 0x25, 0x83 }, { 0x26, 0x34 }, { 0x27, 0x0f }, 399 { 0x28, 0x4f }, { 0x29, 0x24 }, { 0x2a, 0x6f }, { 0x2b, 0xc2 }, 400 { 0x2c, 0x6b }, { 0x2d, 0x40 }, { 0x2e, 0x80 }, { 0x2f, 0x00 }, 401 { 0x30, 0xc0 }, { 0x31, 0xc1 }, { 0x32, 0x58 }, { 0x33, 0xf1 }, 402 { 0x34, 0x00 }, { 0x35, 0xe4 }, { 0x36, 0x90 }, { 0x37, 0x3e }, 403 { 0x38, 0x6d }, { 0x39, 0x3c }, { 0x3a, 0xfb }, { 0x3b, 0x07 } 404}; 405 406static struct urtw_pair urtw_8225v2_rf_part3[] = { 407 { 0x00, 0x98 }, { 0x03, 0x20 }, { 0x04, 0x7e }, { 0x05, 0x12 }, 408 { 0x06, 0xfc }, { 0x07, 0x78 }, { 0x08, 0x2e }, { 0x09, 0x11 }, 409 { 0x0a, 0x17 }, { 0x0b, 0x11 }, { 0x10, 0x9b }, { 0x11, 0x88 }, 410 { 0x12, 0x47 }, { 0x13, 0xd0 }, { 0x19, 0x00 }, { 0x1a, 0xa0 }, 411 { 0x1b, 0x08 }, { 0x1d, 0x00 }, { 0x40, 0x86 }, { 0x41, 0x9d }, 412 { 0x42, 0x15 }, { 0x43, 0x18 }, { 0x44, 0x36 }, { 0x45, 0x35 }, 413 { 0x46, 0x2e }, { 0x47, 0x25 }, { 0x48, 0x1c }, { 0x49, 0x12 }, 414 { 0x4a, 0x09 }, { 0x4b, 0x04 }, { 0x4c, 0x05 } 415}; 416 417static uint16_t urtw_8225v2_rxgain[] = { 418 0x0000, 0x0001, 0x0002, 0x0003, 0x0004, 0x0005, 0x0008, 0x0009, 419 0x000a, 0x000b, 0x0102, 0x0103, 0x0104, 0x0105, 0x0140, 0x0141, 420 0x0142, 0x0143, 0x0144, 0x0145, 0x0180, 0x0181, 0x0182, 0x0183, 421 0x0184, 0x0185, 0x0188, 0x0189, 0x018a, 0x018b, 0x0243, 0x0244, 422 0x0245, 0x0280, 0x0281, 0x0282, 0x0283, 0x0284, 0x0285, 0x0288, 423 0x0289, 0x028a, 0x028b, 0x028c, 0x0342, 0x0343, 0x0344, 0x0345, 424 0x0380, 0x0381, 0x0382, 0x0383, 0x0384, 0x0385, 0x0388, 0x0389, 425 0x038a, 0x038b, 0x038c, 0x038d, 0x0390, 0x0391, 0x0392, 0x0393, 426 0x0394, 0x0395, 0x0398, 0x0399, 0x039a, 0x039b, 0x039c, 0x039d, 427 0x03a0, 0x03a1, 0x03a2, 0x03a3, 0x03a4, 0x03a5, 0x03a8, 0x03a9, 428 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 429 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 430}; 431 432static uint16_t urtw_8225v2b_rxgain[] = { 433 0x0400, 0x0401, 0x0402, 0x0403, 0x0404, 0x0405, 0x0408, 0x0409, 434 0x040a, 0x040b, 0x0502, 0x0503, 0x0504, 0x0505, 0x0540, 0x0541, 435 0x0542, 0x0543, 0x0544, 0x0545, 0x0580, 0x0581, 0x0582, 0x0583, 436 0x0584, 0x0585, 0x0588, 0x0589, 0x058a, 0x058b, 0x0643, 0x0644, 437 0x0645, 0x0680, 0x0681, 0x0682, 0x0683, 0x0684, 0x0685, 0x0688, 438 0x0689, 0x068a, 0x068b, 0x068c, 0x0742, 0x0743, 0x0744, 0x0745, 439 0x0780, 0x0781, 0x0782, 0x0783, 0x0784, 0x0785, 0x0788, 0x0789, 440 0x078a, 0x078b, 0x078c, 0x078d, 0x0790, 0x0791, 0x0792, 0x0793, 441 0x0794, 0x0795, 0x0798, 0x0799, 0x079a, 0x079b, 0x079c, 0x079d, 442 0x07a0, 0x07a1, 0x07a2, 0x07a3, 0x07a4, 0x07a5, 0x07a8, 0x07a9, 443 0x03aa, 0x03ab, 0x03ac, 0x03ad, 0x03b0, 0x03b1, 0x03b2, 0x03b3, 444 0x03b4, 0x03b5, 0x03b8, 0x03b9, 0x03ba, 0x03bb, 0x03bb 445}; 446 447static uint8_t urtw_8225v2_tx_gain_cck_ofdm[] = { 448 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 449 0x06, 0x07, 0x08, 0x09, 0x0a, 0x0b, 450 0x0c, 0x0d, 0x0e, 0x0f, 0x10, 0x11, 451 0x12, 0x13, 0x14, 0x15, 0x16, 0x17, 452 0x18, 0x19, 0x1a, 0x1b, 0x1c, 0x1d, 453 0x1e, 0x1f, 0x20, 0x21, 0x22, 0x23, 454}; 455 456static uint8_t urtw_8225v2_txpwr_cck[] = { 457 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04 458}; 459 460static uint8_t urtw_8225v2_txpwr_cck_ch14[] = { 461 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00 462}; 463 464static uint8_t urtw_8225v2b_txpwr_cck[] = { 465 0x36, 0x35, 0x2e, 0x25, 0x1c, 0x12, 0x09, 0x04, 466 0x30, 0x2f, 0x29, 0x21, 0x19, 0x10, 0x08, 0x03, 467 0x2b, 0x2a, 0x25, 0x1e, 0x16, 0x0e, 0x07, 0x03, 468 0x26, 0x25, 0x21, 0x1b, 0x14, 0x0d, 0x06, 0x03 469}; 470 471static uint8_t urtw_8225v2b_txpwr_cck_ch14[] = { 472 0x36, 0x35, 0x2e, 0x1b, 0x00, 0x00, 0x00, 0x00, 473 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 474 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00, 475 0x30, 0x2f, 0x29, 0x15, 0x00, 0x00, 0x00, 0x00 476}; 477 478static struct urtw_pair urtw_ratetable[] = { 479 { 2, 0 }, { 4, 1 }, { 11, 2 }, { 12, 4 }, { 18, 5 }, 480 { 22, 3 }, { 24, 6 }, { 36, 7 }, { 48, 8 }, { 72, 9 }, 481 { 96, 10 }, { 108, 11 } 482}; 483 484#if 0 485static const uint8_t urtw_8187b_reg_table[][3] = { 486 { 0xf0, 0x32, 0 }, { 0xf1, 0x32, 0 }, { 0xf2, 0x00, 0 }, 487 { 0xf3, 0x00, 0 }, { 0xf4, 0x32, 0 }, { 0xf5, 0x43, 0 }, 488 { 0xf6, 0x00, 0 }, { 0xf7, 0x00, 0 }, { 0xf8, 0x46, 0 }, 489 { 0xf9, 0xa4, 0 }, { 0xfa, 0x00, 0 }, { 0xfb, 0x00, 0 }, 490 { 0xfc, 0x96, 0 }, { 0xfd, 0xa4, 0 }, { 0xfe, 0x00, 0 }, 491 { 0xff, 0x00, 0 }, { 0x58, 0x4b, 1 }, { 0x59, 0x00, 1 }, 492 { 0x5a, 0x4b, 1 }, { 0x5b, 0x00, 1 }, { 0x60, 0x4b, 1 }, 493 { 0x61, 0x09, 1 }, { 0x62, 0x4b, 1 }, { 0x63, 0x09, 1 }, 494 { 0xce, 0x0f, 1 }, { 0xcf, 0x00, 1 }, { 0xe0, 0xff, 1 }, 495 { 0xe1, 0x0f, 1 }, { 0xe2, 0x00, 1 }, { 0xf0, 0x4e, 1 }, 496 { 0xf1, 0x01, 1 }, { 0xf2, 0x02, 1 }, { 0xf3, 0x03, 1 }, 497 { 0xf4, 0x04, 1 }, { 0xf5, 0x05, 1 }, { 0xf6, 0x06, 1 }, 498 { 0xf7, 0x07, 1 }, { 0xf8, 0x08, 1 }, { 0x4e, 0x00, 2 }, 499 { 0x0c, 0x04, 2 }, { 0x21, 0x61, 2 }, { 0x22, 0x68, 2 }, 500 { 0x23, 0x6f, 2 }, { 0x24, 0x76, 2 }, { 0x25, 0x7d, 2 }, 501 { 0x26, 0x84, 2 }, { 0x27, 0x8d, 2 }, { 0x4d, 0x08, 2 }, 502 { 0x50, 0x05, 2 }, { 0x51, 0xf5, 2 }, { 0x52, 0x04, 2 }, 503 { 0x53, 0xa0, 2 }, { 0x54, 0x1f, 2 }, { 0x55, 0x23, 2 }, 504 { 0x56, 0x45, 2 }, { 0x57, 0x67, 2 }, { 0x58, 0x08, 2 }, 505 { 0x59, 0x08, 2 }, { 0x5a, 0x08, 2 }, { 0x5b, 0x08, 2 }, 506 { 0x60, 0x08, 2 }, { 0x61, 0x08, 2 }, { 0x62, 0x08, 2 }, 507 { 0x63, 0x08, 2 }, { 0x64, 0xcf, 2 }, { 0x72, 0x56, 2 }, 508 { 0x73, 0x9a, 2 }, { 0x34, 0xf0, 0 }, { 0x35, 0x0f, 0 }, 509 { 0x5b, 0x40, 0 }, { 0x84, 0x88, 0 }, { 0x85, 0x24, 0 }, 510 { 0x88, 0x54, 0 }, { 0x8b, 0xb8, 0 }, { 0x8c, 0x07, 0 }, 511 { 0x8d, 0x00, 0 }, { 0x94, 0x1b, 0 }, { 0x95, 0x12, 0 }, 512 { 0x96, 0x00, 0 }, { 0x97, 0x06, 0 }, { 0x9d, 0x1a, 0 }, 513 { 0x9f, 0x10, 0 }, { 0xb4, 0x22, 0 }, { 0xbe, 0x80, 0 }, 514 { 0xdb, 0x00, 0 }, { 0xee, 0x00, 0 }, { 0x91, 0x03, 0 }, 515 { 0x4c, 0x00, 2 }, { 0x9f, 0x00, 3 }, { 0x8c, 0x01, 0 }, 516 { 0x8d, 0x10, 0 }, { 0x8e, 0x08, 0 }, { 0x8f, 0x00, 0 } 517}; 518#endif 519 520static usb_callback_t urtw_bulk_rx_callback; 521static usb_callback_t urtw_bulk_tx_callback; 522static usb_callback_t urtw_bulk_tx_status_callback; 523 524static const struct usb_config urtw_8187b_usbconfig[URTW_8187B_N_XFERS] = { 525 [URTW_8187B_BULK_RX] = { 526 .type = UE_BULK, 527 .endpoint = 0x83, 528 .direction = UE_DIR_IN, 529 .bufsize = MCLBYTES, 530 .flags = { 531 .ext_buffer = 1, 532 .pipe_bof = 1, 533 .short_xfer_ok = 1 534 }, 535 .callback = urtw_bulk_rx_callback 536 }, 537 [URTW_8187B_BULK_TX_STATUS] = { 538 .type = UE_BULK, 539 .endpoint = 0x89, 540 .direction = UE_DIR_IN, 541 .bufsize = sizeof(uint64_t), 542 .flags = { 543 .pipe_bof = 1, 544 .short_xfer_ok = 1 545 }, 546 .callback = urtw_bulk_tx_status_callback 547 }, 548 [URTW_8187B_BULK_TX_BE] = { 549 .type = UE_BULK, 550 .endpoint = URTW_8187B_TXPIPE_BE, 551 .direction = UE_DIR_OUT, 552 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 553 .flags = { 554 .force_short_xfer = 1, 555 .pipe_bof = 1, 556 }, 557 .callback = urtw_bulk_tx_callback, 558 .timeout = URTW_DATA_TIMEOUT 559 }, 560 [URTW_8187B_BULK_TX_BK] = { 561 .type = UE_BULK, 562 .endpoint = URTW_8187B_TXPIPE_BK, 563 .direction = UE_DIR_OUT, 564 .bufsize = URTW_TX_MAXSIZE, 565 .flags = { 566 .ext_buffer = 1, 567 .force_short_xfer = 1, 568 .pipe_bof = 1, 569 }, 570 .callback = urtw_bulk_tx_callback, 571 .timeout = URTW_DATA_TIMEOUT 572 }, 573 [URTW_8187B_BULK_TX_VI] = { 574 .type = UE_BULK, 575 .endpoint = URTW_8187B_TXPIPE_VI, 576 .direction = UE_DIR_OUT, 577 .bufsize = URTW_TX_MAXSIZE, 578 .flags = { 579 .ext_buffer = 1, 580 .force_short_xfer = 1, 581 .pipe_bof = 1, 582 }, 583 .callback = urtw_bulk_tx_callback, 584 .timeout = URTW_DATA_TIMEOUT 585 }, 586 [URTW_8187B_BULK_TX_VO] = { 587 .type = UE_BULK, 588 .endpoint = URTW_8187B_TXPIPE_VO, 589 .direction = UE_DIR_OUT, 590 .bufsize = URTW_TX_MAXSIZE, 591 .flags = { 592 .ext_buffer = 1, 593 .force_short_xfer = 1, 594 .pipe_bof = 1, 595 }, 596 .callback = urtw_bulk_tx_callback, 597 .timeout = URTW_DATA_TIMEOUT 598 }, 599 [URTW_8187B_BULK_TX_EP12] = { 600 .type = UE_BULK, 601 .endpoint = 0xc, 602 .direction = UE_DIR_OUT, 603 .bufsize = URTW_TX_MAXSIZE, 604 .flags = { 605 .ext_buffer = 1, 606 .force_short_xfer = 1, 607 .pipe_bof = 1, 608 }, 609 .callback = urtw_bulk_tx_callback, 610 .timeout = URTW_DATA_TIMEOUT 611 } 612}; 613 614static const struct usb_config urtw_8187l_usbconfig[URTW_8187L_N_XFERS] = { 615 [URTW_8187L_BULK_RX] = { 616 .type = UE_BULK, 617 .endpoint = 0x81, 618 .direction = UE_DIR_IN, 619 .bufsize = MCLBYTES, 620 .flags = { 621 .ext_buffer = 1, 622 .pipe_bof = 1, 623 .short_xfer_ok = 1 624 }, 625 .callback = urtw_bulk_rx_callback 626 }, 627 [URTW_8187L_BULK_TX_LOW] = { 628 .type = UE_BULK, 629 .endpoint = 0x2, 630 .direction = UE_DIR_OUT, 631 .bufsize = URTW_TX_MAXSIZE * URTW_TX_DATA_LIST_COUNT, 632 .flags = { 633 .force_short_xfer = 1, 634 .pipe_bof = 1, 635 }, 636 .callback = urtw_bulk_tx_callback, 637 .timeout = URTW_DATA_TIMEOUT 638 }, 639 [URTW_8187L_BULK_TX_NORMAL] = { 640 .type = UE_BULK, 641 .endpoint = 0x3, 642 .direction = UE_DIR_OUT, 643 .bufsize = URTW_TX_MAXSIZE, 644 .flags = { 645 .ext_buffer = 1, 646 .force_short_xfer = 1, 647 .pipe_bof = 1, 648 }, 649 .callback = urtw_bulk_tx_callback, 650 .timeout = URTW_DATA_TIMEOUT 651 }, 652}; 653 654static struct ieee80211vap *urtw_vap_create(struct ieee80211com *, 655 const char [IFNAMSIZ], int, enum ieee80211_opmode, 656 int, const uint8_t [IEEE80211_ADDR_LEN], 657 const uint8_t [IEEE80211_ADDR_LEN]); 658static void urtw_vap_delete(struct ieee80211vap *); 659static void urtw_init(struct urtw_softc *); 660static void urtw_stop(struct urtw_softc *); 661static void urtw_parent(struct ieee80211com *); 662static int urtw_transmit(struct ieee80211com *, struct mbuf *); 663static void urtw_start(struct urtw_softc *); 664static int urtw_alloc_rx_data_list(struct urtw_softc *); 665static int urtw_alloc_tx_data_list(struct urtw_softc *); 666static int urtw_raw_xmit(struct ieee80211_node *, struct mbuf *, 667 const struct ieee80211_bpf_params *); 668static void urtw_scan_start(struct ieee80211com *); 669static void urtw_scan_end(struct ieee80211com *); 670static void urtw_getradiocaps(struct ieee80211com *, int, int *, 671 struct ieee80211_channel[]); 672static void urtw_set_channel(struct ieee80211com *); 673static void urtw_update_promisc(struct ieee80211com *); 674static void urtw_update_mcast(struct ieee80211com *); 675static int urtw_tx_start(struct urtw_softc *, 676 struct ieee80211_node *, struct mbuf *, 677 struct urtw_data *, int); 678static int urtw_newstate(struct ieee80211vap *, 679 enum ieee80211_state, int); 680static void urtw_led_ch(void *); 681static void urtw_ledtask(void *, int); 682static void urtw_watchdog(void *); 683static void urtw_set_multi(void *); 684static int urtw_isbmode(uint16_t); 685static uint16_t urtw_rtl2rate(uint32_t); 686static usb_error_t urtw_set_rate(struct urtw_softc *); 687static usb_error_t urtw_update_msr(struct urtw_softc *); 688static usb_error_t urtw_read8_c(struct urtw_softc *, int, uint8_t *); 689static usb_error_t urtw_read16_c(struct urtw_softc *, int, uint16_t *); 690static usb_error_t urtw_read32_c(struct urtw_softc *, int, uint32_t *); 691static usb_error_t urtw_write8_c(struct urtw_softc *, int, uint8_t); 692static usb_error_t urtw_write16_c(struct urtw_softc *, int, uint16_t); 693static usb_error_t urtw_write32_c(struct urtw_softc *, int, uint32_t); 694static usb_error_t urtw_eprom_cs(struct urtw_softc *, int); 695static usb_error_t urtw_eprom_ck(struct urtw_softc *); 696static usb_error_t urtw_eprom_sendbits(struct urtw_softc *, int16_t *, 697 int); 698static usb_error_t urtw_eprom_read32(struct urtw_softc *, uint32_t, 699 uint32_t *); 700static usb_error_t urtw_eprom_readbit(struct urtw_softc *, int16_t *); 701static usb_error_t urtw_eprom_writebit(struct urtw_softc *, int16_t); 702static usb_error_t urtw_get_macaddr(struct urtw_softc *); 703static usb_error_t urtw_get_txpwr(struct urtw_softc *); 704static usb_error_t urtw_get_rfchip(struct urtw_softc *); 705static usb_error_t urtw_led_init(struct urtw_softc *); 706static usb_error_t urtw_8185_rf_pins_enable(struct urtw_softc *); 707static usb_error_t urtw_8185_tx_antenna(struct urtw_softc *, uint8_t); 708static usb_error_t urtw_8187_write_phy(struct urtw_softc *, uint8_t, 709 uint32_t); 710static usb_error_t urtw_8187_write_phy_ofdm_c(struct urtw_softc *, 711 uint8_t, uint32_t); 712static usb_error_t urtw_8187_write_phy_cck_c(struct urtw_softc *, uint8_t, 713 uint32_t); 714static usb_error_t urtw_8225_setgain(struct urtw_softc *, int16_t); 715static usb_error_t urtw_8225_usb_init(struct urtw_softc *); 716static usb_error_t urtw_8225_write_c(struct urtw_softc *, uint8_t, 717 uint16_t); 718static usb_error_t urtw_8225_write_s16(struct urtw_softc *, uint8_t, int, 719 uint16_t *); 720static usb_error_t urtw_8225_read(struct urtw_softc *, uint8_t, 721 uint32_t *); 722static usb_error_t urtw_8225_rf_init(struct urtw_softc *); 723static usb_error_t urtw_8225_rf_set_chan(struct urtw_softc *, int); 724static usb_error_t urtw_8225_rf_set_sens(struct urtw_softc *, int); 725static usb_error_t urtw_8225_set_txpwrlvl(struct urtw_softc *, int); 726static usb_error_t urtw_8225_rf_stop(struct urtw_softc *); 727static usb_error_t urtw_8225v2_rf_init(struct urtw_softc *); 728static usb_error_t urtw_8225v2_rf_set_chan(struct urtw_softc *, int); 729static usb_error_t urtw_8225v2_set_txpwrlvl(struct urtw_softc *, int); 730static usb_error_t urtw_8225v2_setgain(struct urtw_softc *, int16_t); 731static usb_error_t urtw_8225_isv2(struct urtw_softc *, int *); 732static usb_error_t urtw_8225v2b_rf_init(struct urtw_softc *); 733static usb_error_t urtw_8225v2b_rf_set_chan(struct urtw_softc *, int); 734static usb_error_t urtw_read8e(struct urtw_softc *, int, uint8_t *); 735static usb_error_t urtw_write8e(struct urtw_softc *, int, uint8_t); 736static usb_error_t urtw_8180_set_anaparam(struct urtw_softc *, uint32_t); 737static usb_error_t urtw_8185_set_anaparam2(struct urtw_softc *, uint32_t); 738static usb_error_t urtw_intr_enable(struct urtw_softc *); 739static usb_error_t urtw_intr_disable(struct urtw_softc *); 740static usb_error_t urtw_reset(struct urtw_softc *); 741static usb_error_t urtw_led_on(struct urtw_softc *, int); 742static usb_error_t urtw_led_ctl(struct urtw_softc *, int); 743static usb_error_t urtw_led_blink(struct urtw_softc *); 744static usb_error_t urtw_led_mode0(struct urtw_softc *, int); 745static usb_error_t urtw_led_mode1(struct urtw_softc *, int); 746static usb_error_t urtw_led_mode2(struct urtw_softc *, int); 747static usb_error_t urtw_led_mode3(struct urtw_softc *, int); 748static usb_error_t urtw_rx_setconf(struct urtw_softc *); 749static usb_error_t urtw_rx_enable(struct urtw_softc *); 750static usb_error_t urtw_tx_enable(struct urtw_softc *sc); 751static void urtw_free_tx_data_list(struct urtw_softc *); 752static void urtw_free_rx_data_list(struct urtw_softc *); 753static void urtw_free_data_list(struct urtw_softc *, 754 struct urtw_data data[], int, int); 755static usb_error_t urtw_set_macaddr(struct urtw_softc *, const uint8_t *); 756static usb_error_t urtw_adapter_start(struct urtw_softc *); 757static usb_error_t urtw_adapter_start_b(struct urtw_softc *); 758static usb_error_t urtw_set_mode(struct urtw_softc *, uint32_t); 759static usb_error_t urtw_8187b_cmd_reset(struct urtw_softc *); 760static usb_error_t urtw_do_request(struct urtw_softc *, 761 struct usb_device_request *, void *); 762static usb_error_t urtw_8225v2b_set_txpwrlvl(struct urtw_softc *, int); 763static usb_error_t urtw_led_off(struct urtw_softc *, int); 764static void urtw_abort_xfers(struct urtw_softc *); 765static struct urtw_data * 766 urtw_getbuf(struct urtw_softc *sc); 767static int urtw_compute_txtime(uint16_t, uint16_t, uint8_t, 768 uint8_t); 769static void urtw_updateslot(struct ieee80211com *); 770static void urtw_updateslottask(void *, int); 771static void urtw_sysctl_node(struct urtw_softc *); 772 773static int 774urtw_match(device_t dev) 775{ 776 struct usb_attach_arg *uaa = device_get_ivars(dev); 777 778 if (uaa->usb_mode != USB_MODE_HOST) 779 return (ENXIO); 780 if (uaa->info.bConfigIndex != URTW_CONFIG_INDEX) 781 return (ENXIO); 782 if (uaa->info.bIfaceIndex != URTW_IFACE_INDEX) 783 return (ENXIO); 784 785 return (usbd_lookup_id_by_uaa(urtw_devs, sizeof(urtw_devs), uaa)); 786} 787 788static int 789urtw_attach(device_t dev) 790{ 791 const struct usb_config *setup_start; 792 int ret = ENXIO; 793 struct urtw_softc *sc = device_get_softc(dev); 794 struct usb_attach_arg *uaa = device_get_ivars(dev); 795 struct ieee80211com *ic = &sc->sc_ic; 796 uint8_t iface_index = URTW_IFACE_INDEX; /* XXX */ 797 uint16_t n_setup; 798 uint32_t data; 799 usb_error_t error; 800 801 device_set_usb_desc(dev); 802 803 sc->sc_dev = dev; 804 sc->sc_udev = uaa->device; 805 if (USB_GET_DRIVER_INFO(uaa) == URTW_REV_RTL8187B) 806 sc->sc_flags |= URTW_RTL8187B; 807#ifdef URTW_DEBUG 808 sc->sc_debug = urtw_debug; 809#endif 810 811 mtx_init(&sc->sc_mtx, device_get_nameunit(sc->sc_dev), MTX_NETWORK_LOCK, 812 MTX_DEF); 813 usb_callout_init_mtx(&sc->sc_led_ch, &sc->sc_mtx, 0); 814 TASK_INIT(&sc->sc_led_task, 0, urtw_ledtask, sc); 815 TASK_INIT(&sc->sc_updateslot_task, 0, urtw_updateslottask, sc); 816 callout_init(&sc->sc_watchdog_ch, 0); 817 mbufq_init(&sc->sc_snd, ifqmaxlen); 818 819 if (sc->sc_flags & URTW_RTL8187B) { 820 setup_start = urtw_8187b_usbconfig; 821 n_setup = URTW_8187B_N_XFERS; 822 } else { 823 setup_start = urtw_8187l_usbconfig; 824 n_setup = URTW_8187L_N_XFERS; 825 } 826 827 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer, 828 setup_start, n_setup, sc, &sc->sc_mtx); 829 if (error) { 830 device_printf(dev, "could not allocate USB transfers, " 831 "err=%s\n", usbd_errstr(error)); 832 ret = ENXIO; 833 goto fail0; 834 } 835 836 if (sc->sc_flags & URTW_RTL8187B) { 837 sc->sc_tx_dma_buf = 838 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 839 URTW_8187B_BULK_TX_BE], 0); 840 } else { 841 sc->sc_tx_dma_buf = 842 usbd_xfer_get_frame_buffer(sc->sc_xfer[ 843 URTW_8187L_BULK_TX_LOW], 0); 844 } 845 846 URTW_LOCK(sc); 847 848 urtw_read32_m(sc, URTW_RX, &data); 849 sc->sc_epromtype = (data & URTW_RX_9356SEL) ? URTW_EEPROM_93C56 : 850 URTW_EEPROM_93C46; 851 852 error = urtw_get_rfchip(sc); 853 if (error != 0) 854 goto fail; 855 error = urtw_get_macaddr(sc); 856 if (error != 0) 857 goto fail; 858 error = urtw_get_txpwr(sc); 859 if (error != 0) 860 goto fail; 861 error = urtw_led_init(sc); 862 if (error != 0) 863 goto fail; 864 865 URTW_UNLOCK(sc); 866 867 sc->sc_rts_retry = URTW_DEFAULT_RTS_RETRY; 868 sc->sc_tx_retry = URTW_DEFAULT_TX_RETRY; 869 sc->sc_currate = URTW_RIDX_CCK11; 870 sc->sc_preamble_mode = urtw_preamble_mode; 871 872 ic->ic_softc = sc; 873 ic->ic_name = device_get_nameunit(dev); 874 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 875 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 876 877 /* set device capabilities */ 878 ic->ic_caps = 879 IEEE80211_C_STA | /* station mode */ 880 IEEE80211_C_MONITOR | /* monitor mode supported */ 881 IEEE80211_C_TXPMGT | /* tx power management */ 882 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 883 IEEE80211_C_SHSLOT | /* short slot time supported */ 884 IEEE80211_C_BGSCAN | /* capable of bg scanning */ 885 IEEE80211_C_WPA; /* 802.11i */ 886 887 /* XXX TODO: setup regdomain if URTW_EPROM_CHANPLAN_BY_HW bit is set.*/ 888 889 urtw_getradiocaps(ic, IEEE80211_CHAN_MAX, &ic->ic_nchans, 890 ic->ic_channels); 891 892 ieee80211_ifattach(ic); 893 ic->ic_raw_xmit = urtw_raw_xmit; 894 ic->ic_scan_start = urtw_scan_start; 895 ic->ic_scan_end = urtw_scan_end; 896 ic->ic_getradiocaps = urtw_getradiocaps; 897 ic->ic_set_channel = urtw_set_channel; 898 ic->ic_updateslot = urtw_updateslot; 899 ic->ic_vap_create = urtw_vap_create; 900 ic->ic_vap_delete = urtw_vap_delete; 901 ic->ic_update_promisc = urtw_update_promisc; 902 ic->ic_update_mcast = urtw_update_mcast; 903 ic->ic_parent = urtw_parent; 904 ic->ic_transmit = urtw_transmit; 905 906 ieee80211_radiotap_attach(ic, 907 &sc->sc_txtap.wt_ihdr, sizeof(sc->sc_txtap), 908 URTW_TX_RADIOTAP_PRESENT, 909 &sc->sc_rxtap.wr_ihdr, sizeof(sc->sc_rxtap), 910 URTW_RX_RADIOTAP_PRESENT); 911 912 urtw_sysctl_node(sc); 913 914 if (bootverbose) 915 ieee80211_announce(ic); 916 return (0); 917 918fail: 919 URTW_UNLOCK(sc); 920 usbd_transfer_unsetup(sc->sc_xfer, (sc->sc_flags & URTW_RTL8187B) ? 921 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS); 922fail0: 923 return (ret); 924} 925 926static int 927urtw_detach(device_t dev) 928{ 929 struct urtw_softc *sc = device_get_softc(dev); 930 struct ieee80211com *ic = &sc->sc_ic; 931 unsigned int x; 932 unsigned int n_xfers; 933 934 /* Prevent further ioctls */ 935 URTW_LOCK(sc); 936 sc->sc_flags |= URTW_DETACHED; 937 urtw_stop(sc); 938 URTW_UNLOCK(sc); 939 940 ieee80211_draintask(ic, &sc->sc_updateslot_task); 941 ieee80211_draintask(ic, &sc->sc_led_task); 942 943 usb_callout_drain(&sc->sc_led_ch); 944 callout_drain(&sc->sc_watchdog_ch); 945 946 n_xfers = (sc->sc_flags & URTW_RTL8187B) ? 947 URTW_8187B_N_XFERS : URTW_8187L_N_XFERS; 948 949 /* prevent further allocations from RX/TX data lists */ 950 URTW_LOCK(sc); 951 STAILQ_INIT(&sc->sc_tx_active); 952 STAILQ_INIT(&sc->sc_tx_inactive); 953 STAILQ_INIT(&sc->sc_tx_pending); 954 955 STAILQ_INIT(&sc->sc_rx_active); 956 STAILQ_INIT(&sc->sc_rx_inactive); 957 URTW_UNLOCK(sc); 958 959 /* drain USB transfers */ 960 for (x = 0; x != n_xfers; x++) 961 usbd_transfer_drain(sc->sc_xfer[x]); 962 963 /* free data buffers */ 964 URTW_LOCK(sc); 965 urtw_free_tx_data_list(sc); 966 urtw_free_rx_data_list(sc); 967 URTW_UNLOCK(sc); 968 969 /* free USB transfers and some data buffers */ 970 usbd_transfer_unsetup(sc->sc_xfer, n_xfers); 971 972 ieee80211_ifdetach(ic); 973 mbufq_drain(&sc->sc_snd); 974 mtx_destroy(&sc->sc_mtx); 975 return (0); 976} 977 978static void 979urtw_free_tx_data_list(struct urtw_softc *sc) 980{ 981 urtw_free_data_list(sc, sc->sc_tx, URTW_TX_DATA_LIST_COUNT, 0); 982} 983 984static void 985urtw_free_rx_data_list(struct urtw_softc *sc) 986{ 987 urtw_free_data_list(sc, sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1); 988} 989 990static void 991urtw_free_data_list(struct urtw_softc *sc, struct urtw_data data[], int ndata, 992 int fillmbuf) 993{ 994 int i; 995 996 for (i = 0; i < ndata; i++) { 997 struct urtw_data *dp = &data[i]; 998 999 if (fillmbuf == 1) { 1000 if (dp->m != NULL) { 1001 m_freem(dp->m); 1002 dp->m = NULL; 1003 dp->buf = NULL; 1004 } 1005 } else { 1006 dp->buf = NULL; 1007 } 1008 if (dp->ni != NULL) { 1009 ieee80211_free_node(dp->ni); 1010 dp->ni = NULL; 1011 } 1012 } 1013} 1014 1015static struct ieee80211vap * 1016urtw_vap_create(struct ieee80211com *ic, const char name[IFNAMSIZ], int unit, 1017 enum ieee80211_opmode opmode, int flags, 1018 const uint8_t bssid[IEEE80211_ADDR_LEN], 1019 const uint8_t mac[IEEE80211_ADDR_LEN]) 1020{ 1021 struct urtw_vap *uvp; 1022 struct ieee80211vap *vap; 1023 1024 if (!TAILQ_EMPTY(&ic->ic_vaps)) /* only one at a time */ 1025 return (NULL); 1026 uvp = malloc(sizeof(struct urtw_vap), M_80211_VAP, M_WAITOK | M_ZERO); 1027 vap = &uvp->vap; 1028 /* enable s/w bmiss handling for sta mode */ 1029 1030 if (ieee80211_vap_setup(ic, vap, name, unit, opmode, 1031 flags | IEEE80211_CLONE_NOBEACONS, bssid) != 0) { 1032 /* out of memory */ 1033 free(uvp, M_80211_VAP); 1034 return (NULL); 1035 } 1036 1037 /* override state transition machine */ 1038 uvp->newstate = vap->iv_newstate; 1039 vap->iv_newstate = urtw_newstate; 1040 1041 /* complete setup */ 1042 ieee80211_vap_attach(vap, ieee80211_media_change, 1043 ieee80211_media_status, mac); 1044 ic->ic_opmode = opmode; 1045 return (vap); 1046} 1047 1048static void 1049urtw_vap_delete(struct ieee80211vap *vap) 1050{ 1051 struct urtw_vap *uvp = URTW_VAP(vap); 1052 1053 ieee80211_vap_detach(vap); 1054 free(uvp, M_80211_VAP); 1055} 1056 1057static void 1058urtw_init(struct urtw_softc *sc) 1059{ 1060 usb_error_t error; 1061 int ret; 1062 1063 URTW_ASSERT_LOCKED(sc); 1064 1065 if (sc->sc_flags & URTW_RUNNING) 1066 urtw_stop(sc); 1067 1068 error = (sc->sc_flags & URTW_RTL8187B) ? urtw_adapter_start_b(sc) : 1069 urtw_adapter_start(sc); 1070 if (error != 0) 1071 goto fail; 1072 1073 /* reset softc variables */ 1074 sc->sc_txtimer = 0; 1075 1076 if (!(sc->sc_flags & URTW_INIT_ONCE)) { 1077 ret = urtw_alloc_rx_data_list(sc); 1078 if (ret != 0) 1079 goto fail; 1080 ret = urtw_alloc_tx_data_list(sc); 1081 if (ret != 0) 1082 goto fail; 1083 sc->sc_flags |= URTW_INIT_ONCE; 1084 } 1085 1086 error = urtw_rx_enable(sc); 1087 if (error != 0) 1088 goto fail; 1089 error = urtw_tx_enable(sc); 1090 if (error != 0) 1091 goto fail; 1092 1093 if (sc->sc_flags & URTW_RTL8187B) 1094 usbd_transfer_start(sc->sc_xfer[URTW_8187B_BULK_TX_STATUS]); 1095 1096 sc->sc_flags |= URTW_RUNNING; 1097 1098 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1099fail: 1100 return; 1101} 1102 1103static usb_error_t 1104urtw_adapter_start_b(struct urtw_softc *sc) 1105{ 1106 uint8_t data8; 1107 usb_error_t error; 1108 1109 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1110 if (error) 1111 goto fail; 1112 1113 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1114 urtw_write8_m(sc, URTW_CONFIG3, 1115 data8 | URTW_CONFIG3_ANAPARAM_WRITE | URTW_CONFIG3_GNT_SELECT); 1116 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8187B_8225_ANAPARAM2_ON); 1117 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_ON); 1118 urtw_write8_m(sc, URTW_ANAPARAM3, URTW_8187B_8225_ANAPARAM3_ON); 1119 1120 urtw_write8_m(sc, 0x61, 0x10); 1121 urtw_read8_m(sc, 0x62, &data8); 1122 urtw_write8_m(sc, 0x62, data8 & ~(1 << 5)); 1123 urtw_write8_m(sc, 0x62, data8 | (1 << 5)); 1124 1125 urtw_read8_m(sc, URTW_CONFIG3, &data8); 1126 data8 &= ~URTW_CONFIG3_ANAPARAM_WRITE; 1127 urtw_write8_m(sc, URTW_CONFIG3, data8); 1128 1129 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1130 if (error) 1131 goto fail; 1132 1133 error = urtw_8187b_cmd_reset(sc); 1134 if (error) 1135 goto fail; 1136 1137 error = sc->sc_rf_init(sc); 1138 if (error != 0) 1139 goto fail; 1140 urtw_write8_m(sc, URTW_CMD, URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1141 1142 /* fix RTL8187B RX stall */ 1143 error = urtw_intr_enable(sc); 1144 if (error) 1145 goto fail; 1146 1147 error = urtw_write8e(sc, 0x41, 0xf4); 1148 if (error) 1149 goto fail; 1150 error = urtw_write8e(sc, 0x40, 0x00); 1151 if (error) 1152 goto fail; 1153 error = urtw_write8e(sc, 0x42, 0x00); 1154 if (error) 1155 goto fail; 1156 error = urtw_write8e(sc, 0x42, 0x01); 1157 if (error) 1158 goto fail; 1159 error = urtw_write8e(sc, 0x40, 0x0f); 1160 if (error) 1161 goto fail; 1162 error = urtw_write8e(sc, 0x42, 0x00); 1163 if (error) 1164 goto fail; 1165 error = urtw_write8e(sc, 0x42, 0x01); 1166 if (error) 1167 goto fail; 1168 1169 urtw_read8_m(sc, 0xdb, &data8); 1170 urtw_write8_m(sc, 0xdb, data8 | (1 << 2)); 1171 urtw_write16_m(sc, 0x372, 0x59fa); 1172 urtw_write16_m(sc, 0x374, 0x59d2); 1173 urtw_write16_m(sc, 0x376, 0x59d2); 1174 urtw_write16_m(sc, 0x378, 0x19fa); 1175 urtw_write16_m(sc, 0x37a, 0x19fa); 1176 urtw_write16_m(sc, 0x37c, 0x00d0); 1177 urtw_write8_m(sc, 0x61, 0); 1178 1179 urtw_write8_m(sc, 0x180, 0x0f); 1180 urtw_write8_m(sc, 0x183, 0x03); 1181 urtw_write8_m(sc, 0xda, 0x10); 1182 urtw_write8_m(sc, 0x24d, 0x08); 1183 urtw_write32_m(sc, URTW_HSSI_PARA, 0x0600321b); 1184 1185 urtw_write16_m(sc, 0x1ec, 0x800); /* RX MAX SIZE */ 1186fail: 1187 return (error); 1188} 1189 1190static usb_error_t 1191urtw_set_macaddr(struct urtw_softc *sc, const uint8_t *macaddr) 1192{ 1193 usb_error_t error; 1194 1195 urtw_write32_m(sc, URTW_MAC0, ((const uint32_t *)macaddr)[0]); 1196 urtw_write16_m(sc, URTW_MAC4, ((const uint32_t *)macaddr)[1] & 0xffff); 1197 1198fail: 1199 return (error); 1200} 1201 1202static usb_error_t 1203urtw_adapter_start(struct urtw_softc *sc) 1204{ 1205 struct ieee80211com *ic = &sc->sc_ic; 1206 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 1207 const uint8_t *macaddr; 1208 usb_error_t error; 1209 1210 error = urtw_reset(sc); 1211 if (error) 1212 goto fail; 1213 1214 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 0); 1215 urtw_write8_m(sc, URTW_GPIO, 0); 1216 1217 /* for led */ 1218 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1219 error = urtw_led_ctl(sc, URTW_LED_CTL_POWER_ON); 1220 if (error != 0) 1221 goto fail; 1222 1223 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1224 if (error) 1225 goto fail; 1226 /* applying MAC address again. */ 1227 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr; 1228 urtw_set_macaddr(sc, macaddr); 1229 if (error) 1230 goto fail; 1231 1232 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1233 if (error) 1234 goto fail; 1235 1236 error = urtw_update_msr(sc); 1237 if (error) 1238 goto fail; 1239 1240 urtw_write32_m(sc, URTW_INT_TIMEOUT, 0); 1241 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 1242 urtw_write8_m(sc, URTW_RATE_FALLBACK, URTW_RATE_FALLBACK_ENABLE | 0x1); 1243 error = urtw_set_rate(sc); 1244 if (error != 0) 1245 goto fail; 1246 1247 error = sc->sc_rf_init(sc); 1248 if (error != 0) 1249 goto fail; 1250 if (sc->sc_rf_set_sens != NULL) 1251 sc->sc_rf_set_sens(sc, sc->sc_sens); 1252 1253 /* XXX correct? to call write16 */ 1254 urtw_write16_m(sc, URTW_PSR, 1); 1255 urtw_write16_m(sc, URTW_ADDR_MAGIC2, 0x10); 1256 urtw_write8_m(sc, URTW_TALLY_SEL, 0x80); 1257 urtw_write8_m(sc, URTW_ADDR_MAGIC3, 0x60); 1258 /* XXX correct? to call write16 */ 1259 urtw_write16_m(sc, URTW_PSR, 0); 1260 urtw_write8_m(sc, URTW_ADDR_MAGIC1, 4); 1261 1262 error = urtw_intr_enable(sc); 1263 if (error != 0) 1264 goto fail; 1265 1266fail: 1267 return (error); 1268} 1269 1270static usb_error_t 1271urtw_set_mode(struct urtw_softc *sc, uint32_t mode) 1272{ 1273 uint8_t data; 1274 usb_error_t error; 1275 1276 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 1277 data = (data & ~URTW_EPROM_CMD_MASK) | (mode << URTW_EPROM_CMD_SHIFT); 1278 data = data & ~(URTW_EPROM_CS | URTW_EPROM_CK); 1279 urtw_write8_m(sc, URTW_EPROM_CMD, data); 1280fail: 1281 return (error); 1282} 1283 1284static usb_error_t 1285urtw_8187b_cmd_reset(struct urtw_softc *sc) 1286{ 1287 int i; 1288 uint8_t data8; 1289 usb_error_t error; 1290 1291 /* XXX the code can be duplicate with urtw_reset(). */ 1292 urtw_read8_m(sc, URTW_CMD, &data8); 1293 data8 = (data8 & 0x2) | URTW_CMD_RST; 1294 urtw_write8_m(sc, URTW_CMD, data8); 1295 1296 for (i = 0; i < 20; i++) { 1297 usb_pause_mtx(&sc->sc_mtx, 2); 1298 urtw_read8_m(sc, URTW_CMD, &data8); 1299 if (!(data8 & URTW_CMD_RST)) 1300 break; 1301 } 1302 if (i >= 20) { 1303 device_printf(sc->sc_dev, "reset timeout\n"); 1304 goto fail; 1305 } 1306fail: 1307 return (error); 1308} 1309 1310static usb_error_t 1311urtw_do_request(struct urtw_softc *sc, 1312 struct usb_device_request *req, void *data) 1313{ 1314 usb_error_t err; 1315 int ntries = 10; 1316 1317 URTW_ASSERT_LOCKED(sc); 1318 1319 while (ntries--) { 1320 err = usbd_do_request_flags(sc->sc_udev, &sc->sc_mtx, 1321 req, data, 0, NULL, 250 /* ms */); 1322 if (err == 0) 1323 break; 1324 1325 DPRINTF(sc, URTW_DEBUG_INIT, 1326 "Control request failed, %s (retrying)\n", 1327 usbd_errstr(err)); 1328 usb_pause_mtx(&sc->sc_mtx, hz / 100); 1329 } 1330 return (err); 1331} 1332 1333static void 1334urtw_stop(struct urtw_softc *sc) 1335{ 1336 uint8_t data8; 1337 usb_error_t error; 1338 1339 URTW_ASSERT_LOCKED(sc); 1340 1341 sc->sc_flags &= ~URTW_RUNNING; 1342 1343 error = urtw_intr_disable(sc); 1344 if (error) 1345 goto fail; 1346 urtw_read8_m(sc, URTW_CMD, &data8); 1347 data8 &= ~(URTW_CMD_RX_ENABLE | URTW_CMD_TX_ENABLE); 1348 urtw_write8_m(sc, URTW_CMD, data8); 1349 1350 error = sc->sc_rf_stop(sc); 1351 if (error != 0) 1352 goto fail; 1353 1354 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 1355 if (error) 1356 goto fail; 1357 urtw_read8_m(sc, URTW_CONFIG4, &data8); 1358 urtw_write8_m(sc, URTW_CONFIG4, data8 | URTW_CONFIG4_VCOOFF); 1359 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 1360 if (error) 1361 goto fail; 1362fail: 1363 if (error) 1364 device_printf(sc->sc_dev, "failed to stop (%s)\n", 1365 usbd_errstr(error)); 1366 1367 usb_callout_stop(&sc->sc_led_ch); 1368 callout_stop(&sc->sc_watchdog_ch); 1369 1370 urtw_abort_xfers(sc); 1371} 1372 1373static void 1374urtw_abort_xfers(struct urtw_softc *sc) 1375{ 1376 int i, max; 1377 1378 URTW_ASSERT_LOCKED(sc); 1379 1380 max = (sc->sc_flags & URTW_RTL8187B) ? URTW_8187B_N_XFERS : 1381 URTW_8187L_N_XFERS; 1382 1383 /* abort any pending transfers */ 1384 for (i = 0; i < max; i++) 1385 usbd_transfer_stop(sc->sc_xfer[i]); 1386} 1387 1388static void 1389urtw_parent(struct ieee80211com *ic) 1390{ 1391 struct urtw_softc *sc = ic->ic_softc; 1392 int startall = 0; 1393 1394 URTW_LOCK(sc); 1395 if (sc->sc_flags & URTW_DETACHED) { 1396 URTW_UNLOCK(sc); 1397 return; 1398 } 1399 1400 if (ic->ic_nrunning > 0) { 1401 if (sc->sc_flags & URTW_RUNNING) { 1402 if (ic->ic_promisc > 0 || ic->ic_allmulti > 0) 1403 urtw_set_multi(sc); 1404 } else { 1405 urtw_init(sc); 1406 startall = 1; 1407 } 1408 } else if (sc->sc_flags & URTW_RUNNING) 1409 urtw_stop(sc); 1410 URTW_UNLOCK(sc); 1411 if (startall) 1412 ieee80211_start_all(ic); 1413} 1414 1415static int 1416urtw_transmit(struct ieee80211com *ic, struct mbuf *m) 1417{ 1418 struct urtw_softc *sc = ic->ic_softc; 1419 int error; 1420 1421 URTW_LOCK(sc); 1422 if ((sc->sc_flags & URTW_RUNNING) == 0) { 1423 URTW_UNLOCK(sc); 1424 return (ENXIO); 1425 } 1426 error = mbufq_enqueue(&sc->sc_snd, m); 1427 if (error) { 1428 URTW_UNLOCK(sc); 1429 return (error); 1430 } 1431 urtw_start(sc); 1432 URTW_UNLOCK(sc); 1433 1434 return (0); 1435} 1436 1437static void 1438urtw_start(struct urtw_softc *sc) 1439{ 1440 struct urtw_data *bf; 1441 struct ieee80211_node *ni; 1442 struct mbuf *m; 1443 1444 URTW_ASSERT_LOCKED(sc); 1445 1446 if ((sc->sc_flags & URTW_RUNNING) == 0) 1447 return; 1448 1449 while ((m = mbufq_dequeue(&sc->sc_snd)) != NULL) { 1450 bf = urtw_getbuf(sc); 1451 if (bf == NULL) { 1452 mbufq_prepend(&sc->sc_snd, m); 1453 break; 1454 } 1455 1456 ni = (struct ieee80211_node *)m->m_pkthdr.rcvif; 1457 m->m_pkthdr.rcvif = NULL; 1458 1459 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_NORMAL) != 0) { 1460 if_inc_counter(ni->ni_vap->iv_ifp, 1461 IFCOUNTER_OERRORS, 1); 1462 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1463 ieee80211_free_node(ni); 1464 break; 1465 } 1466 1467 sc->sc_txtimer = 5; 1468 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1469 } 1470} 1471 1472static int 1473urtw_alloc_data_list(struct urtw_softc *sc, struct urtw_data data[], 1474 int ndata, int maxsz, void *dma_buf) 1475{ 1476 int i, error; 1477 1478 for (i = 0; i < ndata; i++) { 1479 struct urtw_data *dp = &data[i]; 1480 1481 dp->sc = sc; 1482 if (dma_buf == NULL) { 1483 dp->m = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 1484 if (dp->m == NULL) { 1485 device_printf(sc->sc_dev, 1486 "could not allocate rx mbuf\n"); 1487 error = ENOMEM; 1488 goto fail; 1489 } 1490 dp->buf = mtod(dp->m, uint8_t *); 1491 } else { 1492 dp->m = NULL; 1493 dp->buf = ((uint8_t *)dma_buf) + 1494 (i * maxsz); 1495 } 1496 dp->ni = NULL; 1497 } 1498 return (0); 1499 1500fail: urtw_free_data_list(sc, data, ndata, 1); 1501 return (error); 1502} 1503 1504static int 1505urtw_alloc_rx_data_list(struct urtw_softc *sc) 1506{ 1507 int error, i; 1508 1509 error = urtw_alloc_data_list(sc, 1510 sc->sc_rx, URTW_RX_DATA_LIST_COUNT, 1511 MCLBYTES, NULL /* mbufs */); 1512 if (error != 0) 1513 return (error); 1514 1515 STAILQ_INIT(&sc->sc_rx_active); 1516 STAILQ_INIT(&sc->sc_rx_inactive); 1517 1518 for (i = 0; i < URTW_RX_DATA_LIST_COUNT; i++) 1519 STAILQ_INSERT_HEAD(&sc->sc_rx_inactive, &sc->sc_rx[i], next); 1520 1521 return (0); 1522} 1523 1524static int 1525urtw_alloc_tx_data_list(struct urtw_softc *sc) 1526{ 1527 int error, i; 1528 1529 error = urtw_alloc_data_list(sc, 1530 sc->sc_tx, URTW_TX_DATA_LIST_COUNT, URTW_TX_MAXSIZE, 1531 sc->sc_tx_dma_buf /* no mbufs */); 1532 if (error != 0) 1533 return (error); 1534 1535 STAILQ_INIT(&sc->sc_tx_active); 1536 STAILQ_INIT(&sc->sc_tx_inactive); 1537 STAILQ_INIT(&sc->sc_tx_pending); 1538 1539 for (i = 0; i < URTW_TX_DATA_LIST_COUNT; i++) 1540 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, &sc->sc_tx[i], 1541 next); 1542 1543 return (0); 1544} 1545 1546static int 1547urtw_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 1548 const struct ieee80211_bpf_params *params) 1549{ 1550 struct ieee80211com *ic = ni->ni_ic; 1551 struct urtw_softc *sc = ic->ic_softc; 1552 struct urtw_data *bf; 1553 1554 /* prevent management frames from being sent if we're not ready */ 1555 if (!(sc->sc_flags & URTW_RUNNING)) { 1556 m_freem(m); 1557 return ENETDOWN; 1558 } 1559 URTW_LOCK(sc); 1560 bf = urtw_getbuf(sc); 1561 if (bf == NULL) { 1562 m_freem(m); 1563 URTW_UNLOCK(sc); 1564 return (ENOBUFS); /* XXX */ 1565 } 1566 1567 if (urtw_tx_start(sc, ni, m, bf, URTW_PRIORITY_LOW) != 0) { 1568 STAILQ_INSERT_HEAD(&sc->sc_tx_inactive, bf, next); 1569 URTW_UNLOCK(sc); 1570 return (EIO); 1571 } 1572 URTW_UNLOCK(sc); 1573 1574 sc->sc_txtimer = 5; 1575 return (0); 1576} 1577 1578static void 1579urtw_scan_start(struct ieee80211com *ic) 1580{ 1581 1582 /* XXX do nothing? */ 1583} 1584 1585static void 1586urtw_scan_end(struct ieee80211com *ic) 1587{ 1588 1589 /* XXX do nothing? */ 1590} 1591 1592static void 1593urtw_getradiocaps(struct ieee80211com *ic, 1594 int maxchans, int *nchans, struct ieee80211_channel chans[]) 1595{ 1596 uint8_t bands[IEEE80211_MODE_BYTES]; 1597 1598 memset(bands, 0, sizeof(bands)); 1599 setbit(bands, IEEE80211_MODE_11B); 1600 setbit(bands, IEEE80211_MODE_11G); 1601 ieee80211_add_channels_default_2ghz(chans, maxchans, nchans, bands, 0); 1602} 1603 1604static void 1605urtw_set_channel(struct ieee80211com *ic) 1606{ 1607 struct urtw_softc *sc = ic->ic_softc; 1608 uint32_t data, orig; 1609 usb_error_t error; 1610 1611 /* 1612 * if the user set a channel explicitly using ifconfig(8) this function 1613 * can be called earlier than we're expected that in some cases the 1614 * initialization would be failed if setting a channel is called before 1615 * the init have done. 1616 */ 1617 if (!(sc->sc_flags & URTW_RUNNING)) 1618 return; 1619 1620 if (sc->sc_curchan != NULL && sc->sc_curchan == ic->ic_curchan) 1621 return; 1622 1623 URTW_LOCK(sc); 1624 1625 /* 1626 * during changing th channel we need to temporarily be disable 1627 * TX. 1628 */ 1629 urtw_read32_m(sc, URTW_TX_CONF, &orig); 1630 data = orig & ~URTW_TX_LOOPBACK_MASK; 1631 urtw_write32_m(sc, URTW_TX_CONF, data | URTW_TX_LOOPBACK_MAC); 1632 1633 error = sc->sc_rf_set_chan(sc, ieee80211_chan2ieee(ic, ic->ic_curchan)); 1634 if (error != 0) 1635 goto fail; 1636 usb_pause_mtx(&sc->sc_mtx, 10); 1637 urtw_write32_m(sc, URTW_TX_CONF, orig); 1638 1639 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1640 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1641 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 1642 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1643 1644fail: 1645 URTW_UNLOCK(sc); 1646 1647 sc->sc_curchan = ic->ic_curchan; 1648 1649 if (error != 0) 1650 device_printf(sc->sc_dev, "could not change the channel\n"); 1651} 1652 1653static void 1654urtw_update_promisc(struct ieee80211com *ic) 1655{ 1656 struct urtw_softc *sc = ic->ic_softc; 1657 1658 URTW_LOCK(sc); 1659 if (sc->sc_flags & URTW_RUNNING) 1660 urtw_rx_setconf(sc); 1661 URTW_UNLOCK(sc); 1662} 1663 1664static void 1665urtw_update_mcast(struct ieee80211com *ic) 1666{ 1667 1668 /* XXX do nothing? */ 1669} 1670 1671static int 1672urtw_tx_start(struct urtw_softc *sc, struct ieee80211_node *ni, struct mbuf *m0, 1673 struct urtw_data *data, int prior) 1674{ 1675 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 1676 struct ieee80211_key *k; 1677 const struct ieee80211_txparam *tp = ni->ni_txparms; 1678 struct ieee80211com *ic = &sc->sc_ic; 1679 struct ieee80211vap *vap = ni->ni_vap; 1680 struct usb_xfer *rtl8187b_pipes[URTW_8187B_TXPIPE_MAX] = { 1681 sc->sc_xfer[URTW_8187B_BULK_TX_BE], 1682 sc->sc_xfer[URTW_8187B_BULK_TX_BK], 1683 sc->sc_xfer[URTW_8187B_BULK_TX_VI], 1684 sc->sc_xfer[URTW_8187B_BULK_TX_VO] 1685 }; 1686 struct usb_xfer *xfer; 1687 int dur = 0, rtsdur = 0, rtsenable = 0, ctsenable = 0, rate, type, 1688 pkttime = 0, txdur = 0, isshort = 0, xferlen, ismcast; 1689 uint16_t acktime, rtstime, ctstime; 1690 uint32_t flags; 1691 usb_error_t error; 1692 1693 URTW_ASSERT_LOCKED(sc); 1694 1695 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1696 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1697 1698 /* 1699 * Software crypto. 1700 */ 1701 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) { 1702 k = ieee80211_crypto_encap(ni, m0); 1703 if (k == NULL) { 1704 device_printf(sc->sc_dev, 1705 "ieee80211_crypto_encap returns NULL.\n"); 1706 /* XXX we don't expect the fragmented frames */ 1707 m_freem(m0); 1708 return (ENOBUFS); 1709 } 1710 1711 /* in case packet header moved, reset pointer */ 1712 wh = mtod(m0, struct ieee80211_frame *); 1713 } 1714 1715 if (ieee80211_radiotap_active_vap(vap)) { 1716 struct urtw_tx_radiotap_header *tap = &sc->sc_txtap; 1717 1718 tap->wt_flags = 0; 1719 ieee80211_radiotap_tx(vap, m0); 1720 } 1721 1722 if (type == IEEE80211_FC0_TYPE_MGT || 1723 type == IEEE80211_FC0_TYPE_CTL || 1724 (m0->m_flags & M_EAPOL) != 0) { 1725 rate = tp->mgmtrate; 1726 } else { 1727 /* for data frames */ 1728 if (ismcast) 1729 rate = tp->mcastrate; 1730 else if (tp->ucastrate != IEEE80211_FIXED_RATE_NONE) 1731 rate = tp->ucastrate; 1732 else 1733 rate = urtw_rtl2rate(sc->sc_currate); 1734 } 1735 1736 sc->sc_stats.txrates[sc->sc_currate]++; 1737 1738 if (ismcast) 1739 txdur = pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1740 IEEE80211_CRC_LEN, rate, 0, 0); 1741 else { 1742 acktime = urtw_compute_txtime(14, 2,0, 0); 1743 if ((m0->m_pkthdr.len + 4) > vap->iv_rtsthreshold) { 1744 rtsenable = 1; 1745 ctsenable = 0; 1746 rtstime = urtw_compute_txtime(URTW_ACKCTS_LEN, 2, 0, 0); 1747 ctstime = urtw_compute_txtime(14, 2, 0, 0); 1748 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1749 IEEE80211_CRC_LEN, rate, 0, isshort); 1750 rtsdur = ctstime + pkttime + acktime + 1751 3 * URTW_ASIFS_TIME; 1752 txdur = rtstime + rtsdur; 1753 } else { 1754 rtsenable = ctsenable = rtsdur = 0; 1755 pkttime = urtw_compute_txtime(m0->m_pkthdr.len + 1756 IEEE80211_CRC_LEN, rate, 0, isshort); 1757 txdur = pkttime + URTW_ASIFS_TIME + acktime; 1758 } 1759 1760 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1761 dur = urtw_compute_txtime(m0->m_pkthdr.len + 1762 IEEE80211_CRC_LEN, rate, 0, isshort) + 1763 3 * URTW_ASIFS_TIME + 1764 2 * acktime; 1765 else 1766 dur = URTW_ASIFS_TIME + acktime; 1767 } 1768 USETW(wh->i_dur, dur); 1769 1770 xferlen = m0->m_pkthdr.len; 1771 xferlen += (sc->sc_flags & URTW_RTL8187B) ? (4 * 8) : (4 * 3); 1772 if ((0 == xferlen % 64) || (0 == xferlen % 512)) 1773 xferlen += 1; 1774 1775 memset(data->buf, 0, URTW_TX_MAXSIZE); 1776 flags = m0->m_pkthdr.len & 0xfff; 1777 flags |= URTW_TX_FLAG_NO_ENC; 1778 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1779 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE) && 1780 (sc->sc_preamble_mode == URTW_PREAMBLE_MODE_SHORT) && 1781 (sc->sc_currate != 0)) 1782 flags |= URTW_TX_FLAG_SPLCP; 1783 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) 1784 flags |= URTW_TX_FLAG_MOREFRAG; 1785 1786 flags |= (sc->sc_currate & 0xf) << URTW_TX_FLAG_TXRATE_SHIFT; 1787 1788 if (sc->sc_flags & URTW_RTL8187B) { 1789 struct urtw_8187b_txhdr *tx; 1790 1791 tx = (struct urtw_8187b_txhdr *)data->buf; 1792 if (ctsenable) 1793 flags |= URTW_TX_FLAG_CTS; 1794 if (rtsenable) { 1795 flags |= URTW_TX_FLAG_RTS; 1796 flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT; 1797 tx->rtsdur = rtsdur; 1798 } 1799 tx->flag = htole32(flags); 1800 tx->txdur = txdur; 1801 if (type == IEEE80211_FC0_TYPE_MGT && 1802 (wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) == 1803 IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1804 tx->retry = 1; 1805 else 1806 tx->retry = URTW_TX_MAXRETRY; 1807 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1808 } else { 1809 struct urtw_8187l_txhdr *tx; 1810 1811 tx = (struct urtw_8187l_txhdr *)data->buf; 1812 if (rtsenable) { 1813 flags |= URTW_TX_FLAG_RTS; 1814 tx->rtsdur = rtsdur; 1815 } 1816 flags |= URTW_RIDX_CCK5 << URTW_TX_FLAG_RTSRATE_SHIFT; 1817 tx->flag = htole32(flags); 1818 tx->retry = 3; /* CW minimum */ 1819 tx->retry |= 7 << 4; /* CW maximum */ 1820 tx->retry |= URTW_TX_MAXRETRY << 8; /* retry limitation */ 1821 m_copydata(m0, 0, m0->m_pkthdr.len, (uint8_t *)(tx + 1)); 1822 } 1823 1824 data->buflen = xferlen; 1825 data->ni = ni; 1826 data->m = m0; 1827 1828 if (sc->sc_flags & URTW_RTL8187B) { 1829 switch (type) { 1830 case IEEE80211_FC0_TYPE_CTL: 1831 case IEEE80211_FC0_TYPE_MGT: 1832 xfer = sc->sc_xfer[URTW_8187B_BULK_TX_EP12]; 1833 break; 1834 default: 1835 KASSERT(M_WME_GETAC(m0) < URTW_8187B_TXPIPE_MAX, 1836 ("unsupported WME pipe %d", M_WME_GETAC(m0))); 1837 xfer = rtl8187b_pipes[M_WME_GETAC(m0)]; 1838 break; 1839 } 1840 } else 1841 xfer = (prior == URTW_PRIORITY_LOW) ? 1842 sc->sc_xfer[URTW_8187L_BULK_TX_LOW] : 1843 sc->sc_xfer[URTW_8187L_BULK_TX_NORMAL]; 1844 1845 STAILQ_INSERT_TAIL(&sc->sc_tx_pending, data, next); 1846 usbd_transfer_start(xfer); 1847 1848 error = urtw_led_ctl(sc, URTW_LED_CTL_TX); 1849 if (error != 0) 1850 device_printf(sc->sc_dev, "could not control LED (%d)\n", 1851 error); 1852 return (0); 1853} 1854 1855static int 1856urtw_newstate(struct ieee80211vap *vap, enum ieee80211_state nstate, int arg) 1857{ 1858 struct ieee80211com *ic = vap->iv_ic; 1859 struct urtw_softc *sc = ic->ic_softc; 1860 struct urtw_vap *uvp = URTW_VAP(vap); 1861 struct ieee80211_node *ni; 1862 usb_error_t error = 0; 1863 1864 DPRINTF(sc, URTW_DEBUG_STATE, "%s: %s -> %s\n", __func__, 1865 ieee80211_state_name[vap->iv_state], 1866 ieee80211_state_name[nstate]); 1867 1868 sc->sc_state = nstate; 1869 1870 IEEE80211_UNLOCK(ic); 1871 URTW_LOCK(sc); 1872 usb_callout_stop(&sc->sc_led_ch); 1873 callout_stop(&sc->sc_watchdog_ch); 1874 1875 switch (nstate) { 1876 case IEEE80211_S_INIT: 1877 case IEEE80211_S_SCAN: 1878 case IEEE80211_S_AUTH: 1879 case IEEE80211_S_ASSOC: 1880 break; 1881 case IEEE80211_S_RUN: 1882 ni = ieee80211_ref_node(vap->iv_bss); 1883 /* setting bssid. */ 1884 urtw_write32_m(sc, URTW_BSSID, ((uint32_t *)ni->ni_bssid)[0]); 1885 urtw_write16_m(sc, URTW_BSSID + 4, 1886 ((uint16_t *)ni->ni_bssid)[2]); 1887 urtw_update_msr(sc); 1888 /* XXX maybe the below would be incorrect. */ 1889 urtw_write16_m(sc, URTW_ATIM_WND, 2); 1890 urtw_write16_m(sc, URTW_ATIM_TR_ITV, 100); 1891 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 0x64); 1892 urtw_write16_m(sc, URTW_BEACON_INTERVAL_TIME, 100); 1893 error = urtw_led_ctl(sc, URTW_LED_CTL_LINK); 1894 if (error != 0) 1895 device_printf(sc->sc_dev, 1896 "could not control LED (%d)\n", error); 1897 ieee80211_free_node(ni); 1898 break; 1899 default: 1900 break; 1901 } 1902fail: 1903 URTW_UNLOCK(sc); 1904 IEEE80211_LOCK(ic); 1905 return (uvp->newstate(vap, nstate, arg)); 1906} 1907 1908static void 1909urtw_watchdog(void *arg) 1910{ 1911 struct urtw_softc *sc = arg; 1912 struct ieee80211com *ic = &sc->sc_ic; 1913 1914 if (sc->sc_txtimer > 0) { 1915 if (--sc->sc_txtimer == 0) { 1916 device_printf(sc->sc_dev, "device timeout\n"); 1917 counter_u64_add(ic->ic_oerrors, 1); 1918 ieee80211_restart_all(ic); 1919 return; 1920 } 1921 callout_reset(&sc->sc_watchdog_ch, hz, urtw_watchdog, sc); 1922 } 1923} 1924 1925static void 1926urtw_set_multi(void *arg) 1927{ 1928 /* XXX don't know how to set a device. Lack of docs. */ 1929} 1930 1931static usb_error_t 1932urtw_set_rate(struct urtw_softc *sc) 1933{ 1934 int i, basic_rate, min_rr_rate, max_rr_rate; 1935 uint16_t data; 1936 usb_error_t error; 1937 1938 basic_rate = URTW_RIDX_OFDM24; 1939 min_rr_rate = URTW_RIDX_OFDM6; 1940 max_rr_rate = URTW_RIDX_OFDM24; 1941 1942 urtw_write8_m(sc, URTW_RESP_RATE, 1943 max_rr_rate << URTW_RESP_MAX_RATE_SHIFT | 1944 min_rr_rate << URTW_RESP_MIN_RATE_SHIFT); 1945 1946 urtw_read16_m(sc, URTW_BRSR, &data); 1947 data &= ~URTW_BRSR_MBR_8185; 1948 1949 for (i = 0; i <= basic_rate; i++) 1950 data |= (1 << i); 1951 1952 urtw_write16_m(sc, URTW_BRSR, data); 1953fail: 1954 return (error); 1955} 1956 1957static uint16_t 1958urtw_rtl2rate(uint32_t rate) 1959{ 1960 unsigned int i; 1961 1962 for (i = 0; i < nitems(urtw_ratetable); i++) { 1963 if (rate == urtw_ratetable[i].val) 1964 return urtw_ratetable[i].reg; 1965 } 1966 1967 return (0); 1968} 1969 1970static usb_error_t 1971urtw_update_msr(struct urtw_softc *sc) 1972{ 1973 struct ieee80211com *ic = &sc->sc_ic; 1974 uint8_t data; 1975 usb_error_t error; 1976 1977 urtw_read8_m(sc, URTW_MSR, &data); 1978 data &= ~URTW_MSR_LINK_MASK; 1979 1980 if (sc->sc_state == IEEE80211_S_RUN) { 1981 switch (ic->ic_opmode) { 1982 case IEEE80211_M_STA: 1983 case IEEE80211_M_MONITOR: 1984 data |= URTW_MSR_LINK_STA; 1985 if (sc->sc_flags & URTW_RTL8187B) 1986 data |= URTW_MSR_LINK_ENEDCA; 1987 break; 1988 case IEEE80211_M_IBSS: 1989 data |= URTW_MSR_LINK_ADHOC; 1990 break; 1991 case IEEE80211_M_HOSTAP: 1992 data |= URTW_MSR_LINK_HOSTAP; 1993 break; 1994 default: 1995 DPRINTF(sc, URTW_DEBUG_STATE, 1996 "unsupported operation mode 0x%x\n", 1997 ic->ic_opmode); 1998 error = USB_ERR_INVAL; 1999 goto fail; 2000 } 2001 } else 2002 data |= URTW_MSR_LINK_NONE; 2003 2004 urtw_write8_m(sc, URTW_MSR, data); 2005fail: 2006 return (error); 2007} 2008 2009static usb_error_t 2010urtw_read8_c(struct urtw_softc *sc, int val, uint8_t *data) 2011{ 2012 struct usb_device_request req; 2013 usb_error_t error; 2014 2015 URTW_ASSERT_LOCKED(sc); 2016 2017 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2018 req.bRequest = URTW_8187_GETREGS_REQ; 2019 USETW(req.wValue, (val & 0xff) | 0xff00); 2020 USETW(req.wIndex, (val >> 8) & 0x3); 2021 USETW(req.wLength, sizeof(uint8_t)); 2022 2023 error = urtw_do_request(sc, &req, data); 2024 return (error); 2025} 2026 2027static usb_error_t 2028urtw_read16_c(struct urtw_softc *sc, int val, uint16_t *data) 2029{ 2030 struct usb_device_request req; 2031 usb_error_t error; 2032 2033 URTW_ASSERT_LOCKED(sc); 2034 2035 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2036 req.bRequest = URTW_8187_GETREGS_REQ; 2037 USETW(req.wValue, (val & 0xff) | 0xff00); 2038 USETW(req.wIndex, (val >> 8) & 0x3); 2039 USETW(req.wLength, sizeof(uint16_t)); 2040 2041 error = urtw_do_request(sc, &req, data); 2042 return (error); 2043} 2044 2045static usb_error_t 2046urtw_read32_c(struct urtw_softc *sc, int val, uint32_t *data) 2047{ 2048 struct usb_device_request req; 2049 usb_error_t error; 2050 2051 URTW_ASSERT_LOCKED(sc); 2052 2053 req.bmRequestType = UT_READ_VENDOR_DEVICE; 2054 req.bRequest = URTW_8187_GETREGS_REQ; 2055 USETW(req.wValue, (val & 0xff) | 0xff00); 2056 USETW(req.wIndex, (val >> 8) & 0x3); 2057 USETW(req.wLength, sizeof(uint32_t)); 2058 2059 error = urtw_do_request(sc, &req, data); 2060 return (error); 2061} 2062 2063static usb_error_t 2064urtw_write8_c(struct urtw_softc *sc, int val, uint8_t data) 2065{ 2066 struct usb_device_request req; 2067 2068 URTW_ASSERT_LOCKED(sc); 2069 2070 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2071 req.bRequest = URTW_8187_SETREGS_REQ; 2072 USETW(req.wValue, (val & 0xff) | 0xff00); 2073 USETW(req.wIndex, (val >> 8) & 0x3); 2074 USETW(req.wLength, sizeof(uint8_t)); 2075 2076 return (urtw_do_request(sc, &req, &data)); 2077} 2078 2079static usb_error_t 2080urtw_write16_c(struct urtw_softc *sc, int val, uint16_t data) 2081{ 2082 struct usb_device_request req; 2083 2084 URTW_ASSERT_LOCKED(sc); 2085 2086 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2087 req.bRequest = URTW_8187_SETREGS_REQ; 2088 USETW(req.wValue, (val & 0xff) | 0xff00); 2089 USETW(req.wIndex, (val >> 8) & 0x3); 2090 USETW(req.wLength, sizeof(uint16_t)); 2091 2092 return (urtw_do_request(sc, &req, &data)); 2093} 2094 2095static usb_error_t 2096urtw_write32_c(struct urtw_softc *sc, int val, uint32_t data) 2097{ 2098 struct usb_device_request req; 2099 2100 URTW_ASSERT_LOCKED(sc); 2101 2102 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2103 req.bRequest = URTW_8187_SETREGS_REQ; 2104 USETW(req.wValue, (val & 0xff) | 0xff00); 2105 USETW(req.wIndex, (val >> 8) & 0x3); 2106 USETW(req.wLength, sizeof(uint32_t)); 2107 2108 return (urtw_do_request(sc, &req, &data)); 2109} 2110 2111static usb_error_t 2112urtw_get_macaddr(struct urtw_softc *sc) 2113{ 2114 struct ieee80211com *ic = &sc->sc_ic; 2115 uint32_t data; 2116 usb_error_t error; 2117 2118 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR, &data); 2119 if (error != 0) 2120 goto fail; 2121 ic->ic_macaddr[0] = data & 0xff; 2122 ic->ic_macaddr[1] = (data & 0xff00) >> 8; 2123 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 1, &data); 2124 if (error != 0) 2125 goto fail; 2126 ic->ic_macaddr[2] = data & 0xff; 2127 ic->ic_macaddr[3] = (data & 0xff00) >> 8; 2128 error = urtw_eprom_read32(sc, URTW_EPROM_MACADDR + 2, &data); 2129 if (error != 0) 2130 goto fail; 2131 ic->ic_macaddr[4] = data & 0xff; 2132 ic->ic_macaddr[5] = (data & 0xff00) >> 8; 2133fail: 2134 return (error); 2135} 2136 2137static usb_error_t 2138urtw_eprom_read32(struct urtw_softc *sc, uint32_t addr, uint32_t *data) 2139{ 2140#define URTW_READCMD_LEN 3 2141 int addrlen, i; 2142 int16_t addrstr[8], data16, readcmd[] = { 1, 1, 0 }; 2143 usb_error_t error; 2144 2145 /* NB: make sure the buffer is initialized */ 2146 *data = 0; 2147 2148 /* enable EPROM programming */ 2149 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_PROGRAM_MODE); 2150 DELAY(URTW_EPROM_DELAY); 2151 2152 error = urtw_eprom_cs(sc, URTW_EPROM_ENABLE); 2153 if (error != 0) 2154 goto fail; 2155 error = urtw_eprom_ck(sc); 2156 if (error != 0) 2157 goto fail; 2158 error = urtw_eprom_sendbits(sc, readcmd, URTW_READCMD_LEN); 2159 if (error != 0) 2160 goto fail; 2161 if (sc->sc_epromtype == URTW_EEPROM_93C56) { 2162 addrlen = 8; 2163 addrstr[0] = addr & (1 << 7); 2164 addrstr[1] = addr & (1 << 6); 2165 addrstr[2] = addr & (1 << 5); 2166 addrstr[3] = addr & (1 << 4); 2167 addrstr[4] = addr & (1 << 3); 2168 addrstr[5] = addr & (1 << 2); 2169 addrstr[6] = addr & (1 << 1); 2170 addrstr[7] = addr & (1 << 0); 2171 } else { 2172 addrlen=6; 2173 addrstr[0] = addr & (1 << 5); 2174 addrstr[1] = addr & (1 << 4); 2175 addrstr[2] = addr & (1 << 3); 2176 addrstr[3] = addr & (1 << 2); 2177 addrstr[4] = addr & (1 << 1); 2178 addrstr[5] = addr & (1 << 0); 2179 } 2180 error = urtw_eprom_sendbits(sc, addrstr, addrlen); 2181 if (error != 0) 2182 goto fail; 2183 2184 error = urtw_eprom_writebit(sc, 0); 2185 if (error != 0) 2186 goto fail; 2187 2188 for (i = 0; i < 16; i++) { 2189 error = urtw_eprom_ck(sc); 2190 if (error != 0) 2191 goto fail; 2192 error = urtw_eprom_readbit(sc, &data16); 2193 if (error != 0) 2194 goto fail; 2195 2196 (*data) |= (data16 << (15 - i)); 2197 } 2198 2199 error = urtw_eprom_cs(sc, URTW_EPROM_DISABLE); 2200 if (error != 0) 2201 goto fail; 2202 error = urtw_eprom_ck(sc); 2203 if (error != 0) 2204 goto fail; 2205 2206 /* now disable EPROM programming */ 2207 urtw_write8_m(sc, URTW_EPROM_CMD, URTW_EPROM_CMD_NORMAL_MODE); 2208fail: 2209 return (error); 2210#undef URTW_READCMD_LEN 2211} 2212 2213static usb_error_t 2214urtw_eprom_cs(struct urtw_softc *sc, int able) 2215{ 2216 uint8_t data; 2217 usb_error_t error; 2218 2219 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2220 if (able == URTW_EPROM_ENABLE) 2221 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CS); 2222 else 2223 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CS); 2224 DELAY(URTW_EPROM_DELAY); 2225fail: 2226 return (error); 2227} 2228 2229static usb_error_t 2230urtw_eprom_ck(struct urtw_softc *sc) 2231{ 2232 uint8_t data; 2233 usb_error_t error; 2234 2235 /* masking */ 2236 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2237 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_CK); 2238 DELAY(URTW_EPROM_DELAY); 2239 /* unmasking */ 2240 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2241 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_CK); 2242 DELAY(URTW_EPROM_DELAY); 2243fail: 2244 return (error); 2245} 2246 2247static usb_error_t 2248urtw_eprom_readbit(struct urtw_softc *sc, int16_t *data) 2249{ 2250 uint8_t data8; 2251 usb_error_t error; 2252 2253 urtw_read8_m(sc, URTW_EPROM_CMD, &data8); 2254 *data = (data8 & URTW_EPROM_READBIT) ? 1 : 0; 2255 DELAY(URTW_EPROM_DELAY); 2256 2257fail: 2258 return (error); 2259} 2260 2261static usb_error_t 2262urtw_eprom_writebit(struct urtw_softc *sc, int16_t bit) 2263{ 2264 uint8_t data; 2265 usb_error_t error; 2266 2267 urtw_read8_m(sc, URTW_EPROM_CMD, &data); 2268 if (bit != 0) 2269 urtw_write8_m(sc, URTW_EPROM_CMD, data | URTW_EPROM_WRITEBIT); 2270 else 2271 urtw_write8_m(sc, URTW_EPROM_CMD, data & ~URTW_EPROM_WRITEBIT); 2272 DELAY(URTW_EPROM_DELAY); 2273fail: 2274 return (error); 2275} 2276 2277static usb_error_t 2278urtw_eprom_sendbits(struct urtw_softc *sc, int16_t *buf, int buflen) 2279{ 2280 int i = 0; 2281 usb_error_t error = 0; 2282 2283 for (i = 0; i < buflen; i++) { 2284 error = urtw_eprom_writebit(sc, buf[i]); 2285 if (error != 0) 2286 goto fail; 2287 error = urtw_eprom_ck(sc); 2288 if (error != 0) 2289 goto fail; 2290 } 2291fail: 2292 return (error); 2293} 2294 2295 2296static usb_error_t 2297urtw_get_txpwr(struct urtw_softc *sc) 2298{ 2299 int i, j; 2300 uint32_t data; 2301 usb_error_t error; 2302 2303 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW_BASE, &data); 2304 if (error != 0) 2305 goto fail; 2306 sc->sc_txpwr_cck_base = data & 0xf; 2307 sc->sc_txpwr_ofdm_base = (data >> 4) & 0xf; 2308 2309 for (i = 1, j = 0; i < 6; i += 2, j++) { 2310 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW0 + j, &data); 2311 if (error != 0) 2312 goto fail; 2313 sc->sc_txpwr_cck[i] = data & 0xf; 2314 sc->sc_txpwr_cck[i + 1] = (data & 0xf00) >> 8; 2315 sc->sc_txpwr_ofdm[i] = (data & 0xf0) >> 4; 2316 sc->sc_txpwr_ofdm[i + 1] = (data & 0xf000) >> 12; 2317 } 2318 for (i = 1, j = 0; i < 4; i += 2, j++) { 2319 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW1 + j, &data); 2320 if (error != 0) 2321 goto fail; 2322 sc->sc_txpwr_cck[i + 6] = data & 0xf; 2323 sc->sc_txpwr_cck[i + 6 + 1] = (data & 0xf00) >> 8; 2324 sc->sc_txpwr_ofdm[i + 6] = (data & 0xf0) >> 4; 2325 sc->sc_txpwr_ofdm[i + 6 + 1] = (data & 0xf000) >> 12; 2326 } 2327 if (sc->sc_flags & URTW_RTL8187B) { 2328 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2, &data); 2329 if (error != 0) 2330 goto fail; 2331 sc->sc_txpwr_cck[1 + 6 + 4] = data & 0xf; 2332 sc->sc_txpwr_ofdm[1 + 6 + 4] = (data & 0xf0) >> 4; 2333 error = urtw_eprom_read32(sc, 0x0a, &data); 2334 if (error != 0) 2335 goto fail; 2336 sc->sc_txpwr_cck[2 + 6 + 4] = data & 0xf; 2337 sc->sc_txpwr_ofdm[2 + 6 + 4] = (data & 0xf0) >> 4; 2338 error = urtw_eprom_read32(sc, 0x1c, &data); 2339 if (error != 0) 2340 goto fail; 2341 sc->sc_txpwr_cck[3 + 6 + 4] = data & 0xf; 2342 sc->sc_txpwr_cck[3 + 6 + 4 + 1] = (data & 0xf00) >> 8; 2343 sc->sc_txpwr_ofdm[3 + 6 + 4] = (data & 0xf0) >> 4; 2344 sc->sc_txpwr_ofdm[3 + 6 + 4 + 1] = (data & 0xf000) >> 12; 2345 } else { 2346 for (i = 1, j = 0; i < 4; i += 2, j++) { 2347 error = urtw_eprom_read32(sc, URTW_EPROM_TXPW2 + j, 2348 &data); 2349 if (error != 0) 2350 goto fail; 2351 sc->sc_txpwr_cck[i + 6 + 4] = data & 0xf; 2352 sc->sc_txpwr_cck[i + 6 + 4 + 1] = (data & 0xf00) >> 8; 2353 sc->sc_txpwr_ofdm[i + 6 + 4] = (data & 0xf0) >> 4; 2354 sc->sc_txpwr_ofdm[i + 6 + 4 + 1] = (data & 0xf000) >> 12; 2355 } 2356 } 2357fail: 2358 return (error); 2359} 2360 2361 2362static usb_error_t 2363urtw_get_rfchip(struct urtw_softc *sc) 2364{ 2365 int ret; 2366 uint8_t data8; 2367 uint32_t data; 2368 usb_error_t error; 2369 2370 if (sc->sc_flags & URTW_RTL8187B) { 2371 urtw_read8_m(sc, 0xe1, &data8); 2372 switch (data8) { 2373 case 0: 2374 sc->sc_flags |= URTW_RTL8187B_REV_B; 2375 break; 2376 case 1: 2377 sc->sc_flags |= URTW_RTL8187B_REV_D; 2378 break; 2379 case 2: 2380 sc->sc_flags |= URTW_RTL8187B_REV_E; 2381 break; 2382 default: 2383 device_printf(sc->sc_dev, "unknown type: %#x\n", data8); 2384 sc->sc_flags |= URTW_RTL8187B_REV_B; 2385 break; 2386 } 2387 } else { 2388 urtw_read32_m(sc, URTW_TX_CONF, &data); 2389 switch (data & URTW_TX_HWMASK) { 2390 case URTW_TX_R8187vD_B: 2391 sc->sc_flags |= URTW_RTL8187B; 2392 break; 2393 case URTW_TX_R8187vD: 2394 break; 2395 default: 2396 device_printf(sc->sc_dev, "unknown RTL8187L type: %#x\n", 2397 data & URTW_TX_HWMASK); 2398 break; 2399 } 2400 } 2401 2402 error = urtw_eprom_read32(sc, URTW_EPROM_RFCHIPID, &data); 2403 if (error != 0) 2404 goto fail; 2405 switch (data & 0xff) { 2406 case URTW_EPROM_RFCHIPID_RTL8225U: 2407 error = urtw_8225_isv2(sc, &ret); 2408 if (error != 0) 2409 goto fail; 2410 if (ret == 0) { 2411 sc->sc_rf_init = urtw_8225_rf_init; 2412 sc->sc_rf_set_sens = urtw_8225_rf_set_sens; 2413 sc->sc_rf_set_chan = urtw_8225_rf_set_chan; 2414 sc->sc_rf_stop = urtw_8225_rf_stop; 2415 } else { 2416 sc->sc_rf_init = urtw_8225v2_rf_init; 2417 sc->sc_rf_set_chan = urtw_8225v2_rf_set_chan; 2418 sc->sc_rf_stop = urtw_8225_rf_stop; 2419 } 2420 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2421 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2422 break; 2423 case URTW_EPROM_RFCHIPID_RTL8225Z2: 2424 sc->sc_rf_init = urtw_8225v2b_rf_init; 2425 sc->sc_rf_set_chan = urtw_8225v2b_rf_set_chan; 2426 sc->sc_max_sens = URTW_8225_RF_MAX_SENS; 2427 sc->sc_sens = URTW_8225_RF_DEF_SENS; 2428 sc->sc_rf_stop = urtw_8225_rf_stop; 2429 break; 2430 default: 2431 DPRINTF(sc, URTW_DEBUG_STATE, 2432 "unsupported RF chip %d\n", data & 0xff); 2433 error = USB_ERR_INVAL; 2434 goto fail; 2435 } 2436 2437 device_printf(sc->sc_dev, "%s rf %s hwrev %s\n", 2438 (sc->sc_flags & URTW_RTL8187B) ? "rtl8187b" : "rtl8187l", 2439 ((data & 0xff) == URTW_EPROM_RFCHIPID_RTL8225U) ? "rtl8225u" : 2440 "rtl8225z2", 2441 (sc->sc_flags & URTW_RTL8187B) ? ((data8 == 0) ? "b" : 2442 (data8 == 1) ? "d" : "e") : "none"); 2443 2444fail: 2445 return (error); 2446} 2447 2448 2449static usb_error_t 2450urtw_led_init(struct urtw_softc *sc) 2451{ 2452 uint32_t rev; 2453 usb_error_t error; 2454 2455 urtw_read8_m(sc, URTW_PSR, &sc->sc_psr); 2456 error = urtw_eprom_read32(sc, URTW_EPROM_SWREV, &rev); 2457 if (error != 0) 2458 goto fail; 2459 2460 switch (rev & URTW_EPROM_CID_MASK) { 2461 case URTW_EPROM_CID_ALPHA0: 2462 sc->sc_strategy = URTW_SW_LED_MODE1; 2463 break; 2464 case URTW_EPROM_CID_SERCOMM_PS: 2465 sc->sc_strategy = URTW_SW_LED_MODE3; 2466 break; 2467 case URTW_EPROM_CID_HW_LED: 2468 sc->sc_strategy = URTW_HW_LED; 2469 break; 2470 case URTW_EPROM_CID_RSVD0: 2471 case URTW_EPROM_CID_RSVD1: 2472 default: 2473 sc->sc_strategy = URTW_SW_LED_MODE0; 2474 break; 2475 } 2476 2477 sc->sc_gpio_ledpin = URTW_LED_PIN_GPIO0; 2478 2479fail: 2480 return (error); 2481} 2482 2483 2484static usb_error_t 2485urtw_8225_rf_init(struct urtw_softc *sc) 2486{ 2487 unsigned int i; 2488 uint16_t data; 2489 usb_error_t error; 2490 2491 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2492 if (error) 2493 goto fail; 2494 2495 error = urtw_8225_usb_init(sc); 2496 if (error) 2497 goto fail; 2498 2499 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2500 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2501 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2502 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2503 2504 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2505 if (error) 2506 goto fail; 2507 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2508 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2509 if (error) 2510 goto fail; 2511 2512 error = urtw_8185_rf_pins_enable(sc); 2513 if (error) 2514 goto fail; 2515 usb_pause_mtx(&sc->sc_mtx, 1000); 2516 2517 for (i = 0; i < nitems(urtw_8225_rf_part1); i++) { 2518 urtw_8225_write(sc, urtw_8225_rf_part1[i].reg, 2519 urtw_8225_rf_part1[i].val); 2520 usb_pause_mtx(&sc->sc_mtx, 1); 2521 } 2522 usb_pause_mtx(&sc->sc_mtx, 100); 2523 urtw_8225_write(sc, 2524 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2525 usb_pause_mtx(&sc->sc_mtx, 200); 2526 urtw_8225_write(sc, 2527 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2528 usb_pause_mtx(&sc->sc_mtx, 200); 2529 urtw_8225_write(sc, 2530 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC3); 2531 2532 for (i = 0; i < 95; i++) { 2533 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2534 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, urtw_8225_rxgain[i]); 2535 } 2536 2537 urtw_8225_write(sc, 2538 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC4); 2539 urtw_8225_write(sc, 2540 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC5); 2541 2542 for (i = 0; i < 128; i++) { 2543 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2544 usb_pause_mtx(&sc->sc_mtx, 1); 2545 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2546 usb_pause_mtx(&sc->sc_mtx, 1); 2547 } 2548 2549 for (i = 0; i < nitems(urtw_8225_rf_part2); i++) { 2550 urtw_8187_write_phy_ofdm(sc, urtw_8225_rf_part2[i].reg, 2551 urtw_8225_rf_part2[i].val); 2552 usb_pause_mtx(&sc->sc_mtx, 1); 2553 } 2554 2555 error = urtw_8225_setgain(sc, 4); 2556 if (error) 2557 goto fail; 2558 2559 for (i = 0; i < nitems(urtw_8225_rf_part3); i++) { 2560 urtw_8187_write_phy_cck(sc, urtw_8225_rf_part3[i].reg, 2561 urtw_8225_rf_part3[i].val); 2562 usb_pause_mtx(&sc->sc_mtx, 1); 2563 } 2564 2565 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2566 2567 error = urtw_8225_set_txpwrlvl(sc, 1); 2568 if (error) 2569 goto fail; 2570 2571 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2572 usb_pause_mtx(&sc->sc_mtx, 1); 2573 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2574 usb_pause_mtx(&sc->sc_mtx, 1); 2575 2576 /* TX ant A, 0x0 for B */ 2577 error = urtw_8185_tx_antenna(sc, 0x3); 2578 if (error) 2579 goto fail; 2580 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2581 2582 error = urtw_8225_rf_set_chan(sc, 1); 2583fail: 2584 return (error); 2585} 2586 2587static usb_error_t 2588urtw_8185_rf_pins_enable(struct urtw_softc *sc) 2589{ 2590 usb_error_t error = 0; 2591 2592 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1ff7); 2593fail: 2594 return (error); 2595} 2596 2597static usb_error_t 2598urtw_8185_tx_antenna(struct urtw_softc *sc, uint8_t ant) 2599{ 2600 usb_error_t error; 2601 2602 urtw_write8_m(sc, URTW_TX_ANTENNA, ant); 2603 usb_pause_mtx(&sc->sc_mtx, 1); 2604fail: 2605 return (error); 2606} 2607 2608static usb_error_t 2609urtw_8187_write_phy_ofdm_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2610{ 2611 2612 data = data & 0xff; 2613 return urtw_8187_write_phy(sc, addr, data); 2614} 2615 2616static usb_error_t 2617urtw_8187_write_phy_cck_c(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2618{ 2619 2620 data = data & 0xff; 2621 return urtw_8187_write_phy(sc, addr, data | 0x10000); 2622} 2623 2624static usb_error_t 2625urtw_8187_write_phy(struct urtw_softc *sc, uint8_t addr, uint32_t data) 2626{ 2627 uint32_t phyw; 2628 usb_error_t error; 2629 2630 phyw = ((data << 8) | (addr | 0x80)); 2631 urtw_write8_m(sc, URTW_PHY_MAGIC4, ((phyw & 0xff000000) >> 24)); 2632 urtw_write8_m(sc, URTW_PHY_MAGIC3, ((phyw & 0x00ff0000) >> 16)); 2633 urtw_write8_m(sc, URTW_PHY_MAGIC2, ((phyw & 0x0000ff00) >> 8)); 2634 urtw_write8_m(sc, URTW_PHY_MAGIC1, ((phyw & 0x000000ff))); 2635 usb_pause_mtx(&sc->sc_mtx, 1); 2636fail: 2637 return (error); 2638} 2639 2640static usb_error_t 2641urtw_8225_setgain(struct urtw_softc *sc, int16_t gain) 2642{ 2643 usb_error_t error; 2644 2645 urtw_8187_write_phy_ofdm(sc, 0x0d, urtw_8225_gain[gain * 4]); 2646 urtw_8187_write_phy_ofdm(sc, 0x1b, urtw_8225_gain[gain * 4 + 2]); 2647 urtw_8187_write_phy_ofdm(sc, 0x1d, urtw_8225_gain[gain * 4 + 3]); 2648 urtw_8187_write_phy_ofdm(sc, 0x23, urtw_8225_gain[gain * 4 + 1]); 2649fail: 2650 return (error); 2651} 2652 2653static usb_error_t 2654urtw_8225_usb_init(struct urtw_softc *sc) 2655{ 2656 uint8_t data; 2657 usb_error_t error; 2658 2659 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 0); 2660 urtw_write8_m(sc, URTW_GPIO, 0); 2661 error = urtw_read8e(sc, 0x53, &data); 2662 if (error) 2663 goto fail; 2664 error = urtw_write8e(sc, 0x53, data | (1 << 7)); 2665 if (error) 2666 goto fail; 2667 urtw_write8_m(sc, URTW_RF_PINS_SELECT + 1, 4); 2668 urtw_write8_m(sc, URTW_GPIO, 0x20); 2669 urtw_write8_m(sc, URTW_GP_ENABLE, 0); 2670 2671 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x80); 2672 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x80); 2673 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x80); 2674 2675 usb_pause_mtx(&sc->sc_mtx, 500); 2676fail: 2677 return (error); 2678} 2679 2680static usb_error_t 2681urtw_8225_write_c(struct urtw_softc *sc, uint8_t addr, uint16_t data) 2682{ 2683 uint16_t d80, d82, d84; 2684 usb_error_t error; 2685 2686 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &d80); 2687 d80 &= URTW_RF_PINS_MAGIC1; 2688 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &d82); 2689 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &d84); 2690 d84 &= URTW_RF_PINS_MAGIC2; 2691 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, d82 | URTW_RF_PINS_MAGIC3); 2692 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84 | URTW_RF_PINS_MAGIC3); 2693 DELAY(10); 2694 2695 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2696 DELAY(2); 2697 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80); 2698 DELAY(10); 2699 2700 error = urtw_8225_write_s16(sc, addr, 0x8225, &data); 2701 if (error != 0) 2702 goto fail; 2703 2704 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2705 DELAY(10); 2706 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, d80 | URTW_BB_HOST_BANG_EN); 2707 urtw_write16_m(sc, URTW_RF_PINS_SELECT, d84); 2708 usb_pause_mtx(&sc->sc_mtx, 2); 2709fail: 2710 return (error); 2711} 2712 2713static usb_error_t 2714urtw_8225_write_s16(struct urtw_softc *sc, uint8_t addr, int index, 2715 uint16_t *data) 2716{ 2717 uint8_t buf[2]; 2718 uint16_t data16; 2719 struct usb_device_request req; 2720 usb_error_t error = 0; 2721 2722 data16 = *data; 2723 2724 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 2725 req.bRequest = URTW_8187_SETREGS_REQ; 2726 USETW(req.wValue, addr); 2727 USETW(req.wIndex, index); 2728 USETW(req.wLength, sizeof(uint16_t)); 2729 buf[0] = (data16 & 0x00ff); 2730 buf[1] = (data16 & 0xff00) >> 8; 2731 2732 error = urtw_do_request(sc, &req, buf); 2733 2734 return (error); 2735} 2736 2737static usb_error_t 2738urtw_8225_rf_set_chan(struct urtw_softc *sc, int chan) 2739{ 2740 usb_error_t error; 2741 2742 error = urtw_8225_set_txpwrlvl(sc, chan); 2743 if (error) 2744 goto fail; 2745 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2746 usb_pause_mtx(&sc->sc_mtx, 10); 2747fail: 2748 return (error); 2749} 2750 2751static usb_error_t 2752urtw_8225_rf_set_sens(struct urtw_softc *sc, int sens) 2753{ 2754 usb_error_t error; 2755 2756 if (sens < 0 || sens > 6) 2757 return -1; 2758 2759 if (sens > 4) 2760 urtw_8225_write(sc, 2761 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC1); 2762 else 2763 urtw_8225_write(sc, 2764 URTW_8225_ADDR_C_MAGIC, URTW_8225_ADDR_C_DATA_MAGIC2); 2765 2766 sens = 6 - sens; 2767 error = urtw_8225_setgain(sc, sens); 2768 if (error) 2769 goto fail; 2770 2771 urtw_8187_write_phy_cck(sc, 0x41, urtw_8225_threshold[sens]); 2772 2773fail: 2774 return (error); 2775} 2776 2777static usb_error_t 2778urtw_8225_set_txpwrlvl(struct urtw_softc *sc, int chan) 2779{ 2780 int i, idx, set; 2781 uint8_t *cck_pwltable; 2782 uint8_t cck_pwrlvl_max, ofdm_pwrlvl_min, ofdm_pwrlvl_max; 2783 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 2784 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 2785 usb_error_t error; 2786 2787 cck_pwrlvl_max = 11; 2788 ofdm_pwrlvl_max = 25; /* 12 -> 25 */ 2789 ofdm_pwrlvl_min = 10; 2790 2791 /* CCK power setting */ 2792 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 2793 idx = cck_pwrlvl % 6; 2794 set = cck_pwrlvl / 6; 2795 cck_pwltable = (chan == 14) ? urtw_8225_txpwr_cck_ch14 : 2796 urtw_8225_txpwr_cck; 2797 2798 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 2799 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2800 for (i = 0; i < 8; i++) { 2801 urtw_8187_write_phy_cck(sc, 0x44 + i, 2802 cck_pwltable[idx * 8 + i]); 2803 } 2804 usb_pause_mtx(&sc->sc_mtx, 1); 2805 2806 /* OFDM power setting */ 2807 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 2808 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 2809 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 2810 2811 idx = ofdm_pwrlvl % 6; 2812 set = ofdm_pwrlvl / 6; 2813 2814 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 2815 if (error) 2816 goto fail; 2817 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 2818 urtw_8187_write_phy_ofdm(sc, 6, 0); 2819 urtw_8187_write_phy_ofdm(sc, 8, 0); 2820 2821 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 2822 urtw_8225_tx_gain_cck_ofdm[set] >> 1); 2823 urtw_8187_write_phy_ofdm(sc, 0x5, urtw_8225_txpwr_ofdm[idx]); 2824 urtw_8187_write_phy_ofdm(sc, 0x7, urtw_8225_txpwr_ofdm[idx]); 2825 usb_pause_mtx(&sc->sc_mtx, 1); 2826fail: 2827 return (error); 2828} 2829 2830 2831static usb_error_t 2832urtw_8225_rf_stop(struct urtw_softc *sc) 2833{ 2834 uint8_t data; 2835 usb_error_t error; 2836 2837 urtw_8225_write(sc, 0x4, 0x1f); 2838 2839 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2840 if (error) 2841 goto fail; 2842 2843 urtw_read8_m(sc, URTW_CONFIG3, &data); 2844 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 2845 if (sc->sc_flags & URTW_RTL8187B) { 2846 urtw_write32_m(sc, URTW_ANAPARAM2, 2847 URTW_8187B_8225_ANAPARAM2_OFF); 2848 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8187B_8225_ANAPARAM_OFF); 2849 urtw_write32_m(sc, URTW_ANAPARAM3, 2850 URTW_8187B_8225_ANAPARAM3_OFF); 2851 } else { 2852 urtw_write32_m(sc, URTW_ANAPARAM2, URTW_8225_ANAPARAM2_OFF); 2853 urtw_write32_m(sc, URTW_ANAPARAM, URTW_8225_ANAPARAM_OFF); 2854 } 2855 2856 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 2857 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2858 if (error) 2859 goto fail; 2860 2861fail: 2862 return (error); 2863} 2864 2865static usb_error_t 2866urtw_8225v2_rf_init(struct urtw_softc *sc) 2867{ 2868 unsigned int i; 2869 uint16_t data; 2870 uint32_t data32; 2871 usb_error_t error; 2872 2873 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 2874 if (error) 2875 goto fail; 2876 2877 error = urtw_8225_usb_init(sc); 2878 if (error) 2879 goto fail; 2880 2881 urtw_write32_m(sc, URTW_RF_TIMING, 0x000a8008); 2882 urtw_read16_m(sc, URTW_BRSR, &data); /* XXX ??? */ 2883 urtw_write16_m(sc, URTW_BRSR, 0xffff); 2884 urtw_write32_m(sc, URTW_RF_PARA, 0x100044); 2885 2886 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 2887 if (error) 2888 goto fail; 2889 urtw_write8_m(sc, URTW_CONFIG3, 0x44); 2890 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 2891 if (error) 2892 goto fail; 2893 2894 error = urtw_8185_rf_pins_enable(sc); 2895 if (error) 2896 goto fail; 2897 2898 usb_pause_mtx(&sc->sc_mtx, 500); 2899 2900 for (i = 0; i < nitems(urtw_8225v2_rf_part1); i++) { 2901 urtw_8225_write(sc, urtw_8225v2_rf_part1[i].reg, 2902 urtw_8225v2_rf_part1[i].val); 2903 } 2904 usb_pause_mtx(&sc->sc_mtx, 50); 2905 2906 urtw_8225_write(sc, 2907 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC1); 2908 2909 for (i = 0; i < 95; i++) { 2910 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 2911 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 2912 urtw_8225v2_rxgain[i]); 2913 } 2914 2915 urtw_8225_write(sc, 2916 URTW_8225_ADDR_3_MAGIC, URTW_8225_ADDR_3_DATA_MAGIC1); 2917 urtw_8225_write(sc, 2918 URTW_8225_ADDR_5_MAGIC, URTW_8225_ADDR_5_DATA_MAGIC1); 2919 urtw_8225_write(sc, 2920 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC2); 2921 urtw_8225_write(sc, 2922 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2923 usb_pause_mtx(&sc->sc_mtx, 100); 2924 urtw_8225_write(sc, 2925 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2926 usb_pause_mtx(&sc->sc_mtx, 100); 2927 2928 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2929 if (error != 0) 2930 goto fail; 2931 if (data32 != URTW_8225_ADDR_6_DATA_MAGIC1) 2932 device_printf(sc->sc_dev, "expect 0xe6!! (0x%x)\n", data32); 2933 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) { 2934 urtw_8225_write(sc, 2935 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC1); 2936 usb_pause_mtx(&sc->sc_mtx, 100); 2937 urtw_8225_write(sc, 2938 URTW_8225_ADDR_2_MAGIC, URTW_8225_ADDR_2_DATA_MAGIC2); 2939 usb_pause_mtx(&sc->sc_mtx, 50); 2940 error = urtw_8225_read(sc, URTW_8225_ADDR_6_MAGIC, &data32); 2941 if (error != 0) 2942 goto fail; 2943 if (!(data32 & URTW_8225_ADDR_6_DATA_MAGIC2)) 2944 device_printf(sc->sc_dev, "RF calibration failed\n"); 2945 } 2946 usb_pause_mtx(&sc->sc_mtx, 100); 2947 2948 urtw_8225_write(sc, 2949 URTW_8225_ADDR_0_MAGIC, URTW_8225_ADDR_0_DATA_MAGIC6); 2950 for (i = 0; i < 128; i++) { 2951 urtw_8187_write_phy_ofdm(sc, 0xb, urtw_8225_agc[i]); 2952 urtw_8187_write_phy_ofdm(sc, 0xa, (uint8_t)i + 0x80); 2953 } 2954 2955 for (i = 0; i < nitems(urtw_8225v2_rf_part2); i++) { 2956 urtw_8187_write_phy_ofdm(sc, urtw_8225v2_rf_part2[i].reg, 2957 urtw_8225v2_rf_part2[i].val); 2958 } 2959 2960 error = urtw_8225v2_setgain(sc, 4); 2961 if (error) 2962 goto fail; 2963 2964 for (i = 0; i < nitems(urtw_8225v2_rf_part3); i++) { 2965 urtw_8187_write_phy_cck(sc, urtw_8225v2_rf_part3[i].reg, 2966 urtw_8225v2_rf_part3[i].val); 2967 } 2968 2969 urtw_write8_m(sc, URTW_TESTR, 0x0d); 2970 2971 error = urtw_8225v2_set_txpwrlvl(sc, 1); 2972 if (error) 2973 goto fail; 2974 2975 urtw_8187_write_phy_cck(sc, 0x10, 0x9b); 2976 urtw_8187_write_phy_ofdm(sc, 0x26, 0x90); 2977 2978 /* TX ant A, 0x0 for B */ 2979 error = urtw_8185_tx_antenna(sc, 0x3); 2980 if (error) 2981 goto fail; 2982 urtw_write32_m(sc, URTW_HSSI_PARA, 0x3dc00002); 2983 2984 error = urtw_8225_rf_set_chan(sc, 1); 2985fail: 2986 return (error); 2987} 2988 2989static usb_error_t 2990urtw_8225v2_rf_set_chan(struct urtw_softc *sc, int chan) 2991{ 2992 usb_error_t error; 2993 2994 error = urtw_8225v2_set_txpwrlvl(sc, chan); 2995 if (error) 2996 goto fail; 2997 2998 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 2999 usb_pause_mtx(&sc->sc_mtx, 10); 3000fail: 3001 return (error); 3002} 3003 3004static usb_error_t 3005urtw_8225_read(struct urtw_softc *sc, uint8_t addr, uint32_t *data) 3006{ 3007 int i; 3008 int16_t bit; 3009 uint8_t rlen = 12, wlen = 6; 3010 uint16_t o1, o2, o3, tmp; 3011 uint32_t d2w = ((uint32_t)(addr & 0x1f)) << 27; 3012 uint32_t mask = 0x80000000, value = 0; 3013 usb_error_t error; 3014 3015 urtw_read16_m(sc, URTW_RF_PINS_OUTPUT, &o1); 3016 urtw_read16_m(sc, URTW_RF_PINS_ENABLE, &o2); 3017 urtw_read16_m(sc, URTW_RF_PINS_SELECT, &o3); 3018 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2 | URTW_RF_PINS_MAGIC4); 3019 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3 | URTW_RF_PINS_MAGIC4); 3020 o1 &= ~URTW_RF_PINS_MAGIC4; 3021 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN); 3022 DELAY(5); 3023 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1); 3024 DELAY(5); 3025 3026 for (i = 0; i < (wlen / 2); i++, mask = mask >> 1) { 3027 bit = ((d2w & mask) != 0) ? 1 : 0; 3028 3029 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3030 DELAY(2); 3031 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3032 URTW_BB_HOST_BANG_CLK); 3033 DELAY(2); 3034 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3035 URTW_BB_HOST_BANG_CLK); 3036 DELAY(2); 3037 mask = mask >> 1; 3038 if (i == 2) 3039 break; 3040 bit = ((d2w & mask) != 0) ? 1 : 0; 3041 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3042 URTW_BB_HOST_BANG_CLK); 3043 DELAY(2); 3044 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | 3045 URTW_BB_HOST_BANG_CLK); 3046 DELAY(2); 3047 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1); 3048 DELAY(1); 3049 } 3050 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW | 3051 URTW_BB_HOST_BANG_CLK); 3052 DELAY(2); 3053 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, bit | o1 | URTW_BB_HOST_BANG_RW); 3054 DELAY(2); 3055 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_RW); 3056 DELAY(2); 3057 3058 mask = 0x800; 3059 for (i = 0; i < rlen; i++, mask = mask >> 1) { 3060 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3061 o1 | URTW_BB_HOST_BANG_RW); 3062 DELAY(2); 3063 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3064 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3065 DELAY(2); 3066 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3067 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3068 DELAY(2); 3069 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3070 o1 | URTW_BB_HOST_BANG_RW | URTW_BB_HOST_BANG_CLK); 3071 DELAY(2); 3072 3073 urtw_read16_m(sc, URTW_RF_PINS_INPUT, &tmp); 3074 value |= ((tmp & URTW_BB_HOST_BANG_CLK) ? mask : 0); 3075 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 3076 o1 | URTW_BB_HOST_BANG_RW); 3077 DELAY(2); 3078 } 3079 3080 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, o1 | URTW_BB_HOST_BANG_EN | 3081 URTW_BB_HOST_BANG_RW); 3082 DELAY(2); 3083 3084 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, o2); 3085 urtw_write16_m(sc, URTW_RF_PINS_SELECT, o3); 3086 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_OUTPUT_MAGIC1); 3087 3088 if (data != NULL) 3089 *data = value; 3090fail: 3091 return (error); 3092} 3093 3094 3095static usb_error_t 3096urtw_8225v2_set_txpwrlvl(struct urtw_softc *sc, int chan) 3097{ 3098 int i; 3099 uint8_t *cck_pwrtable; 3100 uint8_t cck_pwrlvl_max = 15, ofdm_pwrlvl_max = 25, ofdm_pwrlvl_min = 10; 3101 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3102 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3103 usb_error_t error; 3104 3105 /* CCK power setting */ 3106 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? cck_pwrlvl_max : cck_pwrlvl; 3107 cck_pwrlvl += sc->sc_txpwr_cck_base; 3108 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3109 cck_pwrtable = (chan == 14) ? urtw_8225v2_txpwr_cck_ch14 : 3110 urtw_8225v2_txpwr_cck; 3111 3112 for (i = 0; i < 8; i++) 3113 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3114 3115 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3116 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl]); 3117 usb_pause_mtx(&sc->sc_mtx, 1); 3118 3119 /* OFDM power setting */ 3120 ofdm_pwrlvl = (ofdm_pwrlvl > (ofdm_pwrlvl_max - ofdm_pwrlvl_min)) ? 3121 ofdm_pwrlvl_max : ofdm_pwrlvl + ofdm_pwrlvl_min; 3122 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3123 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3124 3125 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3126 if (error) 3127 goto fail; 3128 3129 urtw_8187_write_phy_ofdm(sc, 2, 0x42); 3130 urtw_8187_write_phy_ofdm(sc, 5, 0x0); 3131 urtw_8187_write_phy_ofdm(sc, 6, 0x40); 3132 urtw_8187_write_phy_ofdm(sc, 7, 0x0); 3133 urtw_8187_write_phy_ofdm(sc, 8, 0x40); 3134 3135 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3136 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl]); 3137 usb_pause_mtx(&sc->sc_mtx, 1); 3138fail: 3139 return (error); 3140} 3141 3142static usb_error_t 3143urtw_8225v2_setgain(struct urtw_softc *sc, int16_t gain) 3144{ 3145 uint8_t *gainp; 3146 usb_error_t error; 3147 3148 /* XXX for A? */ 3149 gainp = urtw_8225v2_gain_bg; 3150 urtw_8187_write_phy_ofdm(sc, 0x0d, gainp[gain * 3]); 3151 usb_pause_mtx(&sc->sc_mtx, 1); 3152 urtw_8187_write_phy_ofdm(sc, 0x1b, gainp[gain * 3 + 1]); 3153 usb_pause_mtx(&sc->sc_mtx, 1); 3154 urtw_8187_write_phy_ofdm(sc, 0x1d, gainp[gain * 3 + 2]); 3155 usb_pause_mtx(&sc->sc_mtx, 1); 3156 urtw_8187_write_phy_ofdm(sc, 0x21, 0x17); 3157 usb_pause_mtx(&sc->sc_mtx, 1); 3158fail: 3159 return (error); 3160} 3161 3162static usb_error_t 3163urtw_8225_isv2(struct urtw_softc *sc, int *ret) 3164{ 3165 uint32_t data; 3166 usb_error_t error; 3167 3168 *ret = 1; 3169 3170 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, URTW_RF_PINS_MAGIC5); 3171 urtw_write16_m(sc, URTW_RF_PINS_SELECT, URTW_RF_PINS_MAGIC5); 3172 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, URTW_RF_PINS_MAGIC5); 3173 usb_pause_mtx(&sc->sc_mtx, 500); 3174 3175 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3176 URTW_8225_ADDR_0_DATA_MAGIC1); 3177 3178 error = urtw_8225_read(sc, URTW_8225_ADDR_8_MAGIC, &data); 3179 if (error != 0) 3180 goto fail; 3181 if (data != URTW_8225_ADDR_8_DATA_MAGIC1) 3182 *ret = 0; 3183 else { 3184 error = urtw_8225_read(sc, URTW_8225_ADDR_9_MAGIC, &data); 3185 if (error != 0) 3186 goto fail; 3187 if (data != URTW_8225_ADDR_9_DATA_MAGIC1) 3188 *ret = 0; 3189 } 3190 3191 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 3192 URTW_8225_ADDR_0_DATA_MAGIC2); 3193fail: 3194 return (error); 3195} 3196 3197static usb_error_t 3198urtw_8225v2b_rf_init(struct urtw_softc *sc) 3199{ 3200 struct ieee80211com *ic = &sc->sc_ic; 3201 struct ieee80211vap *vap = TAILQ_FIRST(&ic->ic_vaps); 3202 const uint8_t *macaddr; 3203 unsigned int i; 3204 uint8_t data8; 3205 usb_error_t error; 3206 3207 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3208 if (error) 3209 goto fail; 3210 3211 /* 3212 * initialize extra registers on 8187 3213 */ 3214 urtw_write16_m(sc, URTW_BRSR_8187B, 0xfff); 3215 3216 /* retry limit */ 3217 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3218 data8 |= URTW_CW_CONF_PERPACKET_RETRY; 3219 urtw_write8_m(sc, URTW_CW_CONF, data8); 3220 3221 /* TX AGC */ 3222 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3223 data8 |= URTW_TX_AGC_CTL_PERPACKET_GAIN; 3224 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3225 3226 /* Auto Rate Fallback Control */ 3227#define URTW_ARFR 0x1e0 3228 urtw_write16_m(sc, URTW_ARFR, 0xfff); 3229 urtw_read8_m(sc, URTW_RATE_FALLBACK, &data8); 3230 urtw_write8_m(sc, URTW_RATE_FALLBACK, 3231 data8 | URTW_RATE_FALLBACK_ENABLE); 3232 3233 urtw_read8_m(sc, URTW_MSR, &data8); 3234 urtw_write8_m(sc, URTW_MSR, data8 & 0xf3); 3235 urtw_read8_m(sc, URTW_MSR, &data8); 3236 urtw_write8_m(sc, URTW_MSR, data8 | URTW_MSR_LINK_ENEDCA); 3237 urtw_write8_m(sc, URTW_ACM_CONTROL, sc->sc_acmctl); 3238 3239 urtw_write16_m(sc, URTW_ATIM_WND, 2); 3240 urtw_write16_m(sc, URTW_BEACON_INTERVAL, 100); 3241#define URTW_FEMR_FOR_8187B 0x1d4 3242 urtw_write16_m(sc, URTW_FEMR_FOR_8187B, 0xffff); 3243 3244 /* led type */ 3245 urtw_read8_m(sc, URTW_CONFIG1, &data8); 3246 data8 = (data8 & 0x3f) | 0x80; 3247 urtw_write8_m(sc, URTW_CONFIG1, data8); 3248 3249 /* applying MAC address again. */ 3250 macaddr = vap ? vap->iv_myaddr : ic->ic_macaddr; 3251 error = urtw_set_macaddr(sc, macaddr); 3252 if (error) 3253 goto fail; 3254 3255 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3256 if (error) 3257 goto fail; 3258 3259 urtw_write8_m(sc, URTW_WPA_CONFIG, 0); 3260 3261 /* 3262 * MAC configuration 3263 */ 3264 for (i = 0; i < nitems(urtw_8225v2b_rf_part1); i++) 3265 urtw_write8_m(sc, urtw_8225v2b_rf_part1[i].reg, 3266 urtw_8225v2b_rf_part1[i].val); 3267 urtw_write16_m(sc, URTW_TID_AC_MAP, 0xfa50); 3268 urtw_write16_m(sc, URTW_INT_MIG, 0x0000); 3269 urtw_write32_m(sc, 0x1f0, 0); 3270 urtw_write32_m(sc, 0x1f4, 0); 3271 urtw_write8_m(sc, 0x1f8, 0); 3272 urtw_write32_m(sc, URTW_RF_TIMING, 0x4001); 3273 3274#define URTW_RFSW_CTRL 0x272 3275 urtw_write16_m(sc, URTW_RFSW_CTRL, 0x569a); 3276 3277 /* 3278 * initialize PHY 3279 */ 3280 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3281 if (error) 3282 goto fail; 3283 urtw_read8_m(sc, URTW_CONFIG3, &data8); 3284 urtw_write8_m(sc, URTW_CONFIG3, 3285 data8 | URTW_CONFIG3_ANAPARAM_WRITE); 3286 3287 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3288 if (error) 3289 goto fail; 3290 3291 /* setup RFE initial timing */ 3292 urtw_write16_m(sc, URTW_RF_PINS_OUTPUT, 0x0480); 3293 urtw_write16_m(sc, URTW_RF_PINS_SELECT, 0x2488); 3294 urtw_write16_m(sc, URTW_RF_PINS_ENABLE, 0x1fff); 3295 usb_pause_mtx(&sc->sc_mtx, 1100); 3296 3297 for (i = 0; i < nitems(urtw_8225v2b_rf_part0); i++) { 3298 urtw_8225_write(sc, urtw_8225v2b_rf_part0[i].reg, 3299 urtw_8225v2b_rf_part0[i].val); 3300 usb_pause_mtx(&sc->sc_mtx, 1); 3301 } 3302 urtw_8225_write(sc, 0x00, 0x01b7); 3303 3304 for (i = 0; i < 95; i++) { 3305 urtw_8225_write(sc, URTW_8225_ADDR_1_MAGIC, (uint8_t)(i + 1)); 3306 usb_pause_mtx(&sc->sc_mtx, 1); 3307 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 3308 urtw_8225v2b_rxgain[i]); 3309 usb_pause_mtx(&sc->sc_mtx, 1); 3310 } 3311 3312 urtw_8225_write(sc, URTW_8225_ADDR_3_MAGIC, 0x080); 3313 usb_pause_mtx(&sc->sc_mtx, 1); 3314 urtw_8225_write(sc, URTW_8225_ADDR_5_MAGIC, 0x004); 3315 usb_pause_mtx(&sc->sc_mtx, 1); 3316 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x0b7); 3317 usb_pause_mtx(&sc->sc_mtx, 1); 3318 usb_pause_mtx(&sc->sc_mtx, 3000); 3319 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0xc4d); 3320 usb_pause_mtx(&sc->sc_mtx, 2000); 3321 urtw_8225_write(sc, URTW_8225_ADDR_2_MAGIC, 0x44d); 3322 usb_pause_mtx(&sc->sc_mtx, 1); 3323 urtw_8225_write(sc, URTW_8225_ADDR_0_MAGIC, 0x2bf); 3324 usb_pause_mtx(&sc->sc_mtx, 1); 3325 3326 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 0x03); 3327 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 0x07); 3328 urtw_write8_m(sc, URTW_TX_ANTENNA, 0x03); 3329 3330 urtw_8187_write_phy_ofdm(sc, 0x80, 0x12); 3331 for (i = 0; i < 128; i++) { 3332 uint32_t addr, data; 3333 3334 data = (urtw_8225z2_agc[i] << 8) | 0x0000008f; 3335 addr = ((i + 0x80) << 8) | 0x0000008e; 3336 3337 urtw_8187_write_phy_ofdm(sc, data & 0x7f, (data >> 8) & 0xff); 3338 urtw_8187_write_phy_ofdm(sc, addr & 0x7f, (addr >> 8) & 0xff); 3339 urtw_8187_write_phy_ofdm(sc, 0x0e, 0x00); 3340 } 3341 urtw_8187_write_phy_ofdm(sc, 0x80, 0x10); 3342 3343 for (i = 0; i < nitems(urtw_8225v2b_rf_part2); i++) 3344 urtw_8187_write_phy_ofdm(sc, i, urtw_8225v2b_rf_part2[i].val); 3345 3346 urtw_write32_m(sc, URTW_8187B_AC_VO, (7 << 12) | (3 << 8) | 0x1c); 3347 urtw_write32_m(sc, URTW_8187B_AC_VI, (7 << 12) | (3 << 8) | 0x1c); 3348 urtw_write32_m(sc, URTW_8187B_AC_BE, (7 << 12) | (3 << 8) | 0x1c); 3349 urtw_write32_m(sc, URTW_8187B_AC_BK, (7 << 12) | (3 << 8) | 0x1c); 3350 3351 urtw_8187_write_phy_ofdm(sc, 0x97, 0x46); 3352 urtw_8187_write_phy_ofdm(sc, 0xa4, 0xb6); 3353 urtw_8187_write_phy_ofdm(sc, 0x85, 0xfc); 3354 urtw_8187_write_phy_cck(sc, 0xc1, 0x88); 3355 3356fail: 3357 return (error); 3358} 3359 3360static usb_error_t 3361urtw_8225v2b_rf_set_chan(struct urtw_softc *sc, int chan) 3362{ 3363 usb_error_t error; 3364 3365 error = urtw_8225v2b_set_txpwrlvl(sc, chan); 3366 if (error) 3367 goto fail; 3368 3369 urtw_8225_write(sc, URTW_8225_ADDR_7_MAGIC, urtw_8225_channel[chan]); 3370 usb_pause_mtx(&sc->sc_mtx, 10); 3371fail: 3372 return (error); 3373} 3374 3375static usb_error_t 3376urtw_8225v2b_set_txpwrlvl(struct urtw_softc *sc, int chan) 3377{ 3378 int i; 3379 uint8_t *cck_pwrtable; 3380 uint8_t cck_pwrlvl_max = 15; 3381 uint8_t cck_pwrlvl = sc->sc_txpwr_cck[chan] & 0xff; 3382 uint8_t ofdm_pwrlvl = sc->sc_txpwr_ofdm[chan] & 0xff; 3383 usb_error_t error; 3384 3385 /* CCK power setting */ 3386 cck_pwrlvl = (cck_pwrlvl > cck_pwrlvl_max) ? 3387 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? cck_pwrlvl_max : 22) : 3388 (cck_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 0 : 7)); 3389 cck_pwrlvl += sc->sc_txpwr_cck_base; 3390 cck_pwrlvl = (cck_pwrlvl > 35) ? 35 : cck_pwrlvl; 3391 cck_pwrtable = (chan == 14) ? urtw_8225v2b_txpwr_cck_ch14 : 3392 urtw_8225v2b_txpwr_cck; 3393 3394 if (sc->sc_flags & URTW_RTL8187B_REV_B) 3395 cck_pwrtable += (cck_pwrlvl <= 6) ? 0 : 3396 ((cck_pwrlvl <= 11) ? 8 : 16); 3397 else 3398 cck_pwrtable += (cck_pwrlvl <= 5) ? 0 : 3399 ((cck_pwrlvl <= 11) ? 8 : ((cck_pwrlvl <= 17) ? 16 : 24)); 3400 3401 for (i = 0; i < 8; i++) 3402 urtw_8187_write_phy_cck(sc, 0x44 + i, cck_pwrtable[i]); 3403 3404 urtw_write8_m(sc, URTW_TX_GAIN_CCK, 3405 urtw_8225v2_tx_gain_cck_ofdm[cck_pwrlvl] << 1); 3406 usb_pause_mtx(&sc->sc_mtx, 1); 3407 3408 /* OFDM power setting */ 3409 ofdm_pwrlvl = (ofdm_pwrlvl > 15) ? 3410 ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 17 : 25) : 3411 (ofdm_pwrlvl + ((sc->sc_flags & URTW_RTL8187B_REV_B) ? 2 : 10)); 3412 ofdm_pwrlvl += sc->sc_txpwr_ofdm_base; 3413 ofdm_pwrlvl = (ofdm_pwrlvl > 35) ? 35 : ofdm_pwrlvl; 3414 3415 urtw_write8_m(sc, URTW_TX_GAIN_OFDM, 3416 urtw_8225v2_tx_gain_cck_ofdm[ofdm_pwrlvl] << 1); 3417 3418 if (sc->sc_flags & URTW_RTL8187B_REV_B) { 3419 if (ofdm_pwrlvl <= 11) { 3420 urtw_8187_write_phy_ofdm(sc, 0x87, 0x60); 3421 urtw_8187_write_phy_ofdm(sc, 0x89, 0x60); 3422 } else { 3423 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3424 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3425 } 3426 } else { 3427 if (ofdm_pwrlvl <= 11) { 3428 urtw_8187_write_phy_ofdm(sc, 0x87, 0x5c); 3429 urtw_8187_write_phy_ofdm(sc, 0x89, 0x5c); 3430 } else if (ofdm_pwrlvl <= 17) { 3431 urtw_8187_write_phy_ofdm(sc, 0x87, 0x54); 3432 urtw_8187_write_phy_ofdm(sc, 0x89, 0x54); 3433 } else { 3434 urtw_8187_write_phy_ofdm(sc, 0x87, 0x50); 3435 urtw_8187_write_phy_ofdm(sc, 0x89, 0x50); 3436 } 3437 } 3438 usb_pause_mtx(&sc->sc_mtx, 1); 3439fail: 3440 return (error); 3441} 3442 3443static usb_error_t 3444urtw_read8e(struct urtw_softc *sc, int val, uint8_t *data) 3445{ 3446 struct usb_device_request req; 3447 usb_error_t error; 3448 3449 req.bmRequestType = UT_READ_VENDOR_DEVICE; 3450 req.bRequest = URTW_8187_GETREGS_REQ; 3451 USETW(req.wValue, val | 0xfe00); 3452 USETW(req.wIndex, 0); 3453 USETW(req.wLength, sizeof(uint8_t)); 3454 3455 error = urtw_do_request(sc, &req, data); 3456 return (error); 3457} 3458 3459static usb_error_t 3460urtw_write8e(struct urtw_softc *sc, int val, uint8_t data) 3461{ 3462 struct usb_device_request req; 3463 3464 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 3465 req.bRequest = URTW_8187_SETREGS_REQ; 3466 USETW(req.wValue, val | 0xfe00); 3467 USETW(req.wIndex, 0); 3468 USETW(req.wLength, sizeof(uint8_t)); 3469 3470 return (urtw_do_request(sc, &req, &data)); 3471} 3472 3473static usb_error_t 3474urtw_8180_set_anaparam(struct urtw_softc *sc, uint32_t val) 3475{ 3476 uint8_t data; 3477 usb_error_t error; 3478 3479 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3480 if (error) 3481 goto fail; 3482 3483 urtw_read8_m(sc, URTW_CONFIG3, &data); 3484 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3485 urtw_write32_m(sc, URTW_ANAPARAM, val); 3486 urtw_read8_m(sc, URTW_CONFIG3, &data); 3487 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3488 3489 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3490 if (error) 3491 goto fail; 3492fail: 3493 return (error); 3494} 3495 3496static usb_error_t 3497urtw_8185_set_anaparam2(struct urtw_softc *sc, uint32_t val) 3498{ 3499 uint8_t data; 3500 usb_error_t error; 3501 3502 error = urtw_set_mode(sc, URTW_EPROM_CMD_CONFIG); 3503 if (error) 3504 goto fail; 3505 3506 urtw_read8_m(sc, URTW_CONFIG3, &data); 3507 urtw_write8_m(sc, URTW_CONFIG3, data | URTW_CONFIG3_ANAPARAM_WRITE); 3508 urtw_write32_m(sc, URTW_ANAPARAM2, val); 3509 urtw_read8_m(sc, URTW_CONFIG3, &data); 3510 urtw_write8_m(sc, URTW_CONFIG3, data & ~URTW_CONFIG3_ANAPARAM_WRITE); 3511 3512 error = urtw_set_mode(sc, URTW_EPROM_CMD_NORMAL); 3513 if (error) 3514 goto fail; 3515fail: 3516 return (error); 3517} 3518 3519static usb_error_t 3520urtw_intr_enable(struct urtw_softc *sc) 3521{ 3522 usb_error_t error; 3523 3524 urtw_write16_m(sc, URTW_INTR_MASK, 0xffff); 3525fail: 3526 return (error); 3527} 3528 3529static usb_error_t 3530urtw_intr_disable(struct urtw_softc *sc) 3531{ 3532 usb_error_t error; 3533 3534 urtw_write16_m(sc, URTW_INTR_MASK, 0); 3535fail: 3536 return (error); 3537} 3538 3539static usb_error_t 3540urtw_reset(struct urtw_softc *sc) 3541{ 3542 uint8_t data; 3543 usb_error_t error; 3544 3545 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3546 if (error) 3547 goto fail; 3548 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3549 if (error) 3550 goto fail; 3551 3552 error = urtw_intr_disable(sc); 3553 if (error) 3554 goto fail; 3555 usb_pause_mtx(&sc->sc_mtx, 100); 3556 3557 error = urtw_write8e(sc, 0x18, 0x10); 3558 if (error != 0) 3559 goto fail; 3560 error = urtw_write8e(sc, 0x18, 0x11); 3561 if (error != 0) 3562 goto fail; 3563 error = urtw_write8e(sc, 0x18, 0x00); 3564 if (error != 0) 3565 goto fail; 3566 usb_pause_mtx(&sc->sc_mtx, 100); 3567 3568 urtw_read8_m(sc, URTW_CMD, &data); 3569 data = (data & 0x2) | URTW_CMD_RST; 3570 urtw_write8_m(sc, URTW_CMD, data); 3571 usb_pause_mtx(&sc->sc_mtx, 100); 3572 3573 urtw_read8_m(sc, URTW_CMD, &data); 3574 if (data & URTW_CMD_RST) { 3575 device_printf(sc->sc_dev, "reset timeout\n"); 3576 goto fail; 3577 } 3578 3579 error = urtw_set_mode(sc, URTW_EPROM_CMD_LOAD); 3580 if (error) 3581 goto fail; 3582 usb_pause_mtx(&sc->sc_mtx, 100); 3583 3584 error = urtw_8180_set_anaparam(sc, URTW_8225_ANAPARAM_ON); 3585 if (error) 3586 goto fail; 3587 error = urtw_8185_set_anaparam2(sc, URTW_8225_ANAPARAM2_ON); 3588 if (error) 3589 goto fail; 3590fail: 3591 return (error); 3592} 3593 3594static usb_error_t 3595urtw_led_ctl(struct urtw_softc *sc, int mode) 3596{ 3597 usb_error_t error = 0; 3598 3599 switch (sc->sc_strategy) { 3600 case URTW_SW_LED_MODE0: 3601 error = urtw_led_mode0(sc, mode); 3602 break; 3603 case URTW_SW_LED_MODE1: 3604 error = urtw_led_mode1(sc, mode); 3605 break; 3606 case URTW_SW_LED_MODE2: 3607 error = urtw_led_mode2(sc, mode); 3608 break; 3609 case URTW_SW_LED_MODE3: 3610 error = urtw_led_mode3(sc, mode); 3611 break; 3612 default: 3613 DPRINTF(sc, URTW_DEBUG_STATE, 3614 "unsupported LED mode %d\n", sc->sc_strategy); 3615 error = USB_ERR_INVAL; 3616 break; 3617 } 3618 3619 return (error); 3620} 3621 3622static usb_error_t 3623urtw_led_mode0(struct urtw_softc *sc, int mode) 3624{ 3625 3626 switch (mode) { 3627 case URTW_LED_CTL_POWER_ON: 3628 sc->sc_gpio_ledstate = URTW_LED_POWER_ON_BLINK; 3629 break; 3630 case URTW_LED_CTL_TX: 3631 if (sc->sc_gpio_ledinprogress == 1) 3632 return (0); 3633 3634 sc->sc_gpio_ledstate = URTW_LED_BLINK_NORMAL; 3635 sc->sc_gpio_blinktime = 2; 3636 break; 3637 case URTW_LED_CTL_LINK: 3638 sc->sc_gpio_ledstate = URTW_LED_ON; 3639 break; 3640 default: 3641 DPRINTF(sc, URTW_DEBUG_STATE, 3642 "unsupported LED mode 0x%x", mode); 3643 return (USB_ERR_INVAL); 3644 } 3645 3646 switch (sc->sc_gpio_ledstate) { 3647 case URTW_LED_ON: 3648 if (sc->sc_gpio_ledinprogress != 0) 3649 break; 3650 urtw_led_on(sc, URTW_LED_GPIO); 3651 break; 3652 case URTW_LED_BLINK_NORMAL: 3653 if (sc->sc_gpio_ledinprogress != 0) 3654 break; 3655 sc->sc_gpio_ledinprogress = 1; 3656 sc->sc_gpio_blinkstate = (sc->sc_gpio_ledon != 0) ? 3657 URTW_LED_OFF : URTW_LED_ON; 3658 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3659 break; 3660 case URTW_LED_POWER_ON_BLINK: 3661 urtw_led_on(sc, URTW_LED_GPIO); 3662 usb_pause_mtx(&sc->sc_mtx, 100); 3663 urtw_led_off(sc, URTW_LED_GPIO); 3664 break; 3665 default: 3666 DPRINTF(sc, URTW_DEBUG_STATE, 3667 "unknown LED status 0x%x", sc->sc_gpio_ledstate); 3668 return (USB_ERR_INVAL); 3669 } 3670 return (0); 3671} 3672 3673static usb_error_t 3674urtw_led_mode1(struct urtw_softc *sc, int mode) 3675{ 3676 return (USB_ERR_INVAL); 3677} 3678 3679static usb_error_t 3680urtw_led_mode2(struct urtw_softc *sc, int mode) 3681{ 3682 return (USB_ERR_INVAL); 3683} 3684 3685static usb_error_t 3686urtw_led_mode3(struct urtw_softc *sc, int mode) 3687{ 3688 return (USB_ERR_INVAL); 3689} 3690 3691static usb_error_t 3692urtw_led_on(struct urtw_softc *sc, int type) 3693{ 3694 usb_error_t error; 3695 3696 if (type == URTW_LED_GPIO) { 3697 switch (sc->sc_gpio_ledpin) { 3698 case URTW_LED_PIN_GPIO0: 3699 urtw_write8_m(sc, URTW_GPIO, 0x01); 3700 urtw_write8_m(sc, URTW_GP_ENABLE, 0x00); 3701 break; 3702 default: 3703 DPRINTF(sc, URTW_DEBUG_STATE, 3704 "unsupported LED PIN type 0x%x", 3705 sc->sc_gpio_ledpin); 3706 error = USB_ERR_INVAL; 3707 goto fail; 3708 } 3709 } else { 3710 DPRINTF(sc, URTW_DEBUG_STATE, 3711 "unsupported LED type 0x%x", type); 3712 error = USB_ERR_INVAL; 3713 goto fail; 3714 } 3715 3716 sc->sc_gpio_ledon = 1; 3717fail: 3718 return (error); 3719} 3720 3721static usb_error_t 3722urtw_led_off(struct urtw_softc *sc, int type) 3723{ 3724 usb_error_t error; 3725 3726 if (type == URTW_LED_GPIO) { 3727 switch (sc->sc_gpio_ledpin) { 3728 case URTW_LED_PIN_GPIO0: 3729 urtw_write8_m(sc, URTW_GPIO, URTW_GPIO_DATA_MAGIC1); 3730 urtw_write8_m(sc, 3731 URTW_GP_ENABLE, URTW_GP_ENABLE_DATA_MAGIC1); 3732 break; 3733 default: 3734 DPRINTF(sc, URTW_DEBUG_STATE, 3735 "unsupported LED PIN type 0x%x", 3736 sc->sc_gpio_ledpin); 3737 error = USB_ERR_INVAL; 3738 goto fail; 3739 } 3740 } else { 3741 DPRINTF(sc, URTW_DEBUG_STATE, 3742 "unsupported LED type 0x%x", type); 3743 error = USB_ERR_INVAL; 3744 goto fail; 3745 } 3746 3747 sc->sc_gpio_ledon = 0; 3748 3749fail: 3750 return (error); 3751} 3752 3753static void 3754urtw_led_ch(void *arg) 3755{ 3756 struct urtw_softc *sc = arg; 3757 struct ieee80211com *ic = &sc->sc_ic; 3758 3759 ieee80211_runtask(ic, &sc->sc_led_task); 3760} 3761 3762static void 3763urtw_ledtask(void *arg, int pending) 3764{ 3765 struct urtw_softc *sc = arg; 3766 3767 if (sc->sc_strategy != URTW_SW_LED_MODE0) { 3768 DPRINTF(sc, URTW_DEBUG_STATE, 3769 "could not process a LED strategy 0x%x", 3770 sc->sc_strategy); 3771 return; 3772 } 3773 3774 URTW_LOCK(sc); 3775 urtw_led_blink(sc); 3776 URTW_UNLOCK(sc); 3777} 3778 3779static usb_error_t 3780urtw_led_blink(struct urtw_softc *sc) 3781{ 3782 uint8_t ing = 0; 3783 usb_error_t error; 3784 3785 if (sc->sc_gpio_blinkstate == URTW_LED_ON) 3786 error = urtw_led_on(sc, URTW_LED_GPIO); 3787 else 3788 error = urtw_led_off(sc, URTW_LED_GPIO); 3789 sc->sc_gpio_blinktime--; 3790 if (sc->sc_gpio_blinktime == 0) 3791 ing = 1; 3792 else { 3793 if (sc->sc_gpio_ledstate != URTW_LED_BLINK_NORMAL && 3794 sc->sc_gpio_ledstate != URTW_LED_BLINK_SLOWLY && 3795 sc->sc_gpio_ledstate != URTW_LED_BLINK_CM3) 3796 ing = 1; 3797 } 3798 if (ing == 1) { 3799 if (sc->sc_gpio_ledstate == URTW_LED_ON && 3800 sc->sc_gpio_ledon == 0) 3801 error = urtw_led_on(sc, URTW_LED_GPIO); 3802 else if (sc->sc_gpio_ledstate == URTW_LED_OFF && 3803 sc->sc_gpio_ledon == 1) 3804 error = urtw_led_off(sc, URTW_LED_GPIO); 3805 3806 sc->sc_gpio_blinktime = 0; 3807 sc->sc_gpio_ledinprogress = 0; 3808 return (0); 3809 } 3810 3811 sc->sc_gpio_blinkstate = (sc->sc_gpio_blinkstate != URTW_LED_ON) ? 3812 URTW_LED_ON : URTW_LED_OFF; 3813 3814 switch (sc->sc_gpio_ledstate) { 3815 case URTW_LED_BLINK_NORMAL: 3816 usb_callout_reset(&sc->sc_led_ch, hz, urtw_led_ch, sc); 3817 break; 3818 default: 3819 DPRINTF(sc, URTW_DEBUG_STATE, 3820 "unknown LED status 0x%x", 3821 sc->sc_gpio_ledstate); 3822 return (USB_ERR_INVAL); 3823 } 3824 return (0); 3825} 3826 3827static usb_error_t 3828urtw_rx_enable(struct urtw_softc *sc) 3829{ 3830 uint8_t data; 3831 usb_error_t error; 3832 3833 usbd_transfer_start((sc->sc_flags & URTW_RTL8187B) ? 3834 sc->sc_xfer[URTW_8187B_BULK_RX] : sc->sc_xfer[URTW_8187L_BULK_RX]); 3835 3836 error = urtw_rx_setconf(sc); 3837 if (error != 0) 3838 goto fail; 3839 3840 if ((sc->sc_flags & URTW_RTL8187B) == 0) { 3841 urtw_read8_m(sc, URTW_CMD, &data); 3842 urtw_write8_m(sc, URTW_CMD, data | URTW_CMD_RX_ENABLE); 3843 } 3844fail: 3845 return (error); 3846} 3847 3848static usb_error_t 3849urtw_tx_enable(struct urtw_softc *sc) 3850{ 3851 uint8_t data8; 3852 uint32_t data; 3853 usb_error_t error; 3854 3855 if (sc->sc_flags & URTW_RTL8187B) { 3856 urtw_read32_m(sc, URTW_TX_CONF, &data); 3857 data &= ~URTW_TX_LOOPBACK_MASK; 3858 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3859 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3860 data &= ~URTW_TX_SWPLCPLEN; 3861 data |= URTW_TX_HW_SEQNUM | URTW_TX_DISREQQSIZE | 3862 (7 << 8) | /* short retry limit */ 3863 (7 << 0) | /* long retry limit */ 3864 (7 << 21); /* MAX TX DMA */ 3865 urtw_write32_m(sc, URTW_TX_CONF, data); 3866 3867 urtw_read8_m(sc, URTW_MSR, &data8); 3868 data8 |= URTW_MSR_LINK_ENEDCA; 3869 urtw_write8_m(sc, URTW_MSR, data8); 3870 return (error); 3871 } 3872 3873 urtw_read8_m(sc, URTW_CW_CONF, &data8); 3874 data8 &= ~(URTW_CW_CONF_PERPACKET_CW | URTW_CW_CONF_PERPACKET_RETRY); 3875 urtw_write8_m(sc, URTW_CW_CONF, data8); 3876 3877 urtw_read8_m(sc, URTW_TX_AGC_CTL, &data8); 3878 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_GAIN; 3879 data8 &= ~URTW_TX_AGC_CTL_PERPACKET_ANTSEL; 3880 data8 &= ~URTW_TX_AGC_CTL_FEEDBACK_ANT; 3881 urtw_write8_m(sc, URTW_TX_AGC_CTL, data8); 3882 3883 urtw_read32_m(sc, URTW_TX_CONF, &data); 3884 data &= ~URTW_TX_LOOPBACK_MASK; 3885 data |= URTW_TX_LOOPBACK_NONE; 3886 data &= ~(URTW_TX_DPRETRY_MASK | URTW_TX_RTSRETRY_MASK); 3887 data |= sc->sc_tx_retry << URTW_TX_DPRETRY_SHIFT; 3888 data |= sc->sc_rts_retry << URTW_TX_RTSRETRY_SHIFT; 3889 data &= ~(URTW_TX_NOCRC | URTW_TX_MXDMA_MASK); 3890 data |= URTW_TX_MXDMA_2048 | URTW_TX_CWMIN | URTW_TX_DISCW; 3891 data &= ~URTW_TX_SWPLCPLEN; 3892 data |= URTW_TX_NOICV; 3893 urtw_write32_m(sc, URTW_TX_CONF, data); 3894 3895 urtw_read8_m(sc, URTW_CMD, &data8); 3896 urtw_write8_m(sc, URTW_CMD, data8 | URTW_CMD_TX_ENABLE); 3897fail: 3898 return (error); 3899} 3900 3901static usb_error_t 3902urtw_rx_setconf(struct urtw_softc *sc) 3903{ 3904 struct ieee80211com *ic = &sc->sc_ic; 3905 uint32_t data; 3906 usb_error_t error; 3907 3908 urtw_read32_m(sc, URTW_RX, &data); 3909 data = data &~ URTW_RX_FILTER_MASK; 3910 if (sc->sc_flags & URTW_RTL8187B) { 3911 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA | 3912 URTW_RX_FILTER_MCAST | URTW_RX_FILTER_BCAST | 3913 URTW_RX_FIFO_THRESHOLD_NONE | 3914 URTW_MAX_RX_DMA_2048 | 3915 URTW_RX_AUTORESETPHY | URTW_RCR_ONLYERLPKT; 3916 } else { 3917 data = data | URTW_RX_FILTER_MNG | URTW_RX_FILTER_DATA; 3918 data = data | URTW_RX_FILTER_BCAST | URTW_RX_FILTER_MCAST; 3919 3920 if (ic->ic_opmode == IEEE80211_M_MONITOR) { 3921 data = data | URTW_RX_FILTER_ICVERR; 3922 data = data | URTW_RX_FILTER_PWR; 3923 } 3924 if (sc->sc_crcmon == 1 && ic->ic_opmode == IEEE80211_M_MONITOR) 3925 data = data | URTW_RX_FILTER_CRCERR; 3926 3927 data = data &~ URTW_RX_FIFO_THRESHOLD_MASK; 3928 data = data | URTW_RX_FIFO_THRESHOLD_NONE | 3929 URTW_RX_AUTORESETPHY; 3930 data = data &~ URTW_MAX_RX_DMA_MASK; 3931 data = data | URTW_MAX_RX_DMA_2048 | URTW_RCR_ONLYERLPKT; 3932 } 3933 3934 /* XXX allmulti should not be checked here... */ 3935 if (ic->ic_opmode == IEEE80211_M_MONITOR || 3936 ic->ic_promisc > 0 || ic->ic_allmulti > 0) { 3937 data = data | URTW_RX_FILTER_CTL; 3938 data = data | URTW_RX_FILTER_ALLMAC; 3939 } else { 3940 data = data | URTW_RX_FILTER_NICMAC; 3941 data = data | URTW_RX_CHECK_BSSID; 3942 } 3943 3944 urtw_write32_m(sc, URTW_RX, data); 3945fail: 3946 return (error); 3947} 3948 3949static struct mbuf * 3950urtw_rxeof(struct usb_xfer *xfer, struct urtw_data *data, int *rssi_p, 3951 int8_t *nf_p) 3952{ 3953 int actlen, flen, rssi; 3954 struct ieee80211_frame *wh; 3955 struct mbuf *m, *mnew; 3956 struct urtw_softc *sc = data->sc; 3957 struct ieee80211com *ic = &sc->sc_ic; 3958 uint8_t noise = 0, rate; 3959 uint64_t mactime; 3960 3961 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 3962 3963 if (sc->sc_flags & URTW_RTL8187B) { 3964 struct urtw_8187b_rxhdr *rx; 3965 3966 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3967 goto fail; 3968 3969 rx = (struct urtw_8187b_rxhdr *)(data->buf + 3970 (actlen - (sizeof(struct urtw_8187b_rxhdr)))); 3971 flen = le32toh(rx->flag) & 0xfff; 3972 if (flen > actlen - sizeof(*rx)) 3973 goto fail; 3974 3975 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3976 /* XXX correct? */ 3977 rssi = rx->rssi & URTW_RX_RSSI_MASK; 3978 noise = rx->noise; 3979 3980 if (ieee80211_radiotap_active(ic)) 3981 mactime = rx->mactime; 3982 } else { 3983 struct urtw_8187l_rxhdr *rx; 3984 3985 if (actlen < sizeof(*rx) + IEEE80211_ACK_LEN) 3986 goto fail; 3987 3988 rx = (struct urtw_8187l_rxhdr *)(data->buf + 3989 (actlen - (sizeof(struct urtw_8187l_rxhdr)))); 3990 flen = le32toh(rx->flag) & 0xfff; 3991 if (flen > actlen - sizeof(*rx)) 3992 goto fail; 3993 3994 rate = (le32toh(rx->flag) >> URTW_RX_FLAG_RXRATE_SHIFT) & 0xf; 3995 /* XXX correct? */ 3996 rssi = rx->rssi & URTW_RX_8187L_RSSI_MASK; 3997 noise = rx->noise; 3998 3999 if (ieee80211_radiotap_active(ic)) 4000 mactime = rx->mactime; 4001 } 4002 4003 if (flen < IEEE80211_ACK_LEN) 4004 goto fail; 4005 4006 mnew = m_getcl(M_NOWAIT, MT_DATA, M_PKTHDR); 4007 if (mnew == NULL) 4008 goto fail; 4009 4010 m = data->m; 4011 data->m = mnew; 4012 data->buf = mtod(mnew, uint8_t *); 4013 4014 /* finalize mbuf */ 4015 m->m_pkthdr.len = m->m_len = flen - IEEE80211_CRC_LEN; 4016 4017 if (ieee80211_radiotap_active(ic)) { 4018 struct urtw_rx_radiotap_header *tap = &sc->sc_rxtap; 4019 4020 tap->wr_tsf = mactime; 4021 tap->wr_flags = 0; 4022 tap->wr_dbm_antsignal = (int8_t)rssi; 4023 } 4024 4025 wh = mtod(m, struct ieee80211_frame *); 4026 if (IEEE80211_IS_DATA(wh)) 4027 sc->sc_currate = (rate > 0) ? rate : sc->sc_currate; 4028 4029 *rssi_p = rssi; 4030 *nf_p = noise; /* XXX correct? */ 4031 4032 return (m); 4033 4034fail: 4035 counter_u64_add(ic->ic_ierrors, 1); 4036 return (NULL); 4037} 4038 4039static void 4040urtw_bulk_rx_callback(struct usb_xfer *xfer, usb_error_t error) 4041{ 4042 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4043 struct ieee80211com *ic = &sc->sc_ic; 4044 struct ieee80211_node *ni; 4045 struct mbuf *m = NULL; 4046 struct urtw_data *data; 4047 int8_t nf = -95; 4048 int rssi = 1; 4049 4050 URTW_ASSERT_LOCKED(sc); 4051 4052 switch (USB_GET_STATE(xfer)) { 4053 case USB_ST_TRANSFERRED: 4054 data = STAILQ_FIRST(&sc->sc_rx_active); 4055 if (data == NULL) 4056 goto setup; 4057 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4058 m = urtw_rxeof(xfer, data, &rssi, &nf); 4059 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4060 /* FALLTHROUGH */ 4061 case USB_ST_SETUP: 4062setup: 4063 data = STAILQ_FIRST(&sc->sc_rx_inactive); 4064 if (data == NULL) { 4065 KASSERT(m == NULL, ("mbuf isn't NULL")); 4066 return; 4067 } 4068 STAILQ_REMOVE_HEAD(&sc->sc_rx_inactive, next); 4069 STAILQ_INSERT_TAIL(&sc->sc_rx_active, data, next); 4070 usbd_xfer_set_frame_data(xfer, 0, data->buf, 4071 usbd_xfer_max_len(xfer)); 4072 usbd_transfer_submit(xfer); 4073 4074 /* 4075 * To avoid LOR we should unlock our private mutex here to call 4076 * ieee80211_input() because here is at the end of a USB 4077 * callback and safe to unlock. 4078 */ 4079 URTW_UNLOCK(sc); 4080 if (m != NULL) { 4081 if (m->m_pkthdr.len >= 4082 sizeof(struct ieee80211_frame_min)) { 4083 ni = ieee80211_find_rxnode(ic, 4084 mtod(m, struct ieee80211_frame_min *)); 4085 } else 4086 ni = NULL; 4087 4088 if (ni != NULL) { 4089 (void) ieee80211_input(ni, m, rssi, nf); 4090 /* node is no longer needed */ 4091 ieee80211_free_node(ni); 4092 } else 4093 (void) ieee80211_input_all(ic, m, rssi, nf); 4094 m = NULL; 4095 } 4096 URTW_LOCK(sc); 4097 break; 4098 default: 4099 /* needs it to the inactive queue due to a error. */ 4100 data = STAILQ_FIRST(&sc->sc_rx_active); 4101 if (data != NULL) { 4102 STAILQ_REMOVE_HEAD(&sc->sc_rx_active, next); 4103 STAILQ_INSERT_TAIL(&sc->sc_rx_inactive, data, next); 4104 } 4105 if (error != USB_ERR_CANCELLED) { 4106 usbd_xfer_set_stall(xfer); 4107 counter_u64_add(ic->ic_ierrors, 1); 4108 goto setup; 4109 } 4110 break; 4111 } 4112} 4113 4114#define URTW_STATUS_TYPE_TXCLOSE 1 4115#define URTW_STATUS_TYPE_BEACON_INTR 0 4116 4117static void 4118urtw_txstatus_eof(struct usb_xfer *xfer) 4119{ 4120 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4121 struct ieee80211com *ic = &sc->sc_ic; 4122 int actlen, type, pktretry, seq; 4123 uint64_t val; 4124 4125 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 4126 4127 if (actlen != sizeof(uint64_t)) 4128 return; 4129 4130 val = le64toh(sc->sc_txstatus); 4131 type = (val >> 30) & 0x3; 4132 if (type == URTW_STATUS_TYPE_TXCLOSE) { 4133 pktretry = val & 0xff; 4134 seq = (val >> 16) & 0xff; 4135 if (pktretry == URTW_TX_MAXRETRY) 4136 counter_u64_add(ic->ic_oerrors, 1); 4137 DPRINTF(sc, URTW_DEBUG_TXSTATUS, "pktretry %d seq %#x\n", 4138 pktretry, seq); 4139 } 4140} 4141 4142static void 4143urtw_bulk_tx_status_callback(struct usb_xfer *xfer, usb_error_t error) 4144{ 4145 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4146 struct ieee80211com *ic = &sc->sc_ic; 4147 void *dma_buf = usbd_xfer_get_frame_buffer(xfer, 0); 4148 4149 URTW_ASSERT_LOCKED(sc); 4150 4151 switch (USB_GET_STATE(xfer)) { 4152 case USB_ST_TRANSFERRED: 4153 urtw_txstatus_eof(xfer); 4154 /* FALLTHROUGH */ 4155 case USB_ST_SETUP: 4156setup: 4157 memcpy(dma_buf, &sc->sc_txstatus, sizeof(uint64_t)); 4158 usbd_xfer_set_frame_len(xfer, 0, sizeof(uint64_t)); 4159 usbd_transfer_submit(xfer); 4160 break; 4161 default: 4162 if (error != USB_ERR_CANCELLED) { 4163 usbd_xfer_set_stall(xfer); 4164 counter_u64_add(ic->ic_ierrors, 1); 4165 goto setup; 4166 } 4167 break; 4168 } 4169} 4170 4171static void 4172urtw_txeof(struct usb_xfer *xfer, struct urtw_data *data) 4173{ 4174 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4175 4176 URTW_ASSERT_LOCKED(sc); 4177 4178 if (data->m) { 4179 /* XXX status? */ 4180 ieee80211_tx_complete(data->ni, data->m, 0); 4181 data->m = NULL; 4182 data->ni = NULL; 4183 } 4184 sc->sc_txtimer = 0; 4185} 4186 4187static void 4188urtw_bulk_tx_callback(struct usb_xfer *xfer, usb_error_t error) 4189{ 4190 struct urtw_softc *sc = usbd_xfer_softc(xfer); 4191 struct urtw_data *data; 4192 4193 URTW_ASSERT_LOCKED(sc); 4194 4195 switch (USB_GET_STATE(xfer)) { 4196 case USB_ST_TRANSFERRED: 4197 data = STAILQ_FIRST(&sc->sc_tx_active); 4198 if (data == NULL) 4199 goto setup; 4200 STAILQ_REMOVE_HEAD(&sc->sc_tx_active, next); 4201 urtw_txeof(xfer, data); 4202 STAILQ_INSERT_TAIL(&sc->sc_tx_inactive, data, next); 4203 /* FALLTHROUGH */ 4204 case USB_ST_SETUP: 4205setup: 4206 data = STAILQ_FIRST(&sc->sc_tx_pending); 4207 if (data == NULL) { 4208 DPRINTF(sc, URTW_DEBUG_XMIT, 4209 "%s: empty pending queue\n", __func__); 4210 return; 4211 } 4212 STAILQ_REMOVE_HEAD(&sc->sc_tx_pending, next); 4213 STAILQ_INSERT_TAIL(&sc->sc_tx_active, data, next); 4214 4215 usbd_xfer_set_frame_data(xfer, 0, data->buf, data->buflen); 4216 usbd_transfer_submit(xfer); 4217 4218 urtw_start(sc); 4219 break; 4220 default: 4221 data = STAILQ_FIRST(&sc->sc_tx_active); 4222 if (data == NULL) 4223 goto setup; 4224 if (data->ni != NULL) { 4225 if_inc_counter(data->ni->ni_vap->iv_ifp, 4226 IFCOUNTER_OERRORS, 1); 4227 ieee80211_free_node(data->ni); 4228 data->ni = NULL; 4229 } 4230 if (error != USB_ERR_CANCELLED) { 4231 usbd_xfer_set_stall(xfer); 4232 goto setup; 4233 } 4234 break; 4235 } 4236} 4237 4238static struct urtw_data * 4239_urtw_getbuf(struct urtw_softc *sc) 4240{ 4241 struct urtw_data *bf; 4242 4243 bf = STAILQ_FIRST(&sc->sc_tx_inactive); 4244 if (bf != NULL) 4245 STAILQ_REMOVE_HEAD(&sc->sc_tx_inactive, next); 4246 else 4247 bf = NULL; 4248 if (bf == NULL) 4249 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: %s\n", __func__, 4250 "out of xmit buffers"); 4251 return (bf); 4252} 4253 4254static struct urtw_data * 4255urtw_getbuf(struct urtw_softc *sc) 4256{ 4257 struct urtw_data *bf; 4258 4259 URTW_ASSERT_LOCKED(sc); 4260 4261 bf = _urtw_getbuf(sc); 4262 if (bf == NULL) 4263 DPRINTF(sc, URTW_DEBUG_XMIT, "%s: stop queue\n", __func__); 4264 return (bf); 4265} 4266 4267static int 4268urtw_isbmode(uint16_t rate) 4269{ 4270 4271 return ((rate <= 22 && rate != 12 && rate != 18) || 4272 rate == 44) ? (1) : (0); 4273} 4274 4275static uint16_t 4276urtw_rate2dbps(uint16_t rate) 4277{ 4278 4279 switch(rate) { 4280 case 12: 4281 case 18: 4282 case 24: 4283 case 36: 4284 case 48: 4285 case 72: 4286 case 96: 4287 case 108: 4288 return (rate * 2); 4289 default: 4290 break; 4291 } 4292 return (24); 4293} 4294 4295static int 4296urtw_compute_txtime(uint16_t framelen, uint16_t rate, 4297 uint8_t ismgt, uint8_t isshort) 4298{ 4299 uint16_t ceiling, frametime, n_dbps; 4300 4301 if (urtw_isbmode(rate)) { 4302 if (ismgt || !isshort || rate == 2) 4303 frametime = (uint16_t)(144 + 48 + 4304 (framelen * 8 / (rate / 2))); 4305 else 4306 frametime = (uint16_t)(72 + 24 + 4307 (framelen * 8 / (rate / 2))); 4308 if ((framelen * 8 % (rate / 2)) != 0) 4309 frametime++; 4310 } else { 4311 n_dbps = urtw_rate2dbps(rate); 4312 ceiling = (16 + 8 * framelen + 6) / n_dbps 4313 + (((16 + 8 * framelen + 6) % n_dbps) ? 1 : 0); 4314 frametime = (uint16_t)(16 + 4 + 4 * ceiling + 6); 4315 } 4316 return (frametime); 4317} 4318 4319/* 4320 * Callback from the 802.11 layer to update the 4321 * slot time based on the current setting. 4322 */ 4323static void 4324urtw_updateslot(struct ieee80211com *ic) 4325{ 4326 struct urtw_softc *sc = ic->ic_softc; 4327 4328 ieee80211_runtask(ic, &sc->sc_updateslot_task); 4329} 4330 4331static void 4332urtw_updateslottask(void *arg, int pending) 4333{ 4334 struct urtw_softc *sc = arg; 4335 struct ieee80211com *ic = &sc->sc_ic; 4336 int error; 4337 4338 URTW_LOCK(sc); 4339 if ((sc->sc_flags & URTW_RUNNING) == 0) { 4340 URTW_UNLOCK(sc); 4341 return; 4342 } 4343 if (sc->sc_flags & URTW_RTL8187B) { 4344 urtw_write8_m(sc, URTW_SIFS, 0x22); 4345 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) 4346 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4347 else 4348 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4349 urtw_write8_m(sc, URTW_8187B_EIFS, 0x5b); 4350 urtw_write8_m(sc, URTW_CARRIER_SCOUNT, 0x5b); 4351 } else { 4352 urtw_write8_m(sc, URTW_SIFS, 0x22); 4353 if (sc->sc_state == IEEE80211_S_ASSOC && 4354 ic->ic_flags & IEEE80211_F_SHSLOT) 4355 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SHSLOT); 4356 else 4357 urtw_write8_m(sc, URTW_SLOT, IEEE80211_DUR_SLOT); 4358 if (IEEE80211_IS_CHAN_ANYG(ic->ic_curchan)) { 4359 urtw_write8_m(sc, URTW_DIFS, 0x14); 4360 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x14); 4361 urtw_write8_m(sc, URTW_CW_VAL, 0x73); 4362 } else { 4363 urtw_write8_m(sc, URTW_DIFS, 0x24); 4364 urtw_write8_m(sc, URTW_EIFS, 0x5b - 0x24); 4365 urtw_write8_m(sc, URTW_CW_VAL, 0xa5); 4366 } 4367 } 4368fail: 4369 URTW_UNLOCK(sc); 4370} 4371 4372static void 4373urtw_sysctl_node(struct urtw_softc *sc) 4374{ 4375#define URTW_SYSCTL_STAT_ADD32(c, h, n, p, d) \ 4376 SYSCTL_ADD_UINT(c, h, OID_AUTO, n, CTLFLAG_RD, p, 0, d) 4377 struct sysctl_ctx_list *ctx; 4378 struct sysctl_oid_list *child, *parent; 4379 struct sysctl_oid *tree; 4380 struct urtw_stats *stats = &sc->sc_stats; 4381 4382 ctx = device_get_sysctl_ctx(sc->sc_dev); 4383 child = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->sc_dev)); 4384 4385 tree = SYSCTL_ADD_NODE(ctx, child, OID_AUTO, "stats", CTLFLAG_RD, 4386 NULL, "URTW statistics"); 4387 parent = SYSCTL_CHILDREN(tree); 4388 4389 /* Tx statistics. */ 4390 tree = SYSCTL_ADD_NODE(ctx, parent, OID_AUTO, "tx", CTLFLAG_RD, 4391 NULL, "Tx MAC statistics"); 4392 child = SYSCTL_CHILDREN(tree); 4393 URTW_SYSCTL_STAT_ADD32(ctx, child, "1m", &stats->txrates[0], 4394 "1 Mbit/s"); 4395 URTW_SYSCTL_STAT_ADD32(ctx, child, "2m", &stats->txrates[1], 4396 "2 Mbit/s"); 4397 URTW_SYSCTL_STAT_ADD32(ctx, child, "5.5m", &stats->txrates[2], 4398 "5.5 Mbit/s"); 4399 URTW_SYSCTL_STAT_ADD32(ctx, child, "6m", &stats->txrates[4], 4400 "6 Mbit/s"); 4401 URTW_SYSCTL_STAT_ADD32(ctx, child, "9m", &stats->txrates[5], 4402 "9 Mbit/s"); 4403 URTW_SYSCTL_STAT_ADD32(ctx, child, "11m", &stats->txrates[3], 4404 "11 Mbit/s"); 4405 URTW_SYSCTL_STAT_ADD32(ctx, child, "12m", &stats->txrates[6], 4406 "12 Mbit/s"); 4407 URTW_SYSCTL_STAT_ADD32(ctx, child, "18m", &stats->txrates[7], 4408 "18 Mbit/s"); 4409 URTW_SYSCTL_STAT_ADD32(ctx, child, "24m", &stats->txrates[8], 4410 "24 Mbit/s"); 4411 URTW_SYSCTL_STAT_ADD32(ctx, child, "36m", &stats->txrates[9], 4412 "36 Mbit/s"); 4413 URTW_SYSCTL_STAT_ADD32(ctx, child, "48m", &stats->txrates[10], 4414 "48 Mbit/s"); 4415 URTW_SYSCTL_STAT_ADD32(ctx, child, "54m", &stats->txrates[11], 4416 "54 Mbit/s"); 4417#undef URTW_SYSCTL_STAT_ADD32 4418} 4419 4420static device_method_t urtw_methods[] = { 4421 DEVMETHOD(device_probe, urtw_match), 4422 DEVMETHOD(device_attach, urtw_attach), 4423 DEVMETHOD(device_detach, urtw_detach), 4424 DEVMETHOD_END 4425}; 4426static driver_t urtw_driver = { 4427 .name = "urtw", 4428 .methods = urtw_methods, 4429 .size = sizeof(struct urtw_softc) 4430}; 4431static devclass_t urtw_devclass; 4432 4433DRIVER_MODULE(urtw, uhub, urtw_driver, urtw_devclass, NULL, 0); 4434MODULE_DEPEND(urtw, wlan, 1, 1, 1); 4435MODULE_DEPEND(urtw, usb, 1, 1, 1); 4436MODULE_VERSION(urtw, 1); 4437USB_PNP_HOST_INFO(urtw_devs); 4438