1/*-
2 * SPDX-License-Identifier: BSD-3-Clause
3 *
4 * Copyright (c) 1994,1995 Stefan Esser, Wolfgang StanglMeier
5 * Copyright (c) 2000 Michael Smith <msmith@freebsd.org>
6 * Copyright (c) 2000 BSDi
7 * All rights reserved.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 *    notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 *    notice, this list of conditions and the following disclaimer in the
16 *    documentation and/or other materials provided with the distribution.
17 * 3. The name of the author may not be used to endorse or promote products
18 *    derived from this software without specific prior written permission.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30 * SUCH DAMAGE.
31 *
32 * $FreeBSD$
33 */
34
35#ifndef __PCIB_PRIVATE_H__
36#define	__PCIB_PRIVATE_H__
37
38#include <sys/_callout.h>
39#include <sys/_task.h>
40
41#ifdef NEW_PCIB
42/*
43 * Data structure and routines that Host to PCI bridge drivers can use
44 * to restrict allocations for child devices to ranges decoded by the
45 * bridge.
46 */
47struct pcib_host_resources {
48	device_t	hr_pcib;
49	struct resource_list hr_rl;
50};
51
52int		pcib_host_res_init(device_t pcib,
53		    struct pcib_host_resources *hr);
54int		pcib_host_res_free(device_t pcib,
55		    struct pcib_host_resources *hr);
56int		pcib_host_res_decodes(struct pcib_host_resources *hr, int type,
57		    rman_res_t start, rman_res_t end, u_int flags);
58struct resource *pcib_host_res_alloc(struct pcib_host_resources *hr,
59		    device_t dev, int type, int *rid, rman_res_t start,
60		    rman_res_t end, rman_res_t count, u_int flags);
61int		pcib_host_res_adjust(struct pcib_host_resources *hr,
62		    device_t dev, int type, struct resource *r, rman_res_t start,
63		    rman_res_t end);
64#endif
65
66/*
67 * Export portions of generic PCI:PCI bridge support so that it can be
68 * used by subclasses.
69 */
70DECLARE_CLASS(pcib_driver);
71
72#ifdef NEW_PCIB
73#define	WIN_IO		0x1
74#define	WIN_MEM		0x2
75#define	WIN_PMEM	0x4
76
77struct pcib_window {
78	pci_addr_t	base;		/* base address */
79	pci_addr_t	limit;		/* topmost address */
80	struct rman	rman;
81	struct resource **res;
82	int		count;		/* size of 'res' array */
83	int		reg;		/* resource id from parent */
84	int		valid;
85	int		mask;		/* WIN_* bitmask of this window */
86	int		step;		/* log_2 of window granularity */
87	const char	*name;
88};
89#endif
90
91struct pcib_secbus {
92	u_int		sec;
93	u_int		sub;
94#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
95	device_t	dev;
96	struct rman	rman;
97	struct resource	*res;
98	const char	*name;
99	int		sub_reg;
100#endif
101};
102
103/*
104 * Bridge-specific data.
105 */
106struct pcib_softc
107{
108    device_t	dev;
109    device_t	child;
110    uint32_t	flags;		/* flags */
111#define	PCIB_SUBTRACTIVE	0x1
112#define	PCIB_DISABLE_MSI	0x2
113#define	PCIB_DISABLE_MSIX	0x4
114#define	PCIB_ENABLE_ARI		0x8
115#define	PCIB_HOTPLUG		0x10
116#define	PCIB_HOTPLUG_CMD_PENDING 0x20
117#define	PCIB_DETACH_PENDING	0x40
118#define	PCIB_DETACHING		0x80
119    u_int	domain;		/* domain number */
120    u_int	pribus;		/* primary bus number */
121    struct pcib_secbus bus;	/* secondary bus numbers */
122#ifdef NEW_PCIB
123    struct pcib_window io;	/* I/O port window */
124    struct pcib_window mem;	/* memory window */
125    struct pcib_window pmem;	/* prefetchable memory window */
126#else
127    pci_addr_t	pmembase;	/* base address of prefetchable memory */
128    pci_addr_t	pmemlimit;	/* topmost address of prefetchable memory */
129    pci_addr_t	membase;	/* base address of memory window */
130    pci_addr_t	memlimit;	/* topmost address of memory window */
131    uint32_t	iobase;		/* base address of port window */
132    uint32_t	iolimit;	/* topmost address of port window */
133#endif
134    uint16_t	bridgectl;	/* bridge control register */
135    uint16_t	pcie_link_sta;
136    uint16_t	pcie_slot_sta;
137    uint32_t	pcie_slot_cap;
138    struct resource *pcie_irq;
139    void	*pcie_ihand;
140    struct task	pcie_hp_task;
141    struct callout pcie_ab_timer;
142    struct callout pcie_cc_timer;
143    struct callout pcie_dll_timer;
144};
145
146#define	PCIB_SUPPORTED_ARI_VER	1
147
148typedef uint32_t pci_read_config_fn(int b, int s, int f, int reg, int width);
149
150int		host_pcib_get_busno(pci_read_config_fn read_config, int bus,
151    int slot, int func, uint8_t *busnum);
152#if defined(NEW_PCIB) && defined(PCI_RES_BUS)
153struct resource *pci_domain_alloc_bus(int domain, device_t dev, int *rid,
154		    rman_res_t start, rman_res_t end, rman_res_t count, u_int flags);
155int		pci_domain_adjust_bus(int domain, device_t dev,
156		    struct resource *r, rman_res_t start, rman_res_t end);
157int		pci_domain_release_bus(int domain, device_t dev, int rid,
158		    struct resource *r);
159struct resource *pcib_alloc_subbus(struct pcib_secbus *bus, device_t child,
160		    int *rid, rman_res_t start, rman_res_t end, rman_res_t count,
161		    u_int flags);
162void		pcib_free_secbus(device_t dev, struct pcib_secbus *bus);
163void		pcib_setup_secbus(device_t dev, struct pcib_secbus *bus,
164    int min_count);
165#endif
166int		pcib_attach(device_t dev);
167int		pcib_attach_child(device_t dev);
168void		pcib_attach_common(device_t dev);
169void		pcib_bridge_init(device_t dev);
170#ifdef NEW_PCIB
171const char	*pcib_child_name(device_t child);
172#endif
173int		pcib_child_present(device_t dev, device_t child);
174int		pcib_detach(device_t dev);
175int		pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result);
176int		pcib_write_ivar(device_t dev, device_t child, int which, uintptr_t value);
177struct resource *pcib_alloc_resource(device_t dev, device_t child, int type, int *rid,
178					    rman_res_t start, rman_res_t end,
179					    rman_res_t count, u_int flags);
180#ifdef NEW_PCIB
181int		pcib_adjust_resource(device_t bus, device_t child, int type,
182    struct resource *r, rman_res_t start, rman_res_t end);
183int		pcib_release_resource(device_t dev, device_t child, int type, int rid,
184    struct resource *r);
185#endif
186int		pcib_maxslots(device_t dev);
187int		pcib_maxfuncs(device_t dev);
188int		pcib_route_interrupt(device_t pcib, device_t dev, int pin);
189int		pcib_alloc_msi(device_t pcib, device_t dev, int count, int maxcount, int *irqs);
190int		pcib_release_msi(device_t pcib, device_t dev, int count, int *irqs);
191int		pcib_alloc_msix(device_t pcib, device_t dev, int *irq);
192int		pcib_release_msix(device_t pcib, device_t dev, int irq);
193int		pcib_map_msi(device_t pcib, device_t dev, int irq, uint64_t *addr, uint32_t *data);
194int		pcib_get_id(device_t pcib, device_t dev, enum pci_id_type type,
195		    uintptr_t *id);
196void		pcib_decode_rid(device_t pcib, uint16_t rid, int *bus,
197		    int *slot, int *func);
198int		pcib_request_feature(device_t dev, enum pci_feature feature);
199int		pcib_request_feature_allow(device_t pcib, device_t dev, enum pci_feature feature);
200
201#endif
202