1/*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) HighPoint Technologies, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30#include <dev/hptrr/hptrr_config.h> 31/* 32 * $Id: him.h,v 1.47 2007/12/17 08:55:49 gmm Exp $ 33 * Copyright (C) 2004-2005 HighPoint Technologies, Inc. All rights reserved. 34 */ 35#ifndef _HPT_HIM_H_ 36#define _HPT_HIM_H_ 37 38#define VERMAGIC_HIM 46 39 40#if defined(__cplusplus) 41extern "C" { 42#endif 43 44#include <dev/hptrr/list.h> 45 46#define SECTOR_TO_BYTE_SHIFT 9 47#define SECTOR_TO_BYTE(x) ((HPT_U32)(x) << SECTOR_TO_BYTE_SHIFT) 48#define BYTE_TO_SECTOR(x) ((x)>>SECTOR_TO_BYTE_SHIFT) 49 50typedef struct _PCI_ID 51{ 52 HPT_U16 vid; 53 HPT_U16 did; 54 HPT_U32 subsys; 55 HPT_U8 rev; 56 HPT_U8 nbase; 57 HPT_U16 reserve; 58} 59PCI_ID; 60 61typedef struct _PCI_ADDRESS 62{ 63 HPT_U8 tree; 64 HPT_U8 bus; 65 HPT_U8 device; 66 HPT_U8 function; 67} 68PCI_ADDRESS; 69 70typedef struct _HIM_ADAPTER_CONFIG 71{ 72 PCI_ADDRESS pci_addr; 73 PCI_ID pci_id; 74 75 HPT_U8 max_devices; 76 HPT_U8 reserve1; 77 78 HPT_U8 bDevsPerBus; 79 HPT_U8 first_on_slot; 80 81 HPT_U8 bChipType; 82 HPT_U8 bChipIntrNum; 83 HPT_U8 bChipFlags; 84 HPT_U8 bNumBuses; 85 86 HPT_U8 szVendorID[36]; 87 HPT_U8 szProductID[36]; 88} 89HIM_ADAPTER_CONFIG, *PHIM_ADAPTER_CONFIG; 90 91typedef struct _HIM_CHANNEL_CONFIG 92{ 93 HPT_U32 io_port; 94 HPT_U32 ctl_port; 95} HIM_CHANNEL_CONFIG, *PHIM_CHANNEL_CONFIG; 96 97typedef struct _HIM_DEVICE_FLAGS 98{ 99 HPT_UINT df_atapi :1; 100 HPT_UINT df_removable_drive :1; 101 HPT_UINT df_on_line :1; 102 HPT_UINT df_reduce_mode :1; 103 HPT_UINT df_sata :1; 104 HPT_UINT df_on_pm_port :1; 105 HPT_UINT df_support_read_ahead :1; 106 HPT_UINT df_read_ahead_enabled :1; 107 HPT_UINT df_support_write_cache :1; 108 HPT_UINT df_write_cache_enabled :1; 109 HPT_UINT df_cdrom_device :1; 110 HPT_UINT df_tape_device :1; 111 HPT_UINT df_support_tcq :1; 112 HPT_UINT df_tcq_enabled :1; 113 HPT_UINT df_support_ncq :1; 114 HPT_UINT df_ncq_enabled :1; 115 HPT_UINT df_sas :1; 116} DEVICE_FLAGS, *PDEVICE_FLAGS; 117 118#pragma pack(1) 119typedef struct _IDENTIFY_DATA2 { 120 HPT_U16 GeneralConfiguration; 121 HPT_U16 NumberOfCylinders; 122 HPT_U16 Reserved1; 123 HPT_U16 NumberOfHeads; 124 HPT_U16 UnformattedBytesPerTrack; 125 HPT_U16 UnformattedBytesPerSector; 126 HPT_U16 SectorsPerTrack; 127 HPT_U16 VendorUnique1[3]; 128 HPT_U16 SerialNumber[10]; 129 HPT_U16 BufferType; 130 HPT_U16 BufferSectorSize; 131 HPT_U16 NumberOfEccBytes; 132 HPT_U16 FirmwareRevision[4]; 133 HPT_U16 ModelNumber[20]; 134 HPT_U8 MaximumBlockTransfer; 135 HPT_U8 VendorUnique2; 136 HPT_U16 DoubleWordIo; 137 HPT_U16 Capabilities; 138 HPT_U16 Reserved2; 139 HPT_U8 VendorUnique3; 140 HPT_U8 PioCycleTimingMode; 141 HPT_U8 VendorUnique4; 142 HPT_U8 DmaCycleTimingMode; 143 HPT_U16 TranslationFieldsValid; 144 HPT_U16 NumberOfCurrentCylinders; 145 HPT_U16 NumberOfCurrentHeads; 146 HPT_U16 CurrentSectorsPerTrack; 147 HPT_U32 CurrentSectorCapacity; 148 HPT_U16 CurrentMultiSectorSetting; 149 HPT_U32 UserAddressableSectors; 150 HPT_U8 SingleWordDMASupport; 151 HPT_U8 SingleWordDMAActive; 152 HPT_U8 MultiWordDMASupport; 153 HPT_U8 MultiWordDMAActive; 154 HPT_U8 AdvancedPIOModes; 155 HPT_U8 Reserved4; 156 HPT_U16 MinimumMWXferCycleTime; 157 HPT_U16 RecommendedMWXferCycleTime; 158 HPT_U16 MinimumPIOCycleTime; 159 HPT_U16 MinimumPIOCycleTimeIORDY; 160 HPT_U16 Reserved5[2]; 161 HPT_U16 ReleaseTimeOverlapped; 162 HPT_U16 ReleaseTimeServiceCommand; 163 HPT_U16 MajorRevision; 164 HPT_U16 MinorRevision; 165} 166#ifdef __GNUC__ 167__attribute__((packed)) 168#endif 169IDENTIFY_DATA2, *PIDENTIFY_DATA2; 170#pragma pack() 171 172typedef struct _HIM_DEVICE_CONFIG 173{ 174 HPT_U64 capacity; 175 176 DEVICE_FLAGS flags; 177 178 HPT_U8 path_id; 179 HPT_U8 target_id; 180 HPT_U8 max_queue_depth; 181 HPT_U8 spin_up_mode; 182 183 HPT_U8 reserved; 184 HPT_U8 transfer_mode; 185 HPT_U8 bMaxShowMode; 186 HPT_U8 bDeUsable_Mode; 187 188 HPT_U16 max_sectors_per_cmd; 189 190 PIDENTIFY_DATA2 pIdentifyData; 191 192} 193HIM_DEVICE_CONFIG, *PHIM_DEVICE_CONFIG; 194 195 196#define _DIT_MODE 0 197#define _DIT_601 1 198#define _DIT_READ_AHEAD 2 199#define _DIT_WRITE_CACHE 3 200#define _DIT_TCQ 4 201#define _DIT_NCQ 5 202#define _DIT_BEEP_OFF 6 203#define _DIT_SPIN_UP_MODE 7 204#define _DIT_IDLE_STANDBY 8 205#define _DIT_IDENTIFY 9 206 207#define SPIN_UP_MODE_NOSUPPORT 0 208#define SPIN_UP_MODE_FULL 1 209#define SPIN_UP_MODE_STANDBY 2 210 211struct tcq_control { 212 HPT_U8 enable; 213 HPT_U8 depth; 214}; 215 216struct ncq_control { 217 HPT_U8 enable; 218 HPT_U8 depth; 219}; 220 221typedef struct _HIM_ALTERABLE_DEV_INFO{ 222 HPT_U8 type; 223 union { 224 HPT_U8 mode; 225 HPT_U8 enable_read_ahead; 226 HPT_U8 enable_read_cache; 227 HPT_U8 enable_write_cache; 228 struct tcq_control tcq; 229 struct ncq_control ncq; 230 void * adapter; 231 HPT_U8 spin_up_mode; 232 HPT_U8 idle_standby_timeout; 233 HPT_U8 identify_indicator; 234 }u; 235} HIM_ALTERABLE_DEV_INFO, *PHIM_ALTERABLE_DEV_INFO; 236 237struct _COMMAND; 238struct _IOCTL_ARG; 239 240typedef void (*PROBE_CALLBACK)(void *arg, void *dev, int index); 241 242typedef struct _HIM { 243 char *name; 244 struct _HIM *next; 245 HPT_UINT max_sg_descriptors; 246 #define _HIM_INTERFACE(_type, _fn, _args) _type (* _fn) _args; 247 #include <dev/hptrr/himfuncs.h> 248} 249HIM, *PHIM; 250 251 252#pragma pack(1) 253#ifdef SG_FLAG_EOT 254#error "don't use SG_FLAG_EOT with _SG.eot. clean the code!" 255#endif 256 257typedef struct _SG { 258 HPT_U32 size; 259 HPT_UINT eot; 260 union { 261 HPT_U8 FAR * _logical; 262 BUS_ADDRESS bus; 263 } 264 addr; 265} 266SG, *PSG; 267#pragma pack() 268 269typedef struct _AtaCommand 270{ 271 HPT_U64 Lba; 272 HPT_U16 nSectors; 273 HPT_U16 pad; 274} AtaComm, *PAtaComm; 275 276#define ATA_CMD_SET_FEATURES 0xef 277#define ATA_CMD_FLUSH 0xE7 278#define ATA_CMD_VERIFY 0x40 279#define ATA_CMD_STANDBY 0xe2 280#define ATA_CMD_READ_MULTI 0xC4 281#define ATA_CMD_READ_MULTI_EXT 0x29 282#define ATA_CMD_WRITE_MULTI 0xC5 283#define ATA_CMD_WRITE_MULTI_EXT 0x39 284#define ATA_CMD_WRITE_MULTI_FUA_EXT 0xCE 285 286#define ATA_SET_FEATURES_XFER 0x3 287#define ATA_SECTOR_SIZE 512 288 289typedef struct _PassthroughCmd { 290 HPT_U16 bFeaturesReg; 291 HPT_U16 bSectorCountReg; 292 HPT_U16 bLbaLowReg; 293 HPT_U16 bLbaMidReg; 294 HPT_U16 bLbaHighReg; 295 HPT_U8 bDriveHeadReg; 296 HPT_U8 bCommandReg; 297 HPT_U8 nSectors; 298 HPT_U8 *pDataBuffer; 299} 300PassthroughCmd; 301 302typedef struct _ScsiComm { 303 HPT_U8 cdbLength; 304 HPT_U8 senseLength; 305 HPT_U8 scsiStatus; 306 HPT_U8 reserve1; 307 HPT_U32 dataLength; 308 HPT_U8 *cdb; 309 HPT_U8 *senseBuffer; 310} 311ScsiComm; 312 313 314#define CTRL_CMD_REBUILD 1 315#define CTRL_CMD_VERIFY 2 316#define CTRL_CMD_INIT 3 317 318 319typedef struct _R5ControlCmd { 320 HPT_U64 StripeLine; 321 HPT_U16 Offset; 322 HPT_U8 Command; 323 HPT_U8 reserve1; 324} 325R5ControlCmd, *PR5ControlCmd; 326 327typedef struct _HPT_ADDRESS 328{ 329 HPT_U8 * logical; 330 BUS_ADDRESS bus; 331} 332HPT_ADDRESS; 333 334 335typedef struct ctl_pages { 336 HPT_ADDRESS *pages; 337 HPT_UINT page_size; 338 HPT_UINT npages; 339 HPT_UINT min_sg_descriptors; 340} CONTROL_PAGES, *PCONTROL_PAGES; 341 342typedef struct _R1ControlCmd { 343 HPT_U64 Lba; 344 HPT_U16 nSectors; 345 HPT_U8 Command; /* CTRL_CMD_XXX */ 346 HPT_U8 reserve1; 347 PCONTROL_PAGES ctl_pages; 348} 349R1ControlCmd, *PR1ControlCmd; 350 351typedef void (*TQ_PROC)(void *arg); 352 353struct tq_item { 354 TQ_PROC proc; 355 void *arg; 356 struct tq_item *next; 357}; 358 359#define INIT_TQ_ITEM(t, p, a) \ 360 do { (t)->proc = p; (t)->arg = a; (t)->next = 0; } while (0) 361 362typedef struct _COMMAND 363{ 364 365 struct _VBUS * vbus; 366 367 struct freelist *grplist; 368 HPT_UINT grpcnt; 369 370 371 struct list_head q_link; 372 struct tq_item done_dpc; 373 374 HPT_UINT extsize; 375 void *ext; 376 377 378 379 void *target; 380 void *priv; 381 HPT_UPTR priv2; 382 383 int priority; 384 struct lock_request *owned_lock; 385 struct lock_request *lock_req; 386 void (*dtor)(struct _COMMAND *, void *); 387 void *dtor_arg; 388 389 union{ 390 AtaComm Ide; 391 PassthroughCmd Passthrough; 392 ScsiComm Scsi; 393 R5ControlCmd R5Control; 394 R1ControlCmd R1Control; 395 } uCmd; 396 397 HPT_U8 type; /* CMD_TYPE_* */ 398 399 struct { 400 HPT_U8 physical_sg: 1; 401 HPT_U8 data_in: 1; 402 HPT_U8 data_out: 1; 403 HPT_U8 transform : 1; 404 HPT_U8 hard_flush: 2; 405 HPT_U8 from_cc: 1; 406 HPT_U8 force_cc: 1; 407 } flags; 408 409 /* return status */ 410 HPT_U8 Result; 411 /* retry count */ 412 HPT_U8 RetryCount; 413 414 415 PSG psg; 416 417 418 int (*buildsgl)(struct _COMMAND *cmd, PSG psg, int logical); 419 void (*done)(struct _COMMAND *cmd); 420} 421COMMAND, *PCOMMAND; 422 423/* command types */ 424#define CMD_TYPE_IO 0 425#define CMD_TYPE_CONTROL 1 426#define CMD_TYPE_ATAPI 2 427#define CMD_TYPE_SCSI CMD_TYPE_ATAPI 428#define CMD_TYPE_PASSTHROUGH 3 429#define CMD_TYPE_FLUSH 4 430 431/* flush command flags */ 432#define CF_HARD_FLUSH_CACHE 1 433#define CF_HARD_FLUSH_STANDBY 2 434 435/* command return values */ 436#define RETURN_PENDING 0 437#define RETURN_SUCCESS 1 438#define RETURN_BAD_DEVICE 2 439#define RETURN_BAD_PARAMETER 3 440#define RETURN_WRITE_NO_DRQ 4 441#define RETURN_DEVICE_BUSY 5 442#define RETURN_INVALID_REQUEST 6 443#define RETURN_SELECTION_TIMEOUT 7 444#define RETURN_IDE_ERROR 8 445#define RETURN_NEED_LOGICAL_SG 9 446#define RETURN_NEED_PHYSICAL_SG 10 447#define RETURN_RETRY 11 448#define RETURN_DATA_ERROR 12 449#define RETURN_BUS_RESET 13 450#define RETURN_BAD_TRANSFER_LENGTH 14 451#define RETURN_INSUFFICIENT_MEMORY 15 452#define RETURN_SECTOR_ERROR 16 453 454#if defined(__cplusplus) 455} 456#endif 457#endif 458