1/* 2 * Copyright (C) 2010 Andrew Turner 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29#ifndef __IF_DMEREG_H__ 30#define __IF_DMEREG_H__ 31 32/* 33 * DM9000 register definitions 34 */ 35#define DME_NCR 0x00 36#define NCR_EXT_PHY (1<<7) 37#define NCR_WAKEEN (1<<6) 38#define NCR_FCOL (1<<4) 39#define NCR_FDX (1<<3) 40#define NCR_LBK_NORMAL (0<<1) 41#define NCR_LBK_MAC (1<<1) 42#define NCR_LBK_PHY (2<<1) 43#define NCR_RST (1<<0) 44#define DME_NSR 0x01 45#define NSR_SPEED (1<<7) 46#define NSR_LINKST (1<<6) 47#define NSR_WAKEST (1<<5) 48#define NSR_TX2END (1<<3) 49#define NSR_TX1END (1<<2) 50#define NSR_RXOV (1<<1) 51#define DME_TCR 0x02 52#define TCR_TJDIS (1<<6) 53#define TCR_EXCECM (1<<5) 54#define TCR_PAD_DIS2 (1<<4) 55#define TCR_PAD_CRC2 (1<<3) 56#define TCR_PAD_DIS1 (1<<2) 57#define TCR_PAD_CRC1 (1<<1) 58#define TCR_TXREQ (1<<0) 59#define DME_TSR1 0x03 60#define DME_TSR2 0x04 61#define DME_RCR 0x05 62#define RCR_WTDIS (1<<6) 63#define RCR_DIS_LONG (1<<5) 64#define RCR_DIS_CRC (1<<4) 65#define RCR_ALL (1<<3) 66#define RCR_RUNT (1<<2) 67#define RCR_PRMSC (1<<1) 68#define RCR_RXEN (1<<0) 69#define DME_RSR 0x06 70#define DME_ROCR 0x07 71#define DME_BPTR 0x08 72#define BPTR_BPHW(v) (((v) & 0x0f) << 4) 73#define BPTR_JPT(v) (((v) & 0x0f) << 0) 74#define DME_FCTR 0x09 75#define FCTR_HWOT(v) (((v) & 0x0f) << 4) 76#define FCTR_LWOT(v) (((v) & 0x0f) << 0) 77#define DME_FCR 0x0A 78#define DME_EPCR 0x0B 79#define EPCR_REEP (1<<5) 80#define EPCR_WEP (1<<4) 81#define EPCR_EPOS (1<<3) 82#define EPCR_ERPRR (1<<2) 83#define EPCR_ERPRW (1<<1) 84#define EPCR_ERRE (1<<0) 85#define DME_EPAR 0x0C 86#define DME_EPDRL 0x0D 87#define DME_EPDRH 0x0E 88#define DME_WCR 0x0F 89#define DME_PAR_BASE 0x10 90#define DME_PAR(n) (DME_PAR_BASE + n) 91#define DME_MAR_BASE 0x16 92#define DME_MAR(n) (DME_MAR_BASE + n) 93#define DME_GPCR 0x1E 94#define DME_GPR 0x1F 95#define DME_TRPAL 0x22 96#define DME_TRPAH 0x23 97#define DME_RWPAL 0x24 98#define DME_RWPAH 0x25 99#define DME_VIDL 0x28 100#define DME_VIDH 0x29 101#define DME_PIDL 0x2A 102#define DME_PIDH 0x2B 103#define DME_CHIPR 0x2C 104#define DME_SMCR 0x2F 105#define DME_MRCMDX 0xF0 106#define DME_MRCMD 0xF2 107#define DME_MRRL 0xF4 108#define DME_MRRH 0xF5 109#define DME_MWCMDX 0xF6 110#define DME_MWCMD 0xF8 111#define DME_MWRL 0xFA 112#define DME_MWRH 0xFB 113#define DME_TXPLL 0xFC 114#define DME_TXPLH 0xFD 115#define DME_ISR 0xFE 116#define ISR_LNKCHG (1<<5) 117#define ISR_UDRUN (1<<4) 118#define ISR_ROO (1<<3) 119#define ISR_ROS (1<<2) 120#define ISR_PT (1<<1) 121#define ISR_PR (1<<0) 122 123#define DME_IMR 0xFF 124#define IMR_PAR (1<<7) 125#define IMR_LNKCHGI (1<<5) 126#define IMR_UDRUNI (1<<4) 127#define IMR_ROOI (1<<3) 128#define IMR_ROI (1<<2) 129#define IMR_PTI (1<<1) 130#define IMR_PRI (1<<0) 131 132/* Extra PHY register from DM9000B */ 133#define MII_DME_DSPCR 0x1B 134#define DSPCR_INIT 0xE100 135 136#endif /* __DMEREGS_H__ */ 137 138